DETAILED ACTION
This action is in response to the amendment filed 04/02/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the gate drivers (See claims 1, 7 and 16) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Response to Arguments
Applicant’s arguments with respect to claims 1-15 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 are rejected under 35 U.S.C. 103 as being unpatentable over US Doc. ID US11119159B2 (Hereinafter He) in view of KR Doc. ID KR20230050184A (Hereinafter Kwangsoon).
Regarding claim 1, He discloses a multilevel power converter [e.g. Fig. 3, element 14] having a DC bus with a positive terminal and a negative terminal [e.g. paragraph 0017, “An exemplary embodiment of a power converter that self-monitors for open-circuit faults includes a DC-bus having a positive terminal, a negative terminal, and a DC-bus midpoint”], a plurality of switches between the DC bus [e.g. Fig. 2, elements Sa1-Sc4] and a plurality of outputs [e.g. Fig. 2, elements A, B, & C] , and one or more current sensors [e.g. Fig. 2, elements ia, ib, & ic]; and grouping two or more of the switches and/or at least one of the plurality of switches and at least one of the one or more current sensors in a cluster [e.g. Fig. 2, elements Sa2, Sb2, & Sc2 grouped with element ic] sharing a common power supply [e.g. Fig. 2, element Vdc] for one or more gate drivers [e.g. Fig. 3, element 22] of the two or more of the plurality of switches [e.g. Fig. 2, elements Sa1-Sc4] and/or the at least one of the plurality of switches.
He fails to disclose wherein the common power supply is different from a power supply applied to the positive terminal and the negative terminal of the DC bus.
Kwangsoon teaches a multi-level power converter [e.g. Fig. 14B, power converter circuit disclosed in the figure] wherein the common power supply [e.g Fig. 15, element 221] is different from a power supply [e.g. Fig. 4, element 113] applied to the positive terminal [e.g. Fig. 4, element 111]and the negative terminal [e.g. Fig. 4, element 112] of the DC bus.
It would be obvious to someone having ordinary skill in the art, before the effective filing date, to modify He wherein the power converter further includes that the common power supply is different from a power supply applied to the positive terminal and the negative terminal of the DC bus as taught by Kwangsoon to provide protective isolation for the switches.
Regarding claim 2, He discloses the power converter of claim 1, wherein the two or more of the plurality of switches are configured to be on at different times [e.g. Fig. 8; paragraph 0030, “The gate driver circuit 22 in turn provides gate signals 24 to the switches of the NPC power converter 14 . In response to the gate signals 24 , the switches of the NPC power converter 14 operated between open and closed conditions”].
Regarding claim 3, he discloses the power converter of claim 1, wherein the cluster comprises the at least one of the plurality of switches [e.g. Fig. 2, elements Sa3, Sb3, & Sc3] and the at least one of the one or more current sensors [e.g. Fig. 2, element inp].
Regarding claim 4, He discloses the power converter of claim 1, wherein the multilevel power converter represents a three-phase T-type power converter [e.g. Fig. 2; paragraph 0019, “FIG. 2 is a schematic diagram of a circuit topology of a Three-level T-Type NPC converter.”] in which, for each phase leg of the multilevel power converter [e.g. Fig. 2, elements A, B, & C], the cluster is formed of switches of the plurality of switches connected to each other in a common drain/emitter configuration [e.g. Fig. 2, cluster of elements Sa1 & Sa4 , Sb1 & Sb4, and Sc1 & Sc4].
Regarding claim 5, He discloses the power converter of claim 4, wherein the cluster in each phase leg also includes a current sensor of the one or more current sensors [e.g. Fig. 2, cluster of elements Sa1 & Sa4 & ia, Sb1 & Sb4 & ib, and Sc1 & Sc4 & ic].
Regarding claim 6, The method of claim 4, wherein another cluster comprises a plurality of current sensors of the one or more current sensors [e.g. Fig. 2, cluster of elements Sa3-Sc4 & inp & ia].
Claims 7, & 9-20 are rejected under 35 U.S.C. 103 as being unpatentable over International Publication Number WO2017116083A1 (Hereinafter Park) in view of KR Doc. ID KR20230050184A (Hereinafter Kwangsoon).
Regarding claim 7, Park discloses a multilevel power converter [e.g. Fig. 1, element 3; Fig. 2, element 3] comprising: a direct current bus [e.g. Fig. 2, combination of elements 13, 14, & 17] having a positive terminal [e.g. Fig. 2, element 13] and a negative terminal [e.g. Fig. 2, element 14] ; a plurality of switches [e.g. Fig. 2, switches apart of 3R, 3S, & 3T] for each of a plurality of phase legs [e.g. Fig. 2, elements RL, SL, & TL of the multilevel power converter connected between the positive terminal and the negative terminal [e.g. Fig. 2, elements 13 & 14], each phase leg of the plurality of phase legs having an output [e.g. Fig. 2, output of RL, SL, & TL; Fig. 1, phase inputs of element 1] configured to provide a converted voltage output according to switching control of the plurality of switches [e.g. paragraph 0020, “A power converter using a semiconductor switch device, that is, a converter or an inverter, is an indispensable module for controlling a renewable energy generation system”]; and one or more current sensors [e.g. Fig. 1, elements 32]; wherein at least two or more of the plurality of switches [e.g. Fig. 2, switches of element 3R] and/or at least one of the plurality of switches and at least one of the one or more current sensors [e.g. Fig 2, switches of element 3R with Fig. 1, element 32R] are connected as a cluster to share a common power supply [e.g. Fig. 1, elements 32S & 32T; Fig. 1, elements 37].
Park fails to disclose a common power supply for one or more gate drivers of the two or more of the plurality of switches and/or the at least one of the plurality of switches wherein the common power supply is different from a power supply applied to the positive terminal and the negative terminal of the DC Bus.
Kwangsoon teaches a multi-level power converter [e.g. Fig. 14B, power converter circuit disclosed in the figure] with a common power supply [e.g. Fig. 15, element 221] for one or more gate drivers [e.g. Fig. 14B, driving circuit] of the two or more of the plurality of switches [e.g. Fig. 14B, elements Q1-Q4] and/or the at least one of the plurality of switches wherein the common power supply [e.g. Fig. 15, element 221] is different from a power supply [e.g. Fig. 4, element 113] applied to the positive terminal [e.g. Fig. 4, element 111]and the negative terminal [e.g. Fig. 4, element 112] of the DC bus.
It would be obvious to someone having ordinary skill in the art, before the effective filing date, to modify Park wherein the power converter further includes that a common power supply for one or more gate drivers of the two or more of the plurality of switches and/or the at least one of the plurality of switches wherein the common power supply is different from a power supply applied to the positive terminal and the negative terminal of the DC bus as taught by Kwangsoon to provide protective isolation to the switches.
Regarding claim 9, Park discloses the multilevel power converter of claim 7 [e.g. Fig. 1, element 3], wherein a current sensor [e.g. Fig. 2, switches of element 3R with Fig. 1, element 32R] of the one or more current sensors in each phase leg [e.g. Fig. 1, there is a current sensor 32 for each phase leg] and a pair of adjacent switches [e.g. Fig. 2, two of the switches of element 3R] form a cluster.
Regarding claim 10, Park discloses the multilevel power converter of claim 7, wherein a current sensor of the one or more current sensors in each phase leg [e.g. Fig. 1, element 32R] and a pair of adjacent switches [e.g. Fig. 2, Q1R & Q2R] form the cluster and share a common isolation boundary [e.g. Fig 1; switches and sensor are isolated on the left side of Fig. 1].
Regarding claim 11, Park discloses the multilevel power converter of claim 7, wherein the multilevel power converter [e.g. Fig. 1, element 3] is a three-phase [e.g. Fig. 2, element 3] T-type power converter having, for each phase leg, first and second switches connected in series between the positive terminal and the negative terminal [e.g. Fig 2, elements Q2R & Q3R], a third switch [e.g. Fig. 2, element Q1R] connected between the series connected first and second switches [e.g. Fig. 2, elements Q2R & Q3R] and the positive terminal [e.g. Fig. 2, element 13], and a fourth switch [e.g. Fig. 2, element Q4R] connected between the series connected first and second switches [e.g. Fig. 2, elements Q2R & Q3R] and the negative terminal [e.g. Fig. 2, element 14].
Regarding claim 12, Park discloses the multilevel power converter of claim 7, wherein the multilevel power converter [e.g. Fig. 1, element 3] is a D-type NPC power converter [e.g. Fig. 2, element 3; Fig. 2, elements D5R-D6T; paragraph 0040, “The NPC converter 3 and the NPC inverter 4 are implemented as a so-called three-level circuit”].
Regarding claim 13, Park discloses the multilevel power converter of claim 7, wherein the multilevel power converter [e.g. Fig 1, element 3] is a three-phase three-level power converter [e.g. paragraph 0040, “The NPC converter 3 and the NPC inverter 4 are implemented as a so-called three-level circuit”; Fig. 2, element 3].
Regarding claim 14, Park discloses the multilevel power converter of claim 7, further comprising a controller [e.g. Fig. 1, element 10] configured to control switching of the plurality of switches [e.g. paragraph 0012, “the conversion control unit may include: a sensor input terminal for receiving a sensing signal for electrical characteristics from various sensors provided on an input side, an output side, and a DC stage; A PWM generator for outputting pulses for operating the first to fourth switches and outputting pulses satisfying conditions of minimum duty and maximum duty”].
Regarding claim 15, Park discloses the multilevel power converter of claim 14, wherein the controller [e.g. Fig. 1, element 10] is a pulse width modulator (PWM) controller[e.g. paragraph 0012, “the conversion control unit may include: a sensor input terminal for receiving a sensing signal for electrical characteristics from various sensors provided on an input side, an output side, and a DC stage; A PWM generator for outputting pulses for operating the first to fourth switches and outputting pulses satisfying conditions of minimum duty and maximum duty”].
Regarding claim 16, Park discloses a multilevel power converter [e.g. Fig. 1, element 3; Fig. 2, element 3] comprising: a direct current (DC) bus [e.g. Fig. 2, combination of elements 13, 14, & 17] having a positive terminal [e.g. Fig. 2, element 13] and a negative terminal [e.g. Fig. 2, element 14]; and a plurality of switches [e.g. Fig. 2, switches apart of 3R, 3S, & 3T] for each of a plurality of phase legs [e.g. Fig. 2, elements RL, SL, & TL] of the multilevel power converter connected between the positive terminal and the negative terminal [e.g. Fig. 2, elements 13 & 14], each phase leg of the plurality of phase legs having an output [e.g. Fig. 2, output of RL, SL, & TL; Fig. 1, phase inputs of element 1] configured to provide a converted voltage output according to switching control of the plurality of switches [e.g. paragraph 0020, “A power converter using a semiconductor switch device, that is, a converter or an inverter, is an indispensable module for controlling a renewable energy generation system”]; and wherein at least two switches of the plurality of switches [e.g. Fig. 2, switches of element 3R] are connected as a cluster to share a common power supply [e.g. Fig. 1, elements 32S & 32T; Fig. 1, elements 37].
Park fails to disclose a common power supply for one or more gate drivers of the two or more of the plurality of switches and/or the at least one of the plurality of switches wherein the common power supply is different from a power supply applied to the positive terminal and the negative terminal of the DC Bus.
Kwangsoon teaches a multi-level power converter [e.g. Fig. 14B, power converter circuit disclosed in the figure] with a common power supply [e.g. Fig. 15, element 221] for one or more gate drivers [e.g. Fig. 14B, driving circuit] of the two or more of the plurality of switches [e.g. Fig. 14B, two of elements Q1-Q4] and/or the at least one of the plurality of switches wherein the common power supply [e.g. Fig. 15, element 221] is different from a power supply [e.g. Fig. 4, element 113] applied to the positive terminal [e.g. Fig. 4, element 111] and the negative terminal [e.g. Fig. 4, element 112] of the DC bus.
It would be obvious to someone having ordinary skill in the art, before the effective filing date, to modify Park wherein the power converter further includes that a common power supply for one or more gate drivers of the two or more of the plurality of switches and/or the at least one of the plurality of switches wherein the common power supply is different from a power supply applied to the positive terminal and the negative terminal of the DC bus as taught by Kwangsoon to provide protective isolation to the switches.
Regarding claim 17, Park discloses the multilevel power converter of claim 16 [e.g. Fig. 1, element 3; Fig. 2, element 3], further comprising at least one current sensor [e.g. Fig. 1, element 32], wherein the at least one current sensor is connected to the at least two of the plurality of switches [e.g. Fig 2, switches of element 3R with Fig. 1, element 32R] to form the cluster.
Park fails to disclose the common power supply as disclosed in claim 16.
Kwangsoon teaches the common power supply as disclosed in claim 16 [e.g. Fig. 15, element 221].
It would be obvious to someone having ordinary skill in the art, before the effective filing date, to modify Park wherein the power converter further includes that the common power supply as taught by Kwangsoon to provide protective isolation to the switches.
Regarding claim 18. Park discloses the multilevel power converter of claim 17 [e.g. Fig. 1, element 3; Fig. 2, element 3], wherein the at least one current sensor [e.g. Fig. 1, element 32] and the at least two switches of the plurality of switches [e.g. Fig 2, switches of element 3R with Fig. 1] are not on at a same time [e.g. Fig. 4; current sensor is on as long as the system is on].
Regarding claim 19, the multilevel power converter of claim 16 [e.g. Fig. 1, element 3; Fig. 2, element 3], wherein at least two more switches of the plurality of switches [e.g. Fig. 2, two switches from element 3S] other than the at least two switches [e.g. Fig. 2, two switches from element 3R]
Park fails to disclose switches are connected as a second cluster to share a second common power supply for second gate drivers of the at least two more switches of the plurality of switches, and wherein the second common power supply is different from the power supply applied to the positive terminal and the negative terminal of the DC bus and the common power supply.
Kwangsoon teaches switches [e.g. Fig. 14B, Q1 & Q2] are connected as a second cluster [e.g. Fig. 14B, half of Fig. 14B] to share a second common power supply [e.g. Fig. 14B, power supply for driving circuit for Q1 and Q2; Fig. 15, element 221] for second gate drivers [e.g. Fig. 14B, driving circuit] of the at least two more switches of the plurality of switches [e.g. Fig. 14B, Q1 & Q2], and wherein the second common power supply is different from the power supply applied to the positive terminal and the negative terminal of the DC bus and the common power supply [e.g. Fig. 14B, there are distinct power supplies for each side of the circuit].
It would be obvious to someone having ordinary skill in the art, before the effective filing date, to modify Park wherein the power converter further includes that switches are connected as a second cluster to share a second common power supply for second gate drivers of the at least two more switches of the plurality of switches, and wherein the second common power supply is different from the power supply applied to the positive terminal and the negative terminal of the DC bus and the common power supply as taught by Kwangsoon to provide protective isolation for the switches.
Regarding claim 20, Park discloses the multilevel power converter of claim 16 [e.g. Fig. 1, element 3; Fig. 2, element 3], wherein the multilevel power converter [e.g. Fig 1, element 3] is a three-phase three-level power converter [e.g. paragraph 0040, “The NPC converter 3 and the NPC inverter 4 are implemented as a so-called three-level circuit”; Fig. 2, element 3].
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over International Publication Number WO2017116083A1 (Hereinafter Park) in view of US Doc ID. US8645087B2 (Hereinafter Doktar) and KR Doc. ID KR20230050184A (Hereinafter Kwangsoon).
Regarding claim 8, Park fails to discloses the multilevel power converter of claim 7, wherein the one or more current sensors include a shunt resistor.
Doktar teaches a multilevel power converter, wherein the one or more current sensors include a shunt resistor [e.g. paragraph 0003, “Another known method, which is cheaper in terms of costs than a Hall transformer, is to measure the voltage acting over a shunt resistor disposed on the pathway of the main current, which voltage is directly proportional to the current”].
It would be obvious to someone having ordinary skill in the art, before the effective filing date, to modify He wherein the multilevel power converter of claim 7 further includes one or more current sensors include a shunt resistor as taught by Doktar as shunt resistor sensors are an inexpensive, well-known current sensor.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/MONICA LEWIS/Supervisory Patent Examiner, Art Unit 2838
/JARED RAYMOND HAUSMAN/Examiner, Art Unit 2838
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