Prosecution Insights
Last updated: July 17, 2026
Application No. 18/628,523

SHOOT-THROUGH PROTECTION AND CURRENT MONITORING SCHEME FOR MULTILEVEL POWER CONVERTERS

Final Rejection §103
Filed
Apr 05, 2024
Priority
Apr 06, 2023 — EU 23167079.5
Examiner
SHAW, LAUREN ASHLEY
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
HAMILTON SUNDSTRAND Corporation
OA Round
2 (Final)
96%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 96% — above average
96%
Career Allowance Rate
27 granted / 28 resolved
+28.4% vs TC avg
Moderate +6% lift
Without
With
+5.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
7 currently pending
Career history
44
Total Applications
across all art units

Statute-Specific Performance

§103
77.1%
+37.1% vs TC avg
§102
23.0%
-17.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 28 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-7, 9-10, and 12-22 are pending in this application. Claims 1 and 10 are amended, claims 8 and 11 are canceled and claims 12-22 are new. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) was submitted on 04/05/24. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Response to Amendment Applicant’s amendments filed 03/16/26, have been fully considered. The amendment to figure 1 is sufficient to overcome the “prior art” drawing objection of the previous office action, according the drawing objection has been withdrawn. The cancellation of claims 8 and 11 and amendment of claim 10 are sufficient to overcome the drawing objections related to the claims, according the drawing objections have been withdrawn. The amendment to the specification is sufficient to overcome the drawing/specification objection related to the reference number 1 in fig 2, accordingly the objections are withdrawn. The amendment to claim 1 is sufficient to overcome the claim objection, therefore the objection is withdrawn. However, the applicant argues that the converter shown in fig 2 including switch pair 3c and 3d is a H-bridge power converter. Examiner disagrees. The instant application specification describes fig 2 in par [0010] as “Figure 2 is a schematic diagram of a circuit topology of a three-phase three-level T-type power converter”. An H-bridge is typically a single-phase topology consisting of four switches arranged to reverse the polarity of the voltage across a load. While multiple H-bridges can be used for three-phase systems (Cascaded H-Bridge), the specific layout shown here—with a direct connection to a split DC bus neutral—is the defining characteristic of a T-type NPC (Neutral Point Clamped) converter. Accordingly, the drawing objection related to claim 6 remains. Response to Arguments Applicant's arguments filed 03/16/26 have been fully considered but they are not persuasive. In response to applicant's argument that He and Abdoulin are nonanalogous art, it has been held that a prior art reference must either be in the field of the inventor’s endeavor or, if not, then be reasonably pertinent to the particular problem with which the inventor was concerned, in order to be relied upon as a basis for rejection of the claimed invention. See In re Oetiker, 977 F.2d 1443, 24 USPQ2d 1443 (Fed. Cir. 1992). In this case, He discloses a fault tolerant T-Type power converter with plurality of phase legs. The fault tolerant inverter 14 is connected to a microcontroller 18, which receives fault detection inputs from the T-Type NPC inverter 14 and fault detection inputs from the redundant phase leg. The fault detection inputs may include measured voltages and/or currents within the fault tolerant inverter 14 which are used by the microcontroller 18 to operate the switches (col 6 lines 47-54). He discloses an example of including neutral point transducers to measure load current from a plurality of phase legs of the multi-level power converter then the microcontroller identifies at least one fault condition based upon the switching state of the multi-level power converter and the load current values (col 3 lines 26-44). This appears to be identical to the problem addressed in the instant application.. Based upon the fault detection inputs, the microcontroller is able to detect switch faults and identify the switch and type of fault (open circuit or short circuit) that is occurring. Abdoulin discloses a current sensing bi-directional switches AND (emphasis added) plasma display. The examiner focuses on what is taught in Abdoulin’s current sensing bi-directional switches to reach an obviousness rejection to the instant application when faced with the problem of sensing the current in a switch to provide information to a controller to determine a fault condition. The concept is also taught in He utilizing transducers to sense and detect fault conditions. Known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art. It would “Obvious to try” – choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success. In this case, combining prior art references He and Abdoulin to be able to sense the current between two switches, utilizing a resistor in series, a shunt resistor, or a passive transducer would be obvious to one skilled in the art (also see He claims 5-10). An updated prior art search has revealed, Lui et al. (US 20220399800 A1) that discloses a power converter as described in the instant application with phase-leg shoot through protection. A later He patent reference (US 10658920 B2) discloses the current sensor transducers that were explained above, see fig. 1. Accordingly, examiner believes the references He and Abdoulin are prior art to the instant application. Examiner believes the invention in the application is a predictable variation of an existing product whose improvements combine known elements in a way that is predictable as indicated in He, Abdoulin, and Lui above, especially when the only difference between the applicants admitted prior art of fig. 1 and its proposed invention of fig. 2 is a single resistor in series between two switches. Drawings The drawings were received on 03/16/26. The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the H-bridge power converter of claim 6 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5, 7, 9-10, 13, 15, 18-21 are rejected under 35 U.S.C. 103 as being unpatentable over He et al. (US 11119159 B2) and further in view of Abdoulin (US 20050012689 A1). Regarding claim 1, He discloses a multilevel power converter (fig 2, Three-level T-Type NPC converter) comprising: a DC bus having a positive terminal (fig 2, Vdc + representing positive DC-bus voltage) and a negative terminal (fig 2, Vdc - representing negative DC-bus voltage); a plurality of switches for each of a plurality of phase legs of the power converter connected between the positive terminal and the negative terminal (fig 2, switches Sa1, Sb1, Sc1, Sa2, Sb2, Sc2, or each phase leg A, B, and C, all connected between Vdc+ and Vdc-), each phase leg having an output configured to provide a converted voltage output according to switching control of the plurality of switches (fig 2, V.sub.an, V.sub.bn, V.sub.cn voltage outputs for phases A,B, and C; col 6 lines 13-24 describe the operation of the power converter utilizing a controller to control the switches and operation of the converter); and a current sensor in each phase leg (fig 2, col 5 lines 64-67 “Phase leg current transducers in each of the phase legs can be used to measure the respective load currents (i.sub.a, i.sub.b, i.sub.c) in each of the Phase legs”). He does not disclose current sensors connected in series between an adjacent pair of the plurality of switches. Abdoulin discloses a current sensing bi-directional switching circuit. Abdoulin discloses current sensors connected in series between a pair of adjacent switches (Fig 4A, resistor RS between switches 22; fig 6, series resistor between two adjacent switches BDS1 and BDS2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of He and incorporate the current sensor between switching devices as taught by Abdoulin. The advantage of this design is to be able to sense current of the switch to determine if its normal or abnormal. Regarding claim 2, He and Abdoulin disclose the multilevel power converter of claim 1, wherein the current sensor in each phase leg is a shunt resistor (Abdoulin par [0032] “A series resistor RS of approximately 10 milli ohms is used to sense the current in the switch”; although “shunt” is not disclosed, a 10 milliohm (10 mΩ) resistor is a very common value for a shunt resistor). Regarding claim 3, He and Abdoulin disclose the multilevel power converter of claim 1, wherein, in each phase leg, the current sensor and the pair of adjacent switches share a common power supply (He fig 2 e.g. switch pairs Sa3 and Sa4 modified with Abdoulin’s current sensors all share a common power supply Vdc). Regarding claim 4, He and Abdoulin disclose the multilevel power converter of claim 1, wherein, in each phase leg, the current sensor and the pair of adjacent switches share a common isolation boundary (He fig 2 e.g. switch pairs Sa3 and Sa4 modified with Abdoulin’s current sensors connected in series between neutral point of the DC link between C1 and C2; each branch of switches and sensor would share a common isolation boundary). Regarding claim 5, He and Abdoulin disclose the multilevel power converter of claim 1, wherein the multilevel power converter is a T-type power converter (He fig 2; col 5 lines 57-58 “T-type topology converter”) having, for each phase leg, first and second switches connected in series between the positive terminal and the negative terminal (He fig 2, e.g. switch pair Sa3 and Sa4), a third switch connected between the series connected first and second switches and the positive terminal (He fig 2, e.g. switch Sa1), and a fourth switch connected between the series connected first and second switches and the negative terminal (He fig 2, e.g. switch Sa2). Regarding claim 7, He and Abdoulin disclose the multilevel power converter of claim 1, wherein the multilevel power converter is a three-level power converter (He fig 2; col 4 lines 11-12 “FIG. 2 is a schematic diagram of a circuit topology of a Three-level T-Type NPC converter.”). Regarding claim 9, He and Abdoulin disclose the multilevel power converter of claim 1, further comprising first and second capacitors connected in series across the positive and negative terminals (He fig 2, C1 and C2 series connected between Vdc+ and Vdc-), wherein the switches of all phase legs are connected to a mid-point between the first and second capacitors (He fig 2, mid-point between C1 and C2 connected to phase legs is a neutral point clamped configuration). Regarding claim 10, He and Abdoulin disclose the multilevel power converter of claim 1, wherein each current sensor is configured to measure partial current based on a voltage drop across the current sensor to control switching of the plurality of switches (He’s fig 2 and claim 4, Three-level T-Type NPC converter modified with Abdoulin’s current sensor RS of fig. 4A; a single shunt resistor between two transistors would be implicit to one of ordinary skills in the art to be configured to measure partial current based on a voltage drop across the resistor). Regarding claim 13, He and Abdoulin disclose the multilevel power converter of claim 9, wherein each current sensor directly measures current flowing through the first and second capacitors (He’s fig. 2, Three-level T-Type NPC converter modified with Abdoulin’s current sensor RS of fig. 4A; this configuration would allow each shunt resistor to sense the current that flows through the first and second capacitors). Regarding claim 14, He and Abdoulin disclose the multilevel power converter of claim 1, wherein, in each phase leg, the current sensor and the pair of adjacent switches are configured to operate in a common source configuration (He’s fig. 2, Three-level T-Type NPC converter modified with Abdoulin’s current sensor RS of fig. 4A, the bi-directional switch 20 employs two common source, N channel MOSFETs 22). Regarding claim 15, He and Abdoulin disclose the multilevel power converter of claim 1, wherein, in each phase leg, the current sensor and the pair of adjacent switches are configured to operate in a common emitter configuration (He discloses the switches of fig 2 may be implemented with various transistor types see col 6 lines 6-65; if implemented with IGBT it would be the common emitter type as the emitters both are connected to the current sensor resistor). Regarding claim 18, He and Abdoulin disclose the multilevel power converter of claim 1, wherein, for a positive voltage phase, a first switch is always on, a second switch and a third switch are switched on and off in a complementary fashion and a fourth switch is off, and wherein, for a negative voltage phase, the second switch is always on, the first switch and the fourth switch are switched on and off in a complementary fashion and the third switch is off (He’s fig. 2, Three-level T-Type NPC converter modified with Abdoulin’s current sensor RS of fig. 4A; for positive voltage phase, Sa2 is switched ON, Sa4 is OFF, while Sa3 and Sa1 alternate ON/OFF with each other. For negative voltage phase, Sa3 is ON and Sa1 is OFF while Sa3 and Sa4 alternate ON/OFF with each other). Regarding claim 19, He and Abdoulin disclose the multilevel power converter of claim 1, wherein the current sensors are configured to detect whether a switching waveform is different from an expected waveform during normally controlled switching (see He col 12 lines 26-24, the abnormal variation of i.sub.np is different from what is expected during normal operation). Regarding claim 20, He discloses a multilevel power converter (fig 2, Three-level T-Type NPC converter) comprising: a DC bus having a positive terminal (fig 2, Vdc + representing positive DC-bus voltage) and a negative terminal (fig 2, Vdc - representing negative DC-bus voltage); a first capacitor (fig 2, C1) and a second capacitor (fig 2, C2) connected in series across the positive terminal and the negative terminal (fig 2, see series connection across + and – Vdc); three phase legs connected between the positive terminal and the negative terminal (fig 2, each phase leg A, B, and C, all connected between Vdc+ and Vdc-), each phase leg comprising: a plurality of switches (fig 2, switches Sa1, Sb1, Sc1, Sa2, Sb2, Sc2); wherein a first terminal of a first switch of each phase leg is connected between the first and second capacitor (fig 2, see switches Sa3, Sb3, and Sc3 all connected between capacitors C1 and C2), and wherein each phase leg has an output configured to provide a converted voltage output according to switching control of the switches(fig 2, V.sub.an, V.sub.bn, V.sub.cn voltage outputs for phases A,B, and C; col 6 lines 13-24 describe the operation of the power converter utilizing a controller to control the switches and operation of the converter). He does not disclose a current sensor connected in series between a pair of adjacent switches. Abdoulin discloses a current sensing bi-directional switching circuit. Abdoulin discloses current sensors connected in series between a pair of adjacent switches (Fig 4A, resistor RS between switches 22; fig 6, series resistor between two adjacent switches BDS1 and BDS2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of He and incorporate the current sensor between switching devices as taught by Abdoulin. The advantage of this design is to be able to sense current of the switch to determine if its normal or abnormal. Regarding claim 21, He and Abdoulin disclose the multilevel power converter of claim 20, wherein each current sensor is configured to measure partial current based on a voltage drop across the current sensor to control switching of the plurality of switches (He’s fig 2 and claim 4, Three-level T-Type NPC converter modified with Abdoulin’s current sensor RS of fig. 4A; a single shunt resistor between two transistors is well known to one of ordinary skills in the art to be configured to measure partial current based on a voltage drop across the resistor), and wherein each current sensor is a shunt resistor (Abdoulin par [0032] “A series resistor RS of approximately 10 milli ohms is used to sense the current in the switch”; although “shunt” is not disclosed, a 10 milliohm (10 mΩ) resistor is a very common value for a shunt resistor). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over He et al. (US 11119159 B2) and further in view of Abdoulin (US 20050012689 A1) and Kshirsagar (US 20200028448 A1). Regarding claim 6, He and Abdoulin disclose the multilevel power converter of claim 1. He and Abdoulin do not disclose wherein the multilevel power converter is an H-bridge power converter. Kshirsagar discloses a H-type multilevel power converter (fig 2, 200 H-type multilevel power converter). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of He and Abdoulin and incorporate the use of H-type multilevel power converter as taught by Kshirsagar. The advantage of this design to offer an alternate topology which is more advantageous for high-voltage, high-power applications. Allowable Subject Matter Claims 12, 16-17 and 22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 12, He and Abdoulin disclose the multilevel power converter of claim 1. He and Abdoulin fail to disclose wherein operation of the multilevel power converter is configured to be stopped based on an output of one of the current sensors when the respective current sensor detects a fault. He et al. (US 20200292629 A1) is found to be the closest prior art of record. However, none of the prior art, taken singly or in combination, teach “multilevel power converter is configured to be stopped based on an output of one of the current sensors when the respective current sensor detects a fault”. Regarding claim 16, He and Abdoulin disclose the multilevel power converter of claim 1. He and Abdoulin fail to disclose wherein each current sensor is configured to reconstruct an output phase current by acting as a current sampler. He et al. (US 20200292629 A1) is found to be the closest prior art of record. However, none of the prior art, taken singly or in combination, teach “wherein each current sensor is configured to reconstruct an output phase current by acting as a current sampler”. Regarding claim 17, He and Abdoulin disclose the multilevel power converter of claim 1. He and Abdoulin fail to disclose wherein, in each phase leg, the current sensor and the pair of adjacent switches share isolation barriers. He et al. (US 20200292629 A1) is found to be the closest prior art of record. However, none of the prior art, taken singly or in combination, teach “wherein, in each phase leg, the current sensor and the pair of adjacent switches share isolation barriers”. Regarding claim 22, He and Abdoulin disclose the multilevel power converter of claim 20, wherein each current sensor shares a power supply (He fig. 2, each branch shares power supply Vdc) with switches operating in a common source/emitter configuration (He fig. 2, Sa3 and Sa4 common source configuration). and isolation barriers He et al. (US 20200292629 A1) is found to be the closest prior art of record. However, none of the prior art, taken singly or in combination, teach “each current sensor shares an isolation boundary with switches”. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. He et al. US 10658920 B2 - Fault-tolerant Topology For Multilevel T-type Converters Arnedo et al US 20150303826 A1 - Neutral Point Clamped Multilevel Converter Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren A Shaw whose telephone number is (571)272-3074. The examiner can normally be reached Mon-Fri 7-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu Tran can be reached at (571) 270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LAUREN ASHLEY SHAW/Examiner, Art Unit 2838 /THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
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Prosecution Timeline

Apr 05, 2024
Application Filed
Jan 05, 2026
Non-Final Rejection mailed — §103
Mar 16, 2026
Response Filed
Jul 07, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
96%
Grant Probability
99%
With Interview (+5.6%)
2y 6m (~3m remaining)
Median Time to Grant
Moderate
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