Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
1. This non-final Office action is responsive to Applicants’ application filed on 04/09/2024. Claims 1-24 are presented for examination and are rejected/objected for the reasons indicated herein below.
Specification
2. Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words. The form and legal phraseology often used in patent claims, such as "means" and "said," should be avoided. For instance, the term “comprises” in the abstract should be avoided. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, "The disclosure concerns," "The disclosure defined by this invention," "The disclosure describes," etc.
Claim Objections
3. Claims 1, 5, 12-15, 18 and 23-24 are objected to because of the following informalities:
Claim 1, line 18, recites the limitation “the difference between a feedback voltage”. There is insufficient antecedent basis for this limitation in the claim. Appropriate correction is required.
Claim 1, line 26, recites “a high voltage side” it should be changed to “[[a]] the high voltage side”. Appropriate correction is required.
Claim 1, line 28, recites “a difference between” it should be changed to “[[a]] the difference between”. Appropriate correction is required.
Claim 5, line 1, recites “The regulator circuit of claim 1,” it should be changed to “The regulator circuit of claim 2 [[1]],”. Appropriate correction is required.
Claim 12, line 9, recites “voltage of at least one device” it should be changed to “voltage of the at least one device”. Appropriate correction is required.
Claim 13, line 2, recites “a high voltage side reference voltage” it should be changed to “[[a]] the high voltage side reference potential
Claim 13, lines 11-13, recites “wherein the level of the feedback voltage and the reference voltage is higher than the withstand voltage of the low voltage side differential voltage input stage circuit” it should be changed to “wherein [[the]] a level of the feedback voltage and the reference voltage is higher than the withstand voltage of the high voltage side differential voltage input stage circuit”. Appropriate correction is required.
Claim 14, line 4, recites the limitation “the difference between a positive terminal”. There is insufficient antecedent basis for this limitation in the claim. Appropriate correction is required.
Claim 15, line 2, recites the limitation “the ground potential”. There is insufficient antecedent basis for this limitation in the claim. Appropriate correction is required.
Claim 18, lines 9-10, recites “to generate the differential current pair according to the difference between the reference voltage and the feedback voltage” it should be changed to “to generate the differential current pair according to [[the]] a difference between [[the]] a reference voltage and [[the]] a feedback voltage”. Appropriate correction is required.
Claim 23, lines 8-9, recites “wherein the predetermined clamping voltage is lower than the withstand voltage of the at least one device in the low voltage side gain stage circuit” it should be changed to “wherein the predetermined clamping voltage is lower than [[the]] a withstand voltage of
Claim 24, lines 10-11, recites “wherein the level of the feedback voltage and the reference voltage is higher than the withstand voltage of the low voltage side differential voltage input stage circuit” it should be changed to “wherein [[the]] a level of [[the]] a feedback voltage and [[the]] a reference voltage is higher than [[the]] a withstand voltage of the low voltage side differential voltage input stage circuit”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
4. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
5. Claims 13 and 24 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. For instance;
In claim 13, the limitations “wherein the regulator circuit for generating a high voltage side reference voltage does not include a level shifting amplifier circuit, and the level shifting amplifier circuit is configured to operably perform level shifting and amplification on the feedback voltage and the reference voltage, to generate the transresistance output voltage; wherein the level shifting amplifier circuit includes a level shifting circuit and a low voltage side differential voltage input stage circuit” are indefinite. These limitations are confusing and contradict each other. First Applicant claims that the regulator circuit for generating a high voltage side reference voltage “does not” include “a level shifting amplifier circuit”, then Applicant claims that “the level shifting amplifier circuit” is: configured to operably perform level shifting and amplification on the feedback voltage and the reference voltage, to generate the transresistance output voltage; wherein the level shifting amplifier circuit includes a level shifting circuit and a low voltage side differential voltage input stage circuit. Therefore, these limitations should be rewritten and clarified as specifically defined in the specification. Examiner’s note: One way to fix this issue is to delete the second part of these limitations as follows: “
In claim 24, the limitations “wherein the operational amplifier does not include a level shifting amplifier circuit, and the level shifting amplifier circuit is configured to operably perform level shifting and amplification on the feedback voltage and the reference voltage, to generate the transresistance output voltage; wherein the level shifting amplifier circuit includes a level shifting circuit and a low voltage side differential voltage input stage circuit” are indefinite. These limitations are confusing and contradict each other. First Applicant claims that the operational amplifier “does not” include “a level shifting amplifier circuit”, then Applicant claims that “the level shifting amplifier circuit” is: configured to operably perform level shifting and amplification on the feedback voltage and the reference voltage, to generate the transresistance output voltage; wherein the level shifting amplifier circuit includes a level shifting circuit and a low voltage side differential voltage input stage circuit. Therefore, these limitations should be rewritten and clarified as specifically defined in the specification. Examiner’s note: One way to fix this issue is to delete the second part of these limitations as follows: “
Allowable Subject Matter
6. Claims 1-24 are objected to, but would be allowable if all the claim objections are overcome and if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Regarding claims 1-13, none of the prior art, listed in the attached PTO-892 form, alone or in combination discloses “A regulator circuit for generating a high voltage side reference potential, comprising: a high voltage side differential voltage input stage circuit configured to operably generate a differential current pair according to a difference between a positive terminal input voltage and a negative terminal input voltage; a low voltage side gain stage circuit having a transresistance to convert the differential current pair into a transresistance output voltage; and an output amplification stage circuit configured to operably amplify the transresistance output voltage to generate an output voltage; wherein the high voltage side differential voltage input stage circuit and the output amplification stage circuit are powered by a high voltage power rail, and the low voltage side gain stage circuit is powered by a low voltage power rail; wherein the regulator circuit adjusts the output voltage to a predetermined target voltage according to the difference between a feedback voltage related to the output voltage and a reference voltage, wherein the predetermined target voltage is higher than a withstand voltage of at least one device in the low voltage side gain stage circuit; wherein the feedback voltage and the reference voltage correspond respectively to one and the other of the negative terminal input voltage and the positive terminal input voltage; wherein the output voltage serves as a high voltage side reference potential for an external circuit; wherein a difference between the positive terminal input voltage and the negative terminal input voltage is a high voltage side differential input voltage”. As recited in claims 1-13.
Regarding claims 14-24, none of the prior art, listed in the attached PTO-892 form, alone or in combination discloses “An operational amplifier, comprising: a high voltage side differential voltage input stage circuit configured to operably generate a differential current pair according to the difference between a positive terminal input voltage and a negative terminal input voltage; a low voltage side gain stage circuit having a transresistance, configured to operably convert the differential current pair into a transresistance output voltage; and an output amplification stage circuit configured to operably amplify the transresistance output voltage to generate an output voltage; wherein the high voltage side differential voltage input stage circuit and the output amplification stage circuit are powered by a high voltage power rail, and the low voltage side gain stage circuit is powered by a low voltage power rail; wherein the output voltage serves as a high voltage side reference ground potential for an external circuit; wherein the difference between the positive terminal input voltage and the negative terminal input voltage is a high voltage side differential input voltage”. As recited in claims 14-24.
Conclusion
7. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. A list of pertinent prior art is attached in form PTO-892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YUSEF A AHMED whose telephone number is (571)272-6057. The examiner can normally be reached on Monday-Friday 11AM-7PM.
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/YUSEF A AHMED/Primary Examiner, Art Unit 2838
Prosecution Insights