DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 1 directed to claims 1-8 and 10-16 in the reply filed on 6/18/2026 is acknowledged.
Claims 9 & 17-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected subject matter.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5, 7-8, 10 & 12-15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US PG. Pub. 2022/0029519).
Regarding claim 1 – Kim teaches an apparatus (fig. 5 [title] Kim states, “power conversion module”) comprising: a substrate (404 [paragraph 0050] Kim states, “motherboard 404 (e.g., a PCB)”); a first switch (440 [paragraph 0051] Kim states, “high side transistor 440”) affixed to a first surface (408) of the substrate (404); a second switch (444 [paragraph 0051] Kim states, “a low side transistor 444”) affixed to a second surface (412) of the substrate (404), the first switch (440) and the second switch (444) connected in series (see series connection and current path 540 shown in figure 5 and 6) via a first circuit path (516 [paragraph 0058] Kim states, “first via 516”) extending through the substrate (404); and a capacitor (436 [paragraph 0059] Kim states, “decoupling capacitor 436”) disposed in series (see series connection and current path 540 shown in figure 5 and 6) in a second circuit path (path including elements 532, 528 & 480 [paragraph 0059] Kim states, “second via 532”) extending through the substrate (404), the first switch (440) and the second switch (444) connected in series via the second circuit path (535; claimed structure shown in figure 5).
Regarding claim 2 – Kim teaches the apparatus as in claim 1, wherein a series (see series connection and current path 540 shown in figure 5 and 6) combination of the first circuit path (516), the first switch (440), the second circuit path (532), and the second switch (444) create an inductive circuit loop (540 [paragraph 0061] Kim states, “the current path is marked as a current path 540. The current path 540 includes a loop traversing the decoupling capacitor 436, the high side transistor 440, the low side transistor 444 and back to the decoupling capacitor 436”).
Regarding claim 3 – Kim teaches the apparatus as in claim 1, wherein the first circuit path (figs. 5-6, 516) is connected between a first node (504 or 484 [paragraph 0057 & 0056] Kim states, “pad 504…pad 484”) of the first switch (440) and a first node (520 or 524 [paragraph 0058 & 0059] Kim states, “pad 520…pad 524”) of the second switch (444); and wherein the second circuit path (532) is connected between a second node (504 or 484) of the first switch (440) and a second node (524 or 520) of the second switch (444).
Regarding claim 4 – Kim teaches the apparatus as in claim 3, wherein a first portion (fig. 5, 480) of the second circuit path (path including elements 532, 528 & 480) is disposed between a first portion of the substrate (404) and the first switch (440); and wherein a second portion (528) of the second circuit path (path including elements 532, 528 & 480) is disposed between the first portion of the substrate (440) and the second switch (444).
Regarding claim 5 – Kim teaches the apparatus as in claim 4, wherein the first node (fig. 5, 504) of the first switch (440) is a source node ([paragraph 0057] Kim states, “a third pad 504 of the motherboard 404 is electrically coupled to the output node (e.g., a source or an emitter) of the high side transistor 440”); and wherein the first node (520) of the second switch (444) is a drain node ([paragraph 0058] Kim states, “pad 520 is coupled to the input node (e.g., a drain or a collector) of the low side transistor 444”).
Regarding claim 7 – Kim teaches the apparatus as in claim 3, wherein the capacitor (fig. 5, 436) is disposed nearer the first node (484) of the first switch (440) than the second node (504) of the first switch (440).
Regarding claim 8 – Kim teaches the apparatus as in claim 1 further comprising: a first heat sink (fig. 5, 544 [paragraph 0062] Kim states, “heat sinks, such as a first thermal substrate 544 is applied to the high side transistor 440 and a second thermal substrate 548 is applied to the low side transistor 444”) in contact with the first switch (440); a second heat sink (548) in contact with the second switch (548); and wherein an assembly of the first switch (440), the substrate (404), and the second switch (444) is disposed between the first heat sink (544) and the second heat sink (548).
Regarding claim 10 – Kim teaches the apparatus as in claim 1, wherein the first circuit path (fig. 5, 516) provides connectivity between a first node (504) of the first switch (440) and a first node (520) of the second switch (444); wherein a first portion (480) of the second circuit path (path including elements 532, 528 & 480) is operative to convey a first voltage to a first node (476) of the capacitor (436) and a second node (484) of the first switch (440; claimed structure shown in figure 5); and wherein a second portion (528) of the second circuit path is operative to convey a second voltage to a second node (536) of the capacitor (436) and a second node (524) of the second switch (444), the second voltage being a second voltage with respect to the first voltage (structure shown by Kim in figures 5 and 6 will have the required voltage function as claimed).
Regarding claim 12 – Kim teaches the apparatus as in claim 1, wherein the first circuit path (fig. 5, 516) provides connectivity between a first node (504) of the first switch (440) and a first node (520) of the second switch (444); wherein the second circuit path (path including elements 532, 528 & 480) includes a first portion (480), a second portion (532), and a third portion (528); wherein the first portion (480) of the second circuit path extends from a second node (484) of the first switch (440) to the second portion (532) of the second circuit path; wherein the second portion (532) of the second circuit path extends from the first surface (408) through the substrate (404) to the second surface (412) of the substrate (404) to the third portion (528); and wherein the third portion (528) of the second circuit path extends on the second surface (528 [paragraph 0059] Kim states, “A third trace 528 situated on the second surface 412 of the motherboard 404”) from the second portion (532) to the second node (524) of the second switch (444).
Regarding claim 13 – Kim teaches the apparatus as in claim 12, wherein the first portion (fig. 5, 480) of the second circuit path is disposed between the substrate (404) and the first switch (440); and wherein the third portion (528) of the second circuit path is disposed between the substrate (404) and the second switch (444).
Regarding claim 14 – Kim teaches the apparatus as in claim 1, wherein the substrate (fig. 5, 404) is disposed between the first switch (440) and the second switch (444).
Regarding claim 15 – Kim teaches the apparatus as in claim 1, wherein a first portion (fig. 5, 480) of the second circuit path (path including elements 532, 528 & 480) extends adjacent to the first switch (448); wherein a second portion (528) of the second circuit path extends adjacent to the second switch (444); and wherein at least a portion of the substrate (404) is disposed between the first portion (480) of the second circuit path and the second portion (528) of the second circuit path (claimed structure shown in figure 5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al.
Regarding claim 6 – Kim teaches the apparatus as in claim 5 further comprising: a controller (fig. 6, 628 [paragraph 0066] Kim states, “control signal from a controller 628”) operative to control switching operation of the first switch (604/440) and the second switch (612/444), the controlled switching operation operative to control a flow of current from the first circuit path (516) through a motor ([paragraph 0055] Kim states, “The motherboard 404 includes an output terminal 464 configured to be coupled to a load 472. In some examples, the load 472 includes a motor (e.g., an AC motor)”).
Kim fail so to explicitly teach wherein the motor has windings.
Official Notice is taken that windings within a motor is a conventional or well-known feature common to AC motors. Therefore, it would have been obvious to a person having ordinary skill in the art for the AC motor as taught by Kim to include the windings as this allows the motor to spin in a controlled and reliable manner when current is applied to the windings.
Regarding claim 11 – Kim teaches the apparatus as in claim 10 further comprising: a controller (fig. 6, 628 [paragraph 0066] Kim states, “control signal from a controller 628”) operative to control operation of the first switch (604/440) and the second switch (612/444) to produce an output current outputted from the first circuit path (516) to a motor ([paragraph 0055] Kim states, “The motherboard 404 includes an output terminal 464 configured to be coupled to a load 472. In some examples, the load 472 includes a motor (e.g., an AC motor)”).
Kim fail so to explicitly teach wherein the motor has first windings.
Official Notice is taken that windings within a motor is a conventional or well-known feature common to AC motors. Therefore, it would have been obvious to a person having ordinary skill in the art for the AC motor as taught by Kim to include the windings as this allows the motor to spin in a controlled and reliable manner when current is applied to the windings.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. in view of Fortin-Blanchette et al. (US PG. Pub. 2022/0377898).
Regarding claim 16 – Kim teaches the apparatus as in claim 1, wherein the second circuit path (figs. 5 & 6, path including elements 532, 528 & 480) is operative to support conveyance of temporary current flow during a transition of switching between a first mode and a second mode ([paragraph 0060] Kim states, “the control signals turn the high side transistor 440 and the low side transistor 444 on (e.g., operate in the linear or saturation region) or off (e.g., operate in the cut-off region)”; figure 6 shows the high side switches 604/608 and low side switches 612/616 that can be turned on and off and meet the limitation of a “first and second mode); wherein the first mode includes activation of the first switch (fig. 5, 440) and deactivation of the second switch (444).
Kim fails to teach to explicitly teach wherein the second mode includes deactivation of the first switch and a diode in the second switch operating in a forward bias state
Fortin-Blanchette teaches an apparatus (fig. 5 [title] Fortin-Blanchette states, “printed circuit board comprising a plurality of power transistor switching cells in parallel”) wherein the second mode includes deactivation of the first switch (100) and a diode (see diode symbol shown in figure 5 [paragraph 0031] Fortin-Blanchette states, “the power transistors 100 and 200 of FIG. 2 are represented with respective intrinsic body diodes 110 and 210. However, the design of the power switching cell of FIG. 2 is applicable to power transistors associated to respective external diodes (e.g. epitaxial diode) playing the role of the intrinsic body diodes”) in the second switch operating in a forward bias state (claimed structure will have the required functionality).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the apparatus having the first and second switch connected in series with a capacitor that are selectively turned on and off with a first and second mode as taught by Kim wherein the second mode includes deactivation of the first switch and a diode in the second switch operating in a forward bias state as taught by Fortin-Blanchette because Fortin-Blanchette states, “The switch control component 430 may also be configured (via the electrical control signal 431) to switch the two power transistors 100 and 200 OFF simultaneously. In this case, the circuit including the two power transistors 100 and 200 is in an idle state, where electrical current circulates through the diodes 110 and 210. The electrical voltage at the output terminal 30 depends on the electrical current circulating in an inductive load connected to the output terminal 30.” [paragraph 0038]. The diode allows current to flow in one direction and allows the switch to function in a reliable/predictable manner.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wu (US PG. Pub. 2013/0222045) discloses a semiconductor power modules and devices.
Waltrich et al. (US Patent 11637504) discloses a converter including an electrically isolating and thermally conductive layer.
McPherson et al. (US Patent 10212838) discloses a high power multilayer module having low inductance and fast switching for paralleling power devices.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN T SAWYER whose telephone number is (571)270-5469. The examiner can normally be reached M-F 8:30 am - 5pm.
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/STEVEN T SAWYER/Primary Examiner, Art Unit 2847
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