DETAILED ACTION
Response to Amendment
In view of the Appeal Brief filed on 07/31/26, PROSECUTION IS HEREBY REOPENED. A new ground of rejection is set forth below.
To avoid abandonment of the application, appellant must exercise one of the following two options:
(1) file a reply under 37 CFR 1.111 (if this Office action is non-final) or a reply under 37 CFR 1.113 (if this Office action is final); or,
(2) initiate a new appeal by filing a notice of appeal under 37 CFR 41.31 followed by an appeal brief under 37 CFR 41.37. The previously paid notice of appeal fee and appeal brief fee can be applied to the new appeal. If, however, the appeal fees set forth in 37 CFR 41.20 have been increased since they were previously paid, then appellant must pay the difference between the increased fees and the amount previously paid.
A Supervisory Patent Examiner (SPE) has approved of reopening prosecution by signing below:
/ANDREW J JUNG/Supervisory Patent Examiner, Art Unit 2175
Allowable Subject Matter
Claims 7, 12, and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and the outstanding double patenting rejection were overcome.
Double Patenting
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,977,900 in view of Fuller, US 2022/0318154 A1 (as cited in the IDS).
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Although the claims at issue are not identical, the differences are highlighted below:
Instant Application
US 11,977,900 B2
1. A method for managing undervoltage in a compute system, comprising:
detecting an alternating current ("AC") undervoltage condition in the compute system, the compute system comprising a plurality of power supplies providing shared power to the compute system; and
in response to detecting the AC undervoltage condition:
dynamically determining a present aggregate power output comprising a value indicating the amount of electricity presently being supplied by the plurality of power supplies at the time of the determining;
dynamically determining a holdup time as a function of the present aggregate power output;
beginning a monitoring period and determining a duration for the monitoring period as a function of the dynamically determined holdup time;
waiting for the monitoring period to expire; and
in response to the AC undervoltage condition persisting upon expiration of the monitoring period, performing a shutdown process.
1. A method for managing undervoltage in a compute system, comprising:
detecting an alternating current (“AC”) undervoltage condition in the compute system by
receiving a first indication from each of a plurality of power supplies for the compute system whether the respective power supply is receiving an input power within regulation;
receiving a second indication from each of the plurality of power supplies whether the respective power supply is providing an output power within regulation;
comparing a number of negative first indications to a number of positive second indications;
if the number of negative first indications matches the number of positive second indications, then determining that the AC undervoltage condition persists; and
if the number of negative first indications is less than the number of positive second indications, then determining that the AC undervoltage condition has resolved; and
in response to detecting the AC undervoltage condition:
dynamically determining a holdup time as a function of the present load of the compute system;
determining a monitoring period as a function of the dynamically determined holdup time;
waiting for the determined monitoring period to expire; and
in response to expiration of the determined monitoring period, perform a shutdown process if the AC undervoltage condition persists.
2. The method of claim 1, wherein:
dynamically determining the holdup time as the function of the present aggregate power output includes dynamically determining a holdup time for an asynchronous dynamic random access memory refresh ("ADR") as a function of the present aggregate power output; and
performing the shutdown process includes performing an ADR.
2. The method of claim 1, wherein:
dynamically determining the holdup time as the function of the present load includes dynamically determining a holdup time for an asynchronous dynamic random access memory refresh (“ADR”) as a function of the present load; and
performing the shutdown process includes performing an ADR.
Claim 1 of the instant application and Claim 1 of the ‘900 patent are both directed towards managing undervoltage of a compute system. However, Claim 1 of the ‘900 patent does not explicitly teach the compute system comprising a plurality of power supplies providing shared power to the compute system.
In the analogous art of power management, Fuller teaches the compute system comprising a plurality of power supplies providing shared power to the compute system [aggregate energy across multiple PSUs may be used to provide power to the system, par 59].
It would have been obvious to one of ordinary skill in the art, having the teachings of the ‘900 patent and Fuller before him before the effective filing date of the claimed invention, to incorporate the plurality of power supplies providing shared power as taught by Fuller, into the method as disclosed by the ‘900 patent, to ensure sufficient power to maintain the persistent state of data [Fuller, par 59].
Claims 10 and 16 of the instant application recite limitations similar to those of Claim 1 of the instant application, and so are rejected accordingly.
Claims 3-9, 11-15, and 17-20 of the instant application depend on Claims 1, 10, and 16 of the instant application, and similarly correspond to Claims 3-9, 11-15, and 17-20 of the ‘900 patent, and are rejected accordingly.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-6, 8-11, 13-17, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Fuller in view of Elliott et al., US 2008/0244283 A1.
Regarding Claim 1, Fuller discloses a method for managing undervoltage in a compute system [using controller 100, Fig. 1], comprising:
detecting an alternating current ("AC") undervoltage condition in the compute system, the compute system comprising a plurality of power supplies providing shared power to the compute system [aggregate energy across multiple PSUs may be used to provide power to the system, par 59]; and
in response to detecting the AC undervoltage condition [Fig. 2, 208; monitoring circuitry, process 200 may detect the loss of AC power (operation 208), par 49]:
dynamically determining a present aggregate power output comprising a value indicating the amount of electricity presently being supplied by the plurality of power supplies at the time of the determining [elements 102a – 102b; monitoring total energy available across all power supplies; i.e. PSUs, Fig. 1, par 59];
dynamically determining a holdup time as a function of the power output [estimating a total amount of ride-through time and hold-up time based on system load (operation 202). The ride-through time corresponds to an estimated amount of time that system 100 may operate without AC power while leaving sufficient energy to perform a cached flush and sequence down the power rails. The hold-up time corresponds to the amount of time to perform a full cache flush and sequence down the power rails given the system load … a time may be set based on the estimated ride-through time rather than a voltage/energy-based threshold; power management subsystem 104 accounts for runtime power load, which allows for variable ride-through and hold-up times to more efficiently and effectively use the stored energy, par 45, 46, 57].
However, Fuller does not explicitly teach beginning a monitoring period and determining a duration for the monitoring period as a function of the dynamically determined holdup time; waiting for the monitoring period to expire; and in response to the AC undervoltage condition persisting upon expiration of the monitoring period, performing a shutdown process.
Elliott teaches beginning a monitoring period and determining a duration for the monitoring period as a function of the dynamically determined holdup time; waiting for the monitoring period to expire; and in response to the AC undervoltage condition persisting upon expiration of the monitoring period, performing a shutdown process [calculating a PLD filter time (monitoring period) based on holdup capacitance time; a maximum Power (or Pulse) Line Disturbance (PLD) time period, i.e. a PLD filter time, that may be tolerated by the system before a system notification of an impending power loss is sent to the data processing device/system's management module (waiting the maximum period of time); upon notification of an imminent power loss, the management module may initiate operations in the associated subsystems by quiescing input/output operations (in response to an undervoltage condition, commence shut down operations), par 28, 19, 53].
It would have been obvious to one of ordinary skill in the art, having the teachings of Fuller and Elliott before him before the effective filing date of the claimed invention, to incorporate the monitoring of power loss as taught by Elliott, into the method as disclosed by Fuller, to guarantee data will be retrievable even if there is a power outage [Elliott, par 7].
Regarding Claim 2, Fuller and Elliott disclose the method of Claim 1. Fuller further discloses wherein dynamically determining the holdup time as the function of the present aggregate power output includes dynamically determining a holdup time for an asynchronous dynamic random access memory refresh ("ADR") as a function of the present aggregate power output [estimating a total amount of ride-through time and hold-up time based on system load (operation 202). The ride-through time corresponds to an estimated amount of time that system 100 may operate without AC power while leaving sufficient energy to perform a cached flush and sequence down the power rails. The hold-up time corresponds to the amount of time to perform a full cache flush and sequence down the power rails given the system load. … process 200 programs one or more energy thresholds based on the estimated ride-through time and hold-up time (operation 204)… a time may be set based on the estimated ride-through time rather than a voltage/energy-based threshold.’ i.e. during the interval between a/c power failure and when the hold-up time threshold is crossed, the system monitors power and a/c ok signals; elements 206-208 and 210-216, Fig. 2; par 45, 46, 72]; and performing the shutdown process includes performing an ADR [220, 222, Fig. 2].
Regarding Claim 3, Fuller and Elliott disclose the method of Claim 1. Fuller further discloses wherein the value indicates the amount of electricity presently being supplied by the plurality of power supplies in terms of a percentage of a rated load for the plurality of power supplies [elements 410, 414, and 416; when PSU 402 asserts a vwarn signal, then power management subsystem 408 may decrement energy counter 410 at a rate proportional to the number of PSUs in the system and the maximum load per supply. Energy counter 412 is managed independently of energy counter 410 (the vwarn signals from PSUs do not trigger the count on unassociated counters for other PSUs) and is decremented responsive to PSU 404 asserting a vwarn signal. Power management subsystem 408 includes adder 414, which sums together the estimated energy counts for the PSUs to compute aggregate energy counter 416, Fig. 4; par 73].
Regarding Claim 4, Fuller and Elliott disclose the method of Claim 3. Fuller further discloses wherein determining the present aggregate power output includes: receiving from each of the plurality of power supplies, an individual power output indication indicating the amount of electricity presently being supplied by the respective power supply in terms of the percentage of the rated load powered by the respective power supply; and summing the individual power output indications [elements 410, 414, and 416; when PSU 402 asserts a vwarn signal, then power management subsystem 408 may decrement energy counter 410 at a rate proportional to the number of PSUs in the system and the maximum load per supply. Energy counter 412 is managed independently of energy counter 410 (the vwarn signals from PSUs do not trigger the count on unassociated counters for other PSUs) and is decremented responsive to PSU 404 asserting a vwarn signal. Power management subsystem 408 includes adder 414, which sums together the estimated energy counts for the PSUs to compute aggregate energy counter 416, Fig. 4; par 73].
Regarding Claim 5, Fuller and Elliott disclose the method of Claim 1. Fuller further discloses wherein determining the duration of the monitoring period as a function of the dynamically determined holdup time includes determining the duration to be equal to monitoring period as the dynamically determined holdup time less a response time for a first indication from each of a plurality of power supplies for the compute system [each PSU may provide separate acok signals (not shown) to power management subsystem 408. These signals may be independently de-asserted by the individual PSUs when AC power is lost to signal which PSU lost power, par 72] whether the respective power supply is receiving an input power within regulation and less a period for performing the shutdown process [‘estimating a total amount of ride-through time and hold-up time based on system load (operation 202). The ride-through time corresponds to an estimated amount of time that system 100 may operate without AC power while leaving sufficient energy to perform a cached flush and sequence down the power rails. The hold-up time corresponds to the amount of time to perform a full cache flush and sequence down the power rails given the system load. … process 200 programs one or more energy thresholds based on the estimated ride-through time and hold-up time (operation 204)… a time may be set based on the estimated ride-through time rather than a voltage/energy-based threshold; i.e. during the interval between a/c power failure and when the hold-up time threshold is crossed, the system monitors power and a/c ok signals, 206-208, 210-216, Fig. 2; par 45, 46].
Regarding Claim 6, Fuller and Elliott disclose the method of Claim 1. Fuller further discloses throttling selected operations of the compute system [while running in the first operating mode, system components may be powered using the energy in the PSU bulk capacitors. In some embodiments, power may be provided as if AC had not been disrupted. In other embodiments, power saving adjustments may be made within system 100. For example, processor frequency may be throttled, par 51]; and wherein: determining the duration of the monitoring period as a function of the dynamically determined holdup time includes dynamically determining the duration of the monitoring period as a function of the dynamically determined holdup time after throttling the selected operations [power management subsystem 104 accounts for runtime power load, which allows for variable ride-through and hold-up times to more efficiently and effectively use the stored energy, par 57, 45].
Regarding Claim 8, Fuller and Elliott disclose the method of Claim 1. Fuller further discloses during the monitoring period, monitoring the AC undervoltage condition; and in response to the AC undervoltage condition being resolved prior to expiration of the determined monitoring period, continuing or returning to normal operations [200, 206, 208, Fig. 2; par 44].
Regarding Claim 9, Fuller and Elliott disclose the method of Claim 1. Elliott teaches the determining the expiration of the monitoring period [a maximum Power (or Pulse) Line Disturbance (PLD) time period, i.e. a PLD filter time, that may be tolerated by the system before a system notification of an impending power loss is sent to the data processing device/system's management module (waiting the maximum period of time), par 28, 19, 53], and Fuller further discloses continuing or returning to normal operations if the AC undervoltage condition is resolved upon end of the monitoring period [operations 202 and 204 may be performed during a boot sequence for system 100; i.e. after the system has power it may be rebooted and the monitoring process begins again, Fig. 2; par 44, 47].
Regarding Claim 10, Fuller discloses a controller comprising a processing resource and a memory in communication with the processing resource [CPU 116 and the associated system firmware, operating system, and memory subsystem, Fig. 1]. The remainder of Claim 10 recites limitations similar to those of Claim 1, and are rejected accordingly.
Regarding Claims 11, 13-15, Fuller and Elliott disclose the controller of Claim 10. Claims 11 and 13-15 recite limitations similar to those of Claims 2, 4, 8, and 9, and are rejected accordingly.
Regarding Claim 16, Fuller discloses a compute system [Fig. 1], comprising: a controller including a processing resource and a memory encoded with instructions [CPU 116 and the associated system firmware, operating system, and memory subsystem, Fig. 1].
Elliott teaches a compute system [100, Fig. 1A], comprising: a plurality of computational nodes [processor blade 0, 1]; and a power subsystem configured to receive an alternating current (“AC”) power input and including a plurality of power supplies configured to provide shared power to the computational nodes [power supply module 160, 162].
The remainder of Claim 16 recites limitations similar to those of Claim 1, and is rejected accordingly.
Regarding Claims 17, 19, and 20, Fuller and Elliott disclose the compute system of Claim 16. Claims 17, 19, and 20 recite limitations similar to those of Claims 2, 4, and 8, respectively, and are rejected accordingly.
Response to Arguments
Applicant’s arguments, filed 07/30/26, with respect to the rejections of claims 1, 10, and 16 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground of rejection is made in view of Elliott et al., as presented above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL J YEN whose telephone number is (571)270-5047. The examiner can normally be reached M-F 8-5 PT.
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/Paul Yen/Primary Examiner, Art Unit 2175
Prosecution Insights