Detailed Action
Summary
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1.This office action is in response to the application filed on April 09. 2024.
2. Claims 1-11 are pending and has been examined.
Drawings
3. Drawings submitted on 04/09/2024 are acceptable.
Claim Objections
4. Claims 1-2, 4,6-7 and 9-11 are objected to because of the following informalities:
Claims 1 and 6 recite switch control “circuity” in lines 7 and 5, respectively have a "typographical error should be “circuitry”.
Claims 1 and 6 recite “an output node” in lines 10 and 8, repetitively should be “the output node.
Claims 2 and 7 recite “the input voltage” in line 2.There are insufficient antecedent basis for these claim limitations.
Claims 4 and 9 recite “the current sensing resistor” in line 1. There are insufficient antecedent basis for these claim limitations.
Claim 6 recites “a switch control signal” in line 4 should be “the switch control signal”.
Claim 10 recites “a power factor correction converter” in line 10 should be “the power factor correction converter”.
Claim 11 recites “a power factor correction converter” in line 1 should be “the power factor correction converter”.
Claims 3 and 5 depend from claim 1, thus are also objected because of their dependency.
Claim 8 depend from claim 6, thus is also objected because of its dependency.
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2,4-7 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang “20160322907” in a view of “ Hwang “2003/0222633”. Hereafter Hwang “2907” and Hwang “2633”.
In re to claim 1, Hwang “2907”discloses a switching power supply (Figs. 1-9 shows a switching power supply) comprising power factor correction converter (Fig. 1 shows a PFC stage 102) , the power factor correction converter (102) comprising:
a switch (Fig .2 shows a switch QA and QB) configured to modulate an input current (input current from AC) received from a rectified alternating-current supply (Vrec) to form an output voltage across an energy storage element (inductor LA) in response to a switch control signal (PFC controller 108 is configured to control signals of QA and QB);
switch control circuitry (Fig. 3) configured to generate the switch control signal wherein the switch control circuity (PFC controller 108 is configured to generated control signal to turn ON and OFF of switches QA and QB) comprises:
a gain modulator (gain modulator 116) configured to combine an output voltage error signal (VEAO) with an instantaneous input voltage sensing signal (IAC) and the gain modulator having an output node (connection node of between resistor Rmd1 and output of 116) and a comparator (PFC comp) configured to compare the voltage at the output node (output of GM1) to a ramp signal (Ramp generator 120) to form a switch modulation signal that controls timing of the switch control signal (driver/logic 124 is configured to modulate a control signal to the switches QA and QB).
However, Hwang “2904” fails to discloses a an input current sensor configured to draw a current signal from an output node of the gain modulator, wherein the current signal is representative of an instantaneous input current sensing signal, thereby a voltage at the output node is representative of the instantaneous input voltage sensing signal, the instantaneous input current sensing signal and the output voltage error signal.
Whereas, Hwang “2633” discloses a switching power supply (Figs. 1-6) having an input current sensor configured to draw a current signal from an output node of the gain modulator (Figs. 1 and 4 shows of an amplifier 116 is negative terminal is coupled to drawn VA signal and cause to flow into the negative terminal of AMP 116 thru R4 is a representative of VSENSE . Thus, a combination of AMP116 and switch SW3 are equivalent to input current sensor) , wherein the current signal is representative of an instantaneous input current sensing signal (Isense, current flow thru resistor R3 to the negative terminal of AMP 116), thereby a voltage at the output node is representative of the instantaneous input voltage sensing signal (VA signal which representative of VSENSE) , the instantaneous input current sensing signal (Isens , current flow thru resistor R3) and the output voltage error signal (comparator 120 is coupled to receive signal VC from a ramp generator 122. The ramp generator 122 receives the error signal VEAO as an input and integrates the signal VEAO, see prag. 0036).
Therefore, it would have obvious to one of ordinary skilled person in the art before the effective filing date of the claimed invention to have replaced the Amplifier GM1 of Hwang “2904” with Opamp 116, SW3 and summing element 118 as taught by Hwang “2633” because the PFC signal allows the switch controller to modulate current from the power source to be substantially in phase with the voltage of the AC power source, thus this leads to the advantage of improved efficiency and reliability of the switching power supply, see abstract and parg.0017.
In re to claim 2, Hwang “2907” as modified discloses (Figs. 1-9) wherein the switch control circuitry (Fig. 3) is configured to regulate the output voltage (Vout) and to maintain the input voltage and the input current in phase (see prag.0003 and 0036).
In re to claim 4, Hwang “2907” as modified discloses (Figs. 1-9) wherein a value of the current sensing resistor is selected according to power supplied by the power factor correction converter to improve efficiency (Fig. 3 shows a resistor Rmd1 and the RMd1 is selected based on the intended purpose for specific reason or goal for acquiring a desired outcome). Furthermore, Hwang “2633” shows sensing resistor R3.
In re to claim 5, Hwang “2907” as modified discloses (Figs. 1-9) further comprising a DC-to-DC converter stage coupled to receive the output voltage of the power factor correction converter (Fig. 1 shows a DC to DC converter 104 is coupled to receive the output voltage of the power factor correction converter).
In re to claim 6, Hwang “2907”discloses a controller for a power factor correction converter (Figs. 2-3 shows PFC controller 108) , comprising: switch control circuitry (Fig. 3) configured to generate a switch control signal (PFC controller 108 is configured to generated control signal to turn ON and OFF of switches QA and QB) for modulating an input current received from a rectified alternating-current supply (Vrec) to form an output voltage across an energy storage element (inductor LA) in response to a switch control signal (control signals of QA and QB), wherein the switch control circuity comprises:
a gain modulator (gain modulator 116) configured to combine an output voltage error signal (VEAO) with an instantaneous input voltage sensing signal (IAC) and the gain modulator having an output node (connection node of between resistor Rmd1 and output of 116) and a comparator (PFC comp) configured to compare the voltage at the output node (output of GM1) to a ramp signal (Ramp generator 120) to form a switch modulation signal that controls timing of the switch control signal (PFC controller 108 configured to modulate a control signal to the switches QA and QB).
However, Hwang “2904” fails to discloses a an input current sensor configured to draw a current signal from an output node of the gain modulator, wherein the current signal is representative of an instantaneous input current sensing signal, thereby a voltage at the output node is representative of the instantaneous input voltage sensing signal, the instantaneous input current sensing signal and the output voltage error signal.
Whereas, Hwang “2633” discloses a switching power supply (Figs. 1-6) having an input current sensor configured to draw a current signal from an output node of the gain modulator (Figs.1 and 4 shows of an amplifier 116 is negative terminal is coupled to drawn signal of VA and cause to flow to the negative terminal of AMP 116 thru R4 is a representative of VSENSE . Thus, a combination of AMP116 and switch SW3 are equivalent to input current sensor) , wherein the current signal is representative of an instantaneous input current sensing signal (Isense, current flow thru resistor R3 to the negative terminal of AMP 116), thereby a voltage at the output node is representative of the instantaneous input voltage sensing signal (VA the signal IAC with the signal VA which representative of VSENSE) , the instantaneous input current sensing signal (Isens , current flow thru resistor R3) and the output voltage error signal (comparator 120 is coupled to receive signal VC from a ramp generator 122. The ramp generator 122 receives the error signal VEAO as an input and integrates the signal VEAO, see prag. 0036).
Therefore, it would have obvious to one of ordinary skilled person in the art before the effective filing date of the claimed invention to have replaced the Amplifier GM1 of Hwang “2904” with Opamp 116, SW3 and summing element 118 as taught by Hwang “2633” because the PFC signal allows the switch controller to modulate current from the power source to be substantially in phase with the voltage of the AC power source, thus the power source to be substantially in phase with the voltage of the AC power source leads to the advantage of improved efficiency and reliability of the switching power supply, see abstract and prag.0017.
In re to claim 7, Hwang “2907” as modified discloses (Figs. 1-9) wherein the switch control circuitry (Fig. 3) is configured to regulate the output voltage (Vout) and to maintain the input voltage and the input current in phase (see prag.0003 and 0036).
In re to claim 9, Hwang “2907” as modified discloses (Figs. 1-9) wherein a value of the current sensing resistor is selected according to power supplied by the power factor correction converter to improve efficiency (Fig. 3 shows resistor Rmd1 and Rmd1 is selected based on the intended purpose for specific reason or goal for acquiring a desired outcome).
Furthermore, Hwang “2633” shows sensing resistor R3.
Allowable Subject Matter
6. Claim 3 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter.
Claim 3 , the prior art of record fails to disclose or suggest switching power supply including the limitation of “a transistor having a first controlled terminal, a second controlled terminal and a control terminal; and an amplifier having a first input terminal coupled to a ground node, a second input terminal coupled to a current sensing resistor and an output terminal coupled to the control terminal of the transistor.”
Claim 8 , the prior art of record fails to disclose or suggest PFC converter including the limitation of “a transistor having a first controlled terminal, a second controlled terminal and a control terminal; and an amplifier having a first input terminal coupled to a ground node, a second input terminal coupled to a current sensing resistor and an output terminal coupled to the control terminal of the transistor.”
7. Claims 10-11 is allowed .
The following is an examiner’s statement of reasons for allowance:
Claim 10 is allowed because the prior art of record fails to disclose or suggest the input current sensor for a PFC including the limitation of “a transistor having a first controlled terminal, a second controlled terminal and a control terminal; and an amplifier having a first input terminal coupled to a ground node, a second input terminal coupled to a current sensing resistor and an output terminal coupled to the control terminal of the transistor, wherein the input current sensor is configured to draw a current signal from an output node of a gain modulator, wherein the current signal is representative of an instantaneous input current sensing signal, the instantaneous input current sensing signal being representative of an input current for a power factor correction converter. ”
Claim 11 depend from claim 10, thus is also allowed because of its dependency.
In regards to the allowable subject matter of claims 3 and 8 and the allowed claims 10-11 listed above, a combination of Hwang “2907” and Hwang “2633” discloses the PFC converter and gain modulator. Furthermore, Hwang “2633” discloses wherein transistor (SW3) having a first controlled terminal (SW3 terminal coupled to RAC) , a second controlled terminal (SW3 terminal coupled to 118) and a control terminal (SW3 terminal coupled to VREFOK) ; and an amplifier (116) having a first input terminal coupled to a ground node (ground) , a second input terminal coupled to a current sensing resistor (R3) and an output terminal (output of 116), wherein the input current sensor (R4) is configured to draw a current signal from an output node (VA node) of a gain modulator (Hwang “2907” shows gain Mod 116), wherein the current signal is representative of an instantaneous input current sensing signal (Isense, current flow thru resistor R3 to the negative terminal of AMP 116), thereby a voltage at the output node is representative of the instantaneous input voltage sensing signal (VA the signal IAC with the signal VA which representative of VSENSE) , the instantaneous input current sensing signal (Isens , current flow thru resistor R3) and the output voltage error signal (combined signal VA’) but fails to discloses the amplifier output terminal is coupled to the control terminal of the transistor.
The art of record does not disclose the above limitations, nor would it be obvious to modify the art of record so as to include either of the above limitations.
Conclusion
8. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hwang “20240348177” discloses a switching power supply comprises a first power supply stage configured to receive an AC input voltage and to generate a DC output voltage, wherein the DC output voltage of the first power supply stage is set to a first target level during a light load condition and, otherwise, the output voltage is set to a second target level, the second target level being lower than the first target level.
Hwang “ 9438119” the present invention relates to the field of power supplies. More particularly, the present invention relates to the field of switching power supplies.
Hwang “6657417” the present invention relates to the field of switching power supplies. More particularly, the present invention relates to switching power supplies that perform power factor correction using a carrier control and input voltage sensing.
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/SISAY G TIKU/
Primary Examiner, Art Unit 2838