DETAILED ACTION
This office action is in response to the application filed on 4/9/24.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claim 12 is objected to because of the following informalities:
In regards to claim 12, line 4, it appears that “of first power supply stage” should be “of the first power supply stage”.
Double Patenting
A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957).
A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101.
Claims 1 and 2 are provisionally rejected under 35 U.S.C. 101 as claiming the same invention as that of claims 1 and 2 of copending Application No. 18630906 (reference application, published as US20240348177, hereinafter ‘906). This is a provisional statutory double patenting rejection since the claims directed to the same invention have not in fact been patented.
Regarding claim 1, ‘906 claims “A switching power supply comprising: a first power supply stage configured to receive an AC input voltage and to generate a DC output voltage, wherein the DC output voltage of the first power supply stage is set to a first target level (identical to alternatively claimed “a second target level”) during a first load condition (non light load) and, otherwise (light load), the output voltage is set to a second target level (alternatively claimed “first target level”), the second target level being higher than the first target level.” (The Examiner notes the different verbiage of “first target level” (correlated to a light load) is interpreted as synonymous with “second target level” (corelated to “non light load, therefore the claims are identical).
Regarding claim 2, ‘906 (Claim 2) claims “The switching power supply according to claim 1, wherein the first power supply stage performs power factor correction and further comprising a second power supply stage configured to receive the DC output voltage from the first power supply stage and the second power supply stage being configured to generate a DC output voltage for the second power supply stage.”
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-8, 12-19 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hwang (US20160322907).
Regarding Claim 1, Hwang discloses (fig. 1-3) a switching power supply comprising: a first power supply stage (102) configured to receive an AC input voltage (Vac) and to generate a DC output voltage (Vdc), wherein the DC output voltage of the first power supply stage is set to a first target level during a first load condition (¶31, light load) and, otherwise, the output voltage is set to a second target level, the second target level being higher than the first target level (¶31, steady state).
Regarding Claim 2, Hwang discloses (fig. 1-3) the first power supply stage (102) performs power factor correction (¶32) and further comprising a second power supply stage (104) configured to receive the DC output voltage from the first power supply stage and the second power supply stage being configured to generate a DC output voltage for the second power supply stage (¶34-35).
Regarding Claim 3, Hwang discloses (fig. 1-3) a level of power provided to the second power supply stage by the first power supply stage is monitored (VFB) to determine whether the switching power supply is operating in accordance with the first load condition or the second load condition (¶35).
Regarding Claim 4, Hwang discloses (fig. 1-3) when the level of power provided to the second power supply stage by the first power supply stage is below a threshold, the switching power supply operates in accordance with the first load condition (light load/power saving/”kick”, ¶35).
Regarding Claim 5, Hwang discloses (fig. 1-3) when the level of power provided to the second power supply stage by the first power supply stage exceeds the threshold, the switching power supply operates in accordance with the second load condition (¶32).
Regarding Claim 6, Hwang discloses (fig. 1-3) the threshold is adjusted in accordance with hysteresis (¶35).
Regarding Claim 7, Hwang discloses (fig. 5) the second power supply stage comprises a resonant circuit (Lr, Cr) having a resonant frequency and wherein the first target level (light load) causes switching in the second power supply stage to occur at the resonant frequency when the level of power reaches a first expected level during the first load condition (¶35).
Regarding Claim 8, Hwang discloses (fig. 5) the second target level causes switching in the second power supply stage to occur at the resonant frequency when the level of power reaches a second expected level during the second load condition (¶35).
Regarding Claim 12, Hwang discloses (fig. 1-3) the DC output voltage of the first power supply stage is regulated using a negative feedback loop and wherein an error signal (VEAO) representative of a difference between a current target level for the output voltage of first power supply stage and a monitored level of the output voltage of first power supply stage is used to control switching in the first power supply stage (¶35, 43).
Regarding Claim 13, Hwang discloses (fig. 1-3) the error signal is monitored to determine whether the switching power supply is operating in accordance with the first load condition or the second load condition (¶48).
Regarding Claim 14, Hwang discloses (fig. 1-3) a controller (108, fig. 3) for switching power supply, the controller comprising: a power factor correction controller (108) configured to control a power factor correction circuit arrangement (102) to generate a regulated DC output voltage for provision to a resonant switching converter (104, fig. 5) having a resonant switching frequency, wherein a level of the regulated DC output voltage is adjusted according to a level of power provided to the switching power converter in order to maintain a switching frequency of the resonant switching converter at or near the resonant frequency (¶35); and a detector circuit arrangement coupled to the power factor correction controller and configured to detect a level of power drawn by the switching power converter in order to adjust the level of the regulated DC output (¶34-35).
Regarding Claim 15, Hwang discloses (fig. 1-3) the power factor correction circuit arrangement is configured to generate an error signal (VEAO) wherein the error signal is representative of a difference between a current target level for the regulated DC output voltage and a monitored level of the DC output voltage (¶35, 43).
Regarding Claim 16, Hwang discloses (fig. 1-3) the detector circuit arrangement monitors the error signal for detecting the level of power drawn by the switching power converter (¶48).
Regarding Claim 17, Hwang discloses (fig. 1-3) the detector circuit arrangement comprises a hysteresis comparator configured to compare the error signal to a reference voltage level (¶35).
Regarding Claim 18, Hwang discloses (fig. 1-3) the error signal is generated by a transconductance amplifier (GMv) and is used to modulate switching in the power factor correction converter and further wherein the level of the regulated DC output voltage is adjusted by adjusting a reference voltage applied to the transconductance amplifier (¶43).
Regarding Claim 19, Hwang discloses (fig. 1-3) the error signal is generated by a transconductance amplifier and is used to modulate switching in the power factor correction converter and further wherein the level of the regulated DC output voltage is adjusted by activating a current source coupled to the transconductance amplifier (¶45).
Regarding Claim 21, Hwang discloses (fig. 1-3) comprising a first power supply stage (102) configured to generate the regulated DC output voltage (Vdc) and further comprising a second power supply stage (104) configured to receive the DC output voltage from the first power supply stage and the second power supply stage being configured to generate a DC output voltage for the second power supply stage (Vo).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9-11 are rejected under 35 U.S.C. 103(a) as being unpatentable over Hwang.
Regarding Claim 9, Hwang does not disclose the second expected level is approximately twice the first expected level.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hwang to include setting expected levels at twice the first expected level since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Regarding Claim 10, Hwang does not disclose the first target level is approximately 380 volts DC.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hwang to include setting the first target level at 380 volts since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Regarding Claim 11, Hwang does not disclose the second target level is approximately 400 volts DC.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hwang to include setting the second target level at 400 volts since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Allowable Subject Matter
Claim 20 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 20, the prior art fails to disclose: “...an input current supplied to the power factor correction converter is monitored to modulate switching in the power factor correction converter and further wherein the level of the regulated DC output voltage is adjusted by adjusting a resistance value used to monitor the input current.” in combination with the additionally claimed features, as are claimed by the Applicant.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 10048730, Li; Hongping discloses systems and methods for rectifying a voltage using an embedded direct-current-to-direct-current converter.
US 20080136342, Tamegai; Yoichi et al. discloses a DC/DC converter control circuit.
US 20140043866, Zhao; Chen et al. discloses a high efficiency and low loss AC-DC power supply circuit and control method.
US 9178439, Hwang; Jeffrey et al. discloses a system and method for limiting output current in a switching power supply.
US 9866108, Mayell; Robert J. et al. discloses a PFC shutdown circuit for light load.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KYLE J MOODY whose telephone number is (571)272-5242. The examiner can normally be reached on M-F 10 AM - 4 PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached on 571-272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KYLE J MOODY/
Primary Examiner, Art Unit 2838