DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see 8, filed 4/23/26, with respect to claims 15-17 have been fully considered and are persuasive. The 35 U.S.C. 101 rejection has been withdrawn.
Applicant's arguments filed 4/23/26 have been fully considered but they are not persuasive.
Regarding applicant’s argument for claim 1, on pages 8 and 9, that Itagaki fails to disclose satellite stripe tasks, examiner disagrees. Applicant’s own specification (paragraph 22 of the publication) suggests that a satellite stripe task is merely one sent to a different processor with logic provided for any dependencies of the particular task. Itagaki specifically discloses parallel processing with some tasks sent to a GPU while organizing the GPU tasks (i.e. satellite tasks) around their dependencies. Therefore the argument is overcome and the previous rejection remains.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
1) Claim(s) 1, 3-15, 17, 18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. patent application publication 2021/0096784 by Kailey et al., and further in view of U.S. patent 11,257,178 by Itagaki et al.
2) Regarding claim 1, Kailey teaches a printing system comprising: at least one physical memory device having a plurality of task queues; and a first processor (paragraph 57; a processor) to: generate an image manager task for each of a plurality of sheetside images in print data; store each image manager task in a first task queue (figure 3; paragraph 31; tasks are queued based on sheet images as shown in figure 5B); process each of the image manager tasks via a first set of processing threads associated with the first task queue to generate a corresponding plurality of stripe tasks and satellite stripe tasks (figure 5B; paragraph 36; “stripe” queue is created with a plurality of task threads, the distinction between a “stripe” thread [i.e. local processor task] and a “satellite” thread [i.e. task performed on a different processor] is illuminated by Itagaki below); store each of the plurality of stripe tasks in a second set of task queues (figure 5B, item 324; paragraph 36; second task queue), wherein each task queue in the second set of task queues corresponds to an image manager task (figure 5B; each second task queue corresponds to an image thread); process each of the plurality of stripe tasks via a second set of processing threads to generate a plurality of first processed stripes (paragraph 39; stripe threads are processed);
Kailey does not specifically teach transmitting the plurality of satellite stripe tasks and the first processed stripes to a second processor for second processing.
Itagaki teaches transmitting the plurality of satellite stripe tasks and the first processed stripes to a second processor for second processing (column 6, lines 15-24; second processor can receive image data [i.e. “satellite” data] and task from a first processor, the task can be a dependent one [i.e. the received data is previously processed by a prior task] as disclosed in column 8, lines 33-46 and column 10, lines 7-27).
NOTE: Itagaki can modify the task queues of Kailey such that some dependent tasks are transmitted to a second processor.
Kailey and Itagaki are combinable because they are both from the print data processing field of endeavor.
It would have been obvious to a person of ordinary skill in the art at the time the invention was effectively filed to combine Kailey with Itagaki to add a second processor processing dependent tasks. The motivation for doing so would have been “to enable faster speeds of image processing” (column 1, line 60). Therefore it would have been obvious to combine Kailey with Itagaki to obtain the invention of claim 1.
3) Regarding claim 3, Itagaki (as combined with Kailey in the rejection of claim 1 above) teaches the system of claim 1, further comprising the second processor to receive the plurality of satellite stripe tasks and the first processed stripes (column 6, lines 15-24; second processor can receive image data [i.e. “satellite” data] and task from a first processor, the task can be a dependent one [i.e. the received data is previously processed by a prior task] as disclosed in column 8, lines 33-46 and column 10, lines 7-27; plurality of dependent tasks shown in figure 13B).
4) Regarding claim 4, Itagaki (as combined with Kailey in the rejection of claim 1 above) teaches the system of claim 3, wherein the second processor including a third set of task queues to store each of the plurality of satellite stripe tasks and process the first processed stripes based on the plurality of satellite stripe tasks to generate a plurality of second processed stripes, wherein each task queue in the third set of task queues corresponds to one of the image manager tasks (figure 13B; column 14, lines 42-55; tasks sent to second processor are queue for processing in a particular order and may be dependent upon previously processed data as detailed above).
5) Regarding claim 5, Itagaki (as combined with Kailey in the rejection of claim 1 above) teaches the system of claim 4, wherein the second processor comprises a plurality of satellite threads to perform the second processing on the plurality of first processed stripes stored in the third set of task queues (figure 13C; column 15, lines 1-16; plurality of asynchronous processing calls can be made to the second processor simultaneously [i.e. a plurality of threads]).
6) Regarding claim 6, Kailey teaches the system of claim 5, wherein the first processor processing the image manager task further comprises storing each of a plurality of stripe tasks associated with the image manager task in a first of the second set of task queues, generating one or more metadata structures during processing of the set of stripe tasks, generating one or more synchronization barrier tasks and storing the one or more synchronization barrier tasks in the first of the second set of task queues (paragraphs 42 and 43; metadata and synch data is generated for the tasks).
7) Regarding claim 7, Kailey teaches the system of claim 6, wherein the one or more metadata structures comprises an image identifier and information regarding a quantity of stripe tasks and satellite stripe tasks associated with an image manager task (paragraph 42; number of synch tasks equals the number of threads).
8) Regarding claim 8, Itagaki (as combined with Kailey in the rejection of claim 1 above) teaches the system of claim 3, wherein the second processor further determines if a portion of the first processed stripe is a dependent portion, and if so, waits for a prerequisite first processed stripe prior to beginning second processing on the portion (column 11, lines 1-12; column 9, line 65 – column 10, line 27; figure 5; particular dependent processing [can be sent to second processor 12B] task does not begin [i.e. it waits] until prerequisite processing has been resolved).
9) Regarding claim 9, Itagaki (as combined with Kailey in the rejection of claim 1 above) teaches the system of claim 8, wherein if the second processor determines that the portion is not a dependent portion, second processing of the portion proceeds without waiting for the prerequisite first processed stripe (column 15, lines 1-15; figure 13C; tasks can asynchronously run in parallel on the second processor).
10) Regarding claim 10, Itagaki (as combined with Kailey in the rejection of claim 1 above) teaches the system of claim 8, wherein the second processor determines if the portion is a dependent portion based on information in one or more metadata structures (column 10, lines 21-27; tasks can be “appended with a dependency” this is a form of metadata as it is not the image data itself to be processed).
11) Regarding claim 11, Kailey (as combined with Itagaki in the rejection of claim 1 above) teaches the system of claim 4, wherein the second processor generates a satellite done message upon determining that the second processed stripe is a final second processed stripe (paragraph 47; side done message can be sent when a thread is completed, this could be applied to the threads running on the second processor as disclosed by Itagaki).
12) Regarding claim 12, Kailey (as combined with Itagaki in the rejection of claim 1 above) teaches the system of claim 11, wherein the satellite done message includes a pointer to the one or more metadata structures to indicate that the second processing of the satellite stripe tasks associated with the image manager task has been completed (paragraph 47; metadata is included in the message, thus it is “pointed” to).
13) Regarding claim 13, Itagaki (as combined with Kailey in the rejection of claim 1 above) teaches the system of claim 1, wherein the image manager task receives a satellite done message from the second processor prior to completing processing of the corresponding one of the sheetside images (figure 13C; task done messages are sent from secondary processor back to the main processor).
14) Regarding claim 14, Kailey teaches the system of claim 1, further comprising a printer to print the plurality of sheetside images (figure 1, item 160; a printer).
15) Claims 15 and 17 are taught in the same manner as described in the rejections of claims 1 and 3 above, respectively.
16) Claims 18 and 20 are taught in the same manner as described in the rejections of claims 1 and 3 above, respectively.
17) Claim(s) 2, 16 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. patent application publication 2021/0096784 by Kailey et al., and further in view of U.S. patent 11,257,178 by Itagaki et al. as applied to the rejection of claim 1 above, and further in view of U.S. patent application publication 2013/0057563 by Persson.
18) Regarding claim 2, Kailey does not specifically teach the system of claim 1, wherein the first processor further receives a processor resource space allocation complete message from the second processor prior to transmitting the plurality of first processed stripes (paragraph 33 and 34 disclose allocating appropriate task processing space but fails to disclose a ready message).
Persson teaches the system of claim 1, wherein the first processor further receives a processor resource space allocation complete message from the second processor prior to transmitting the plurality of first processed stripes (paragraphs 6 and 8; GPU notifies a CPU that it is ready to receive commands).
Kailey and Persson are combinable because they are both from the parallel processing field of endeavor.
It would have been obvious to a person of ordinary skill in the art at the time the invention was effectively filed to combine Kailey with Persson to add a GPU ready message. The motivation for doing so would have been so that GPU time can be allocated equitably (paragraph 8). Therefore it would have been obvious to combine Kailey with Itagaki and Persson to obtain the invention of claim 2.
19) Claims 16 and 19 are taught in the same manner as described in the rejection of claim 2 above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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BENJAMIN O. DULANEY
Primary Examiner
Art Unit 2676
/BENJAMIN O DULANEY/Primary Examiner, Art Unit 2683
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