DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 7-14, and 16-20 is/are rejected under 35 U.S.C. 102(a) as being anticipated by Au (US 20140036973 A1).
Regarding claim 1, Au teaches an apparatus for wireless communication (Au discloses a wireless transceiver 100 / 100A, fig. 2, para. 0011-16), comprising:
a transmitter path including a first transmit amplifier (Au discloses a power amplifier (PA) 122 in the transmitter path, fig. 2, para. 0011-16);
a receiver path including a transconductance amplifier (Au discloses a first transconductance stage comprising receiver transconductance (Rx Gm) circuits/amplifiers 108, 110 in the receiver path, fig. 2, LNA 202,204, para. 0011-16,20); and
a loopback calibration path coupled between an output of the first transmit amplifier and an output of the transconductance amplifier (Au discloses calibration paths 130, 132 coupled from the output of power amplifier 122 (via loopback coupler 124 and switch 128) to auxiliary transconductance circuits, which share down conversion mixers 210, 218 at their outputs with Gm transconductance circuits, para. 0011-19);
wherein the loopback calibration path comprises a voltage-to-current converter (Au teaches transconductance circuits Gm 106,108,110,112 in the calibration path convert voltage from the power amplifier output to current signals, para. 0011-19).
Regarding claim 2, Au teaches the apparatus of claim 1, wherein the transconductance amplifier is configured to be off during calibration of the receiver path using the loopback calibration path (Au discloses that during loopback calibration operation, the primary mixer transconductance stage (Rx Gm 108, 110) is powered off / turned off, para. 0011-19).
Regarding claim 3, Au teaches the apparatus of claim 1, wherein the receiver path further comprises a receiver amplifier including an output coupled to an input of the transconductance amplifier, the receiver amplifier being configured to be off during calibration of the receiver path using the loopback calibration path (Au discloses receiver circuitry 104 comprising low-noise amplifiers 202, 204 coupled to Rx Gm circuits 108, 110, and the low-noise amplifiers are turned off during loopback operation, para. 0011-19).
Regarding claim 4, Au teaches the apparatus of claim 3, wherein the receiver amplifier comprises a low noise amplifier (LNA) (Au discloses low-noise amplifiers (LNAs) 202, 204, para. 0011-19).
Regarding claim 7, Au teaches the apparatus of claim 1, wherein: the transmitter path comprises a transmit mixer including an output coupled to an input of the first transmit amplifier; and the receiver path comprises a receive mixer including an input coupled to the output of the transconductance amplifier (Au discloses up-conversion mixers 230, 238 coupled to condition circuitry 240 / power amplifier 122, and down-conversion mixers 210, 218 having inputs coupled to the outputs of transconductance amplifiers 108, 110 (Rx Gm) and 106, 112 (Aux Gm), para. 0011-19).
Regarding claim 8, Au teaches the apparatus of claim 1, further comprising a controller coupled to the receiver path and configured to perform calibration for the receiver path based on a processed version of a signal received via the loopback calibration path (Au discloses a baseband processor 118 coupled to the receiver path via ADCs 216, 224 that evaluates signals from the calibration paths to determine predistortion and calibration adjustments, para. 0011-19).
Regarding claim 9, Au teaches the apparatus of claim 8, wherein, to perform the calibration, the controller is configured to reduce a gain difference between an in-phase (I) path and a quadrature (Q) path of the receiver path (Au discloses using the receiver IQ calibration path 130 to calibrate IQ un-balance (imbalance between the I and Q paths), para. 0011-19).
Regarding claim 10, Au teaches the apparatus of claim 8, wherein, to perform the calibration, the controller is configured to set a phase difference between an in-phase (I) path and a quadrature (Q) path of the receiver path to be 90° (Au discloses calibrating IQ un-balance, defining IQ un-balance as the undesired deviation from a perfectly quadrature (90 degrees) relationship between the I and Q signal paths, para. 0011-19).
Regarding claim 11, Au teaches a method for wireless communication, comprising:
generating an amplified voltage via a transmit amplifier of a transmitter path (Au discloses a power amplifier (PA) 122 in the transmitter path, fig. 2, para. 0011-16);
converting the amplified voltage to a current via a voltage-to-current converter of a loopback calibration path (Au discloses a first transconductance stage comprising receiver transconductance (Rx Gm) circuits/amplifiers 108, 110 in the receiver path, fig. 2, LNA 202,204, para. 0011-16,20);
providing the current to an output of a transconductance amplifier of a receiver path via the loopback calibration path (Au discloses calibration paths 130, 132 coupled from the output of power amplifier 122 (via loopback coupler 124 and switch 128) to auxiliary transconductance circuits, which share down conversion mixers 210, 218 at their outputs with Gm transconductance circuits, para. 0011-19);
generating, via the receiver path, a processed signal based on the current (Au discloses down-conversion mixers 210, 218, TIAs 212, 220, LPF/DC correction circuits 214, 222, and ADCs 216, 224 in the receiver processing paths generating digitized processed signals for baseband processor 118 based on the current signals, para. 0011-16); and
calibrating the receiver path based on the processed signal (Au teaches that receiver IQ calibration path 130 (using Rx Gm 108, 110) is used to calibrate IQ un-balance of the receiver path. Baseband processor 118 evaluates the digitized processed signals received from convert and process circuitry 114, 116. Using the processed signal obtained via receiver IQ calibration path 130, baseband processor 118 calculates and calibrates the receiver IQ un-balance. Au defines IQ un-balance as the undesired deviation from a perfectly quadrature (90°) relationship between the I branch (Rx Gm 108 + processing circuitry 114) and the Q branch (Rx Gm 110 + processing circuitry 116) of the receiver path).
Regarding claims 12-14, and 16-18, the dependent claims are interpreted and rejected for the same reasons as set forth above in claims 2-4, 7, 9 and 10, respectively above.
Regarding claim 19, Au teaches a wireless device (Au discloses a wireless transceiver 100 / 100A, fig. 2, para. 0011-16), comprising:
at least one antenna (Au teaches antennas 102 and 126, fig. 2);
a transmitter path coupled to the at least one antenna and including a transmit amplifier (Au discloses a power amplifier (PA) 122 in the transmitter path, fig. 2, para. 0011-16);
a receiver path coupled to the at least one antenna and including a transconductance amplifier (Au discloses a first transconductance stage comprising receiver transconductance (Rx Gm) circuits/amplifiers 108, 110 in the receiver path, fig. 2, LNA 202,204, para. 0011-16,20); and
a loopback calibration path coupled between an output of the first transmit amplifier and an output of the transconductance amplifier (Au discloses calibration paths 130, 132 coupled from the output of power amplifier 122 (via loopback coupler 124 and switch 128) to auxiliary transconductance circuits, which share down conversion mixers 210, 218 at their outputs with Gm transconductance circuits, para. 0011-19);
wherein the loopback calibration path comprises a voltage-to-current converter (Au teaches transconductance circuits Gm 106,108,110,112 in the calibration path convert voltage from the power amplifier output to current signals, para. 0011-19).
Regarding claim 20, the dependent claims are interpreted and rejected for the same reasons as set forth above in claim 2.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 5, 6 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Au (US 20140036973 A1) further in view of Sahu (US 20230275614 A1).
Regarding claim 5, Au teaches the apparatus of claim 1.
Au is silent to teaching that wherein the transmitter path comprises a second transmit amplifier including an input coupled to an output of the first transmit amplifier.
In the same field of endeavor, Sahu teaches an apparatus wherein the transmitter path comprises a second transmit amplifier including an input coupled to an output of the first transmit amplifier (Sahu discloses that transmit path 1002 comprises a second transmit amplifier, power amplifier (PA 1040), having its differential inputs coupled to differential output nodes 1028, 1030 of the first transmit amplifier (PPA 1022) via transformer 1036 (primary inductor 1034 and secondary inductor 1038), para. 0013).
Therefore, a Person Having Ordinary Skill in the Art (POSITA) would have been motivated to combine the teachings of Au with Sahu. Au explicitly teaches that its transmitter path comprises a power amplifier (PA 122) preceded by condition circuitry 240, which "may include one or more gain stages, each of which may include a load inductor/balun". While Au contemplates preliminary gain stages in its transmitter path, it does not explicitly detail the specific two-stage Driver Amplifier (PPA) and Power Amplifier (PA) topology. Sahu provides the explicit disclosure of a multi-stage transmit amplifier architecture comprising a pre-amplification power amplifier (PPA 1022, acting as a driver stage) providing a first level of amplification, coupled in series to a main power amplifier (PA 1040) providing a second level of amplification. Therefore, a POSITA looking to implement Au's contemplated multi-stage transmitter conditioning circuitry would naturally look to Sahu's explicit pre-amplifier/driver plus power amplifier arrangement.
Regarding claim 6, the combination of Au and Sahu teaches the apparatus of claim 5, wherein the first transmit amplifier comprises a driver amplifier (DA) and wherein the second transmit amplifier comprises a power amplifier (PA) (Sahu discloses that the first transmit amplifier is a pre-amplification power amplifier (PPA 1022) providing a first level of amplification (acting as a pre-amplifier / driver stage
), and the second transmit amplifier is explicitly a power amplifier (PA 1040) providing a second level of amplification. Under BRI, a pre-amplifier stage driving a main power amplifier stage corresponds to a driver amplifier (DA) paired with a power amplifier (PA), para. 0022-23,31).
Regarding claim 15, the dependent claims are interpreted and rejected for the same reasons as set forth above in claim 5.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Kang (US 20120257656 A1) teaches wireless devices.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WEN WU HUANG whose telephone number is (571)272-7852. The examiner can normally be reached Mon-Fri 10-6.
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/WEN W HUANG/Primary Examiner, Art Unit 2648
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