CTNF 18/631,746 CTNF 91316 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 8-9, 11, 17 and 19 are rejected under 35 U.S.C. 102( a) (1 ) as being anticipated by Kim et al. (US 11336242 B2 and Kim hereinafter) Regarding claim 8, Kim discloses a communication circuit [fig. 11] comprising: a first power amplifier circuit [PAM1(B1)]; a first supply modulator [111a] configured to provide a first supply voltage [Vs1] to the first power amplifier circuit; a second power amplifier circuit [PAM3(B3)]; a second supply modulator [112a] configured to provide a second supply voltage [Vs2] to the second power amplifier circuit; a third power amplifier circuit [PAM2(B2)]; a first switch [SW1] having one end connected to an input terminal of the first power amplifier circuit [input to PAM1(B1)] and another end connected to an input terminal of the third power amplifier circuit [input to PAM2(B2)]; a second switch [SW2] having one end connected to an input terminal of the second power amplifier circuit [input to PAM3(B3)] and another end connected to the input terminal of the third power amplifier circuit; and a control circuit [130a] configured to control the first switch and the second switch upon receiving a control signal [OF] based on an operation mode [mode 2/mode 3], wherein the input terminal of the third power amplifier circuit is connected to at least one of the first supply modulator and the second supply modulator. Regarding claim 9, Kim discloses wherein, based on the operation mode being a first operation mode [e.g., mode 3], the control circuit is further configured to turn on one of the first switch and the second switch, and active the third power amplifier circuit [fig. 5C]. Regarding claim 11, Kim discloses [fig. 5B] wherein the control circuit is configured to, based on the operation mode being a third operation mode [mode 2], turn on the first switch and the second switch, and activate one of the first power amplifier circuit, the second power amplifier circuit and the third power amplifier circuit. Regarding claim 17, Kim discloses a supply modulating circuit [fig. 11] comprising: a first supply modulator [111a] configured to output a first supply voltage [Vs1] through a first output terminal [output terminal 111a]; a second supply modulator [112a] configured to output a second supply voltage [Vs2] through a second output terminal [output terminal 112a]; a first switch [SW1] having one end connected to the first output terminal and another end connected to a third output terminal [terminal connected between SW1 and SW2], the first switch being configured to switch between the first output terminal and the third output terminal; and a second switch [SW2] having one end connected to the second output terminal and another end connected to the third output terminal, the second switch being configured to switch between the first output terminal and the third output terminal. Regarding claim 19, Kim discloses further comprising a control circuit [130a, fig. 11] configured to output a control signal [OF] for switching at least one of the first switch and the second switch . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-5, 10 and 12-16 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al . Regarding clam 1, Kim discloses a communication circuit [see figs. 5A-5C and 11] comprising: a first supply modulator [111a] configured to provide a first supply voltage [Vs1]; a second supply modulator [112a] configured to provide a second supply voltage [Vs2]; a switch [120a] configured to switch between output terminals of the first supply modulator and the second supply modulator; a first power amplifier [PAM1(B1)] configured to receive the first supply voltage and amplify a first input signal [RF1_in]; a second power amplifier [PAM3(B3)] configured to receive the second supply voltage and amplify a second input signal [RF3_in]; a third power amplifier [PAM2(B2)] configured to use third power, and amplify a third input signal [RF2_in]; and a control circuit [130a] configured to control a switching operation of the switch based on an operation mode [e.g. Mode 2, fig. 5B] and activate at least one of the first power amplifier [PAM2 (B2)], the second power amplifier, and the third power amplifier based on the operation mode. Kim does not explicitly disclose the third power amplifier configured to use third power higher than first power of the first power amplifier and second power of the second power amplifier, receive the first supply voltage and the second supply voltage. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the timing of SW1 and SW2 so that the switches close simultaneously. Adjusting switch timing is a routine design choice that would make based on desire voltage. This modification is merely involves selecting a different timing without changing the circuit would have been an obvious design choice or routine parameter selection. Regarding clam 2, Kim discloses [see fig. 5C] wherein the control circuit is further configured to, based on the operation mode being a first operation mode [e.g., mode 3], turn off the switch and activate one of the first power amplifier and the second power amplifier. Regarding clam 3, Kim discloses [see fig. 5A] wherein the control circuit is further configured to, based on the operation mode being a second operation mode [e.g., mode 1], turn off the switch and activate the first power amplifier and the second power amplifier. Regarding clam 4, Kim discloses [see fig. 5B] wherein the control circuit is further configured to, based on the operation mode being a third operation mode [e.g., mode 2], turn on the switch and activate the third power amplifier. Regarding clam 5, Kim discloses [figs. 6-7, claim 10] wherein at least one supply modulator among the first supply modulator and the second supply modulator comprises at least one of: i) an envelope tracker [110_1] configured to adjust a voltage level [Vs] of a corresponding supply voltage based on an envelope signal [ENV] received from the control circuit; and ii) an average power tracker [110_2] configured to adjust the voltage level of the corresponding supply voltage based on a period average power [AP] of an input signal received from the control circuit, and wherein the at least one supply modulator is configured to adjust the voltage level of the corresponding supply voltage using at least one of the envelope tracker and the average power tracker. Regarding claim 10, Kim (embodiment of fig. 11) teaches all the features with respect to claim 8 as outlined above. Kim (embodiment of fig. 11) does not explicitly wherein, based on the operation mode being a second operation mode, the control circuit is further configured to turn on one of the first switch and the second switch, and activate a power amplifier circuit, among the first power amplifier circuit and the second power amplifier circuit, corresponding to a switch in an off state among the first switch and the second switch, and the third power amplifier circuit. However, Kim (embodiment of fig. 8) discloses the control circuit is further configured to turn on one of the first switch [SW1] and the second switch [SW2], and activate a power amplifier circuit [PAM3], among the first power amplifier circuit and the second power amplifier circuit, corresponding to a switch in an off state among the first switch and the second switch, and the third power amplifier circuit. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Kim (embodiment of fig. 11) incorporating the power amplifier circuit as taught in Kim (embodiment of fig. 8) in order to provide operation frequency band combinations provided by using a number of power amplifiers. Regarding claim 12, Kim (embodiment of fig. 11) teaches all the features with respect to claim 8 as outlined above. Kim (embodiment of fig. 11) does not explicitly a third switch having one end connected to the input terminal of the first power amplifier circuit and another end connected to input terminal of a fourth power amplifier circuit; and a fourth switch having one end connected to the input terminal of the second power amplifier circuit and another end connected to the input terminal of the fourth power amplifier circuit, wherein the input terminal of the fourth power amplifier circuit is connected to at least one of the first supply modulator and the second supply modulator by controlling the third switch and the fourth switch upon receiving the control signal according to the operation mode. However, Kim (embodiment of fig. 8) discloses a third switch [SW3] having one end connected to the input terminal of the first power amplifier circuit [111] and another end connected to input terminal of a fourth power amplifier circuit [PAM3]; and a fourth switch [SW4] having one end connected to the input terminal of the second power amplifier circuit [112] and another end connected to the input terminal of the fourth power amplifier circuit, wherein the input terminal of the fourth power amplifier circuit is connected to at least one of the first supply modulator and the second supply modulator by controlling the third switch and the fourth switch upon receiving the control signal according to the operation mode. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Kim (embodiment of fig. 11) incorporating the third and fourth switches as taught in Kim (embodiment of fig. 8) in order to provide operation frequency band combinations provided by using a number of power amplifiers. Regarding clam 13, Kim discloses [see fig. 8] wherein the control circuit is further configured to, based on the operation mode being a first operation mode, turn off the first switch and the second switch, turn on one of the third switch and the fourth switch, and activate the fourth power amplifier circuit. Regarding clam 14, Kim discloses [see fig. 8] wherein the control circuit is further configured to, based on the operation mode being a second operation mode: turn off the first switch and the second switch, turn on one of the third switch and the fourth switch, activate a power amplifier circuit [PAM3], among the first power amplifier circuit and the second power amplifier circuit, corresponding to the third switch being in an off state or the fourth switch being in the off state, and activate the fourth power amplifier circuit. Regarding clam 15, Kim discloses [see fig. 8] wherein, when the operation mode is a second operation mode, the control circuit is further configured to: turn on one of the first switch and the second switch, turn on one of the third switch and the fourth switch, and activate the third power amplifier circuit and the fourth power amplifier circuit. Regarding clam 16, Kim discloses [see fig. 8] wherein the control circuit is further configured to, based on the operation mode being a third operation mode: turn on the third switch and the fourth switch, and activate one of the first power amplifier circuit, the second power amplifier circuit, and the fourth power amplifier circuit . 07-21-aia AIA Claim s 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. in view of Briffa et al. (US 9209758 and Briffa hereinafter) . Regarding claim 6, Kim teaches all the features with respect to claim 1as outlined above. Kim does not explicitly disclose a controller configured to control a phase of current in at least one of the first supply modulator and the second supply modulator. However, Briffa discloses a controller [52, fig. 3] configured to control a phase of current [phase] in at least one of the first supply modulator [54] and the second supply modulator [56]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Kim incorporating the controller as taught in Briffa in order to control may be maintained over both the amplitudes and the phases of RF input signals applied to one or more power amplifiers and used to achieve high power efficiency within the RF transmitter [cl. 1, ln. 41-56]. Regarding claim 7, Kim teaches all the features with respect to claim 1 as outlined above. Kim does not explicitly disclose a controller configured to control a phase of current of the first supply modulator to be different from a phase of current of the second supply modulator based on the operation mode. However, Briffa discloses a controller [52, figs. 3 and 13] configured to control a phase of current [phase] of the first supply modulator [54] to be different from a phase of current of the second supply modulator [56]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Kim incorporating the controller as taught in Briffa in order to switch the power amplifier dc supply among different levels depending on the desired RF output power level . 07-21-aia AIA Claim s 18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. in view of Noguchi et al. (US 2024/0405723 and Noguchi hereinafter) . Regarding claim 18, Kim teaches all the features with respect to claim 17 as outlined above. Kim does not explicitly disclose further comprising a third supply modulator configured to output a third supply voltage through the third output terminal. However, Noguchi discloses a third supply modulator [13B, fig. 8] configured to output a third supply voltage [output voltage 13B] through third output terminal [250]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Kim incorporating the third supply voltage as taught in Noguchi in order to increase the circuit scale of the amplification system with an increase in the number of voltage output circuits. Regarding claim 20, Kim in view of Noguchi teaches further comprising a third switch [33, fig. 8] having one end connected to the first output terminal and another end connected to the second output terminal, the third switch being configured to switch between the first output terminal and the second output terminal. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to METASEBIA T RETEBO whose telephone number is (571)272-9299. The examiner can normally be reached M - F 8:30 - 5. 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For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /METASEBIA T RETEBO/Primary Examiner, Art Unit 2836 Application/Control Number: 18/631,746 Page 2 Art Unit: 2836 Application/Control Number: 18/631,746 Page 3 Art Unit: 2836 Application/Control Number: 18/631,746 Page 4 Art Unit: 2836 Application/Control Number: 18/631,746 Page 5 Art Unit: 2836 Application/Control Number: 18/631,746 Page 6 Art Unit: 2836 Application/Control Number: 18/631,746 Page 7 Art Unit: 2836 Application/Control Number: 18/631,746 Page 8 Art Unit: 2836 Application/Control Number: 18/631,746 Page 9 Art Unit: 2836 Application/Control Number: 18/631,746 Page 10 Art Unit: 2836 Application/Control Number: 18/631,746 Page 11 Art Unit: 2836
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