DETAILED ACTION
This Office action is in response to the application filed on 10 April 2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3 and 16-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xi et al. (US 2020/0295661; “Xi”)1.
In re claims 1 and 16, Xi discloses a power converter (Figs. 2 and 3) and the corresponding method of its operation2 comprising:
a first conversion circuit (Fig. 2); and
a control apparatus (Fig. 3) connected to the first conversion circuit, wherein the control apparatus is configured to:
detect an output voltage of the first conversion circuit to obtain a voltage value of a first voltage (Fig. 3: feedback circuit comprising RB1, RB2 detects output voltage VO and obtains first voltage VFB);
generate a slope compensation signal based on the voltage value of the first voltage (Fig. 3: first voltage VFB is provided through amplifier Gm2 to summer 210, which generates slope compensation signal SUMN);
obtain an error signal based on an error between the voltage value of the first voltage and a voltage value of a reference voltage (Fig. 3: error amplifier 202 generates signal VCTRL based on difference between first voltage VFB and reference voltage VREF; VCTRL is provided through Gm3 to summer 220, to generate error signal SUMP);
compare the slope compensation signal with the error signal to obtain a comparison signal (Fig. 3: comparator 206 compares slope compensation signal SUMN with error signal SUMP to generate comparison signal output from 206); and
generate a drive signal of the first conversion circuit based on the comparison signal (Fig. 3: control circuits 208, 216, 218 generate drive signals Q1G, Q2G based on comparison signal from 206, to switch the transistors Q1, Q2 in the first conversion circuit as shown in Fig. 2).
In re claim 2, Xi discloses wherein the control apparatus (Fig. 3) comprises:
a detection circuit (RB1, RB2);
an amplification circuit (202, Gm3, Gm4, 220);
a slope compensation circuit (212, Gm1, Gm2, 210);
a comparison circuit (206); and
a signal generation circuit (208, 216, 218),
wherein an input end of the detection circuit is connected to an output end of the first conversion circuit (upper terminal of RB1 receives output voltage VO from the conversion circuit as shown in Fig. 2), an output end of the detection circuit is connected to the slope compensation circuit and the amplification circuit (first voltage VFB from the detection circuit is received by slope compensation circuit at Gm2 and by amplifier circuit at 202),
wherein the detection circuit is configured to:
detect the output voltage of the first conversion circuit to obtain the voltage value of the first voltage (see [0040]); and
output the voltage value of the first voltage to the slope compensation circuit and the amplification circuit (as shown in Fig. 3),
wherein the amplification circuit is connected to the comparison circuit (as shown in Fig. 3), and the amplification circuit is configured to:
amplify the error between the voltage value of the first voltage and the voltage value of the reference voltage to obtain the error signal (VCTRL; see [0039], [0049]), and output the error signal to the comparison circuit (as shown in Fig. 3);
wherein the slope compensation circuit is connected to the comparison circuit (as shown in Fig. 3), and the slope compensation circuit is configured to:
generate the slope compensation signal based on the voltage value of the first voltage (Fig. 3: slope compensation circuit receives first voltage VFB and generates slope compensation signal SUMN based thereon);
wherein the comparison circuit is connected to the signal generation circuit (as shown in Fig. 3), and the comparison circuit is configured to:
compare the slope compensation signal with the error signal to obtain the comparison signal (Fig. 3: comparator 206 compares SUMN with SUMP to generate its output signal); and
output the comparison signal to the signal generation circuit (as shown in Fig. 3), and
wherein the signal generation circuit is configured to:
generate the drive signal (Q1G, Q2G) of the first conversion circuit based on the comparison signal (Fig. 3: signal generation circuit receives the comparison signal from comparator 206 to generate drive signal Q1G, Q2G).
In re claim 3, Xi discloses wherein the slope compensation circuit (Fig. 3: 212, Gm1, Gm2, 210) comprises:
a slope signal compensation module (Gm2, Gm1, 210); and
a control module (212),
wherein the slope signal compensation module is separately connected to the detection circuit and the control module (Fig. 3: slope signal compensation module is connected to detection circuit via Gm2 and is connected to control module 212 via Gm1), and the slope signal generation module is configured to:
generate the slope compensation signal (SUMN) based on the voltage value of the first voltage (Fig. 3: slope compensation signal SUMN is produced by summer 210 based in part on first voltage VFB received through Gm2), and
wherein the control module is connected to the comparison circuit and controls a working state of the slope signal compensation module based on the comparison signal (Fig. 3 and [0057]: the voltage V2 received by control module 212 is the switching node voltage from the common node between Q1/Q2 in Fig. 2; the switching node voltage is produced via the comparison and signal generation circuits through the switching of Q1/Q2 in a conventionally-understood manner).
In re claim 17, Xi discloses wherein the step of generating the slope compensation signal based on the voltage value of the first voltage comprises:
superposing the voltage value of the first voltage and a slope signal to obtain the slope compensation signal (Fig. 3: summer 210 superposes first voltage VFB through Gm2 with slope signal VRAMP from Gm1; see [0059]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Xi.
In re claim 20, Xi discloses an electronic device (Figs. 2 and 3; see [0003]) comprising:
a load (see output capacitor Co in Fig. 2; a load is further implied in [0003]);
a power converter comprising:
a first conversion circuit (Fig. 2); and
a control apparatus (Fig. 3) connected to the first conversion circuit, wherein the control apparatus is configured to:
detect an output voltage of the first conversion circuit to obtain a voltage value of a first voltage (Fig. 3: feedback circuit comprising RB1, RB2 detects output voltage VO and obtains first voltage VFB);
generate a slope compensation signal based on the voltage value of the first voltage (Fig. 3: first voltage VFB is provided through amplifier Gm2 to summer 210, which generates slope compensation signal SUMN);
obtain an error signal based on an error between the voltage value of the first voltage and a voltage value of a reference voltage (Fig. 3: error amplifier 202 generates signal VCTRL based on difference between first voltage VFB and reference voltage VREF; VCTRL is provided through Gm3 to summer 220, to generate error signal SUMP);
compare the slope compensation signal with the error signal to obtain a comparison signal (Fig. 3: comparator 206 compares slope compensation signal SUMN with error signal SUMP to generate comparison signal output from 206); and
generate a drive signal of the first conversion circuit based on the comparison signal (Fig. 3: control circuits 208, 216, 218 generate drive signals Q1G, Q2G based on comparison signal from 206, to switch the transistors Q1, Q2 in the first conversion circuit as shown in Fig. 2);
wherein the power converter is configured to:
convert an output voltage of [the input source] (that is, input voltage Vin in Fig. 2) to obtain a target voltage (output voltage Vo in Fig. 2); and output the target voltage to the load (see Fig. 2).
Xi discloses all of the limitations of claim 20 except for a battery as the input source. However, Xi discloses at [0003], as the background premise for the disclosure, that the power converter is intended to be used for various electronic devices including, e.g., mobile phones. It was extremely well known, to both the ordinary artisan as well as to the ordinary layperson, that mobile phones use a battery as an input source in order to enable their mobility or portability.
Therefore it would have been an obvious matter of common sense to one of ordinary skill in the art before the effective filing date of the claimed invention to have used a battery as input source for the power converter of Xi when used in an electronic device that is a mobile phone. The battery source enables such devices to be portable, in that they can be used without the need for connection to a fixed power source such as a utility grid.
Allowable Subject Matter
Claims 4-15 and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 4, the closest prior art in Xi discloses the invention according to claim 3 as explained above, but does not disclose the further features including wherein the slope signal compensation module comprises a first switch S1, a second switch S2, a third switch S3, a first current source I1, a second current source I2, and a first capacitor C1, wherein a first electrode of the first switch S1 is connected to a first power supply VCC 1, and a second electrode of the first switch S1 is connected to a first end of the first current source I1, a second end of the first power current source I1 is connected to a first end of the first capacitor C1, a first electrode of the second switch S2, and a first electrode of the third switch S3, a second electrode of the second switch S2 is connected to a second end of the first capacitor C1, a second electrode of the third switch S3 is connected to a first end of the second current source I2, a second end of the second current source I2 is connected to the second end of the first capacitor C1, the second end of the first capacitor C1 is connected to the output end of the detection circuit, and the first end of the first capacitor C1 is connected to the comparison circuit, and a control electrode of the first switch S1, a control electrode of the second switch S2, and a control electrode of the third switch S3 are connected to a first control module, as recited claim 4.
Furthermore, the other prior art on record fails to suggest specific modifications to the converter of Xi that would have arrived at these features.
Claims 5-6 depend from claim 4 and would be allowable for the same reasons explained above.
With respect to claim 7, the closest prior art in Xi discloses the invention according to claim 3 as explained above, but does not disclose the further features including wherein the slope signal compensation module comprises a fourth switch S4, a fifth switch S5, a sixth switch S6, a second capacitor C2, a third current source I3, a fourth current source I4, and an adder, wherein a first electrode of the fourth switch S4 is configured to be connected to a second power supply VCC 2, and a second electrode of the fourth switch S4 is connected to a first end of the third current source I3, a second end of the third current source I3 is separately connected to a first end of the second capacitor C2, a first electrode of the fifth switch S5, and a first electrode of the sixth switch S6, a second electrode of the fifth switch S5 is connected to a second electrode of the sixth switch S6, the second electrode of the sixth switch S6 is connected to a first end of the fourth current source I4, a second end of the fourth current source I4 is connected to a second end of the second capacitor C2, the second end of the second capacitor C2 is configured to receive the reference voltage, and the first end of the second capacitor C2 is connected to a first input end of the adder, a second end of the adder is connected to the detection circuit, and an output end of the adder is connected to the comparison circuit, and a control electrode of the fourth switch S4, a control electrode of the fifth switch S5, and a control electrode of the sixth switch S6 are all connected to a first control module, as recited in claim 7.
Furthermore, the other prior art on record fails to suggest specific modifications to the converter of Xi that would have arrived at these features.
Claims 8-9 and 15 each depend, either directly or indirectly, from claim 7 and would be allowable for the same reasons as explained above.
With respect to claim 10, the closest prior art in Xi discloses the invention according to claim 2 as explained above, but does not disclose the further features including wherein the signal generation circuit comprises a frequency division module, a first signal generation module, and a second signal generation module, wherein an input end of the frequency division module is connected to the comparison circuit, an output end of the frequency division module is connected to the first signal generation module and the second signal generation module, wherein the frequency division module is configured to: perform frequency division processing on the comparison signal to obtain a first frequency division signal and a second frequency division signal, output the first frequency division signal to the first signal generation module, and output the second frequency division module to the second signal generation module; wherein the first conversion circuit is a two-level conversion circuit, the first signal generation module is configured to: generate a first drive signal based on the first frequency division signal and a voltage conversion ratio of the first conversion circuit, and wherein the second signal generation module is configured to: generate a second drive signal based on the second frequency division signal and the voltage conversion ratio of the first conversion circuit, and wherein the drive signal of the first conversion circuit comprises the first drive signal and the second drive signal, as recited in claim 10.
Furthermore, the other prior art on record fails to suggest specific modifications to the converter of Xi that would have arrived at these features.
Claims 11-14 each depend, either directly or indirectly, from claim 10 and would be allowable for the same reasons as explained above.
With respect to claim 18, the closest prior art in Xi discloses the invention according to claim 16 as explained above, and further discloses that the conversion circuit is a two-level conversion circuit (Fig. 2 of Xi). However, Xi does not disclose the further features including wherein the step of generating the drive signal of the conversion circuit based on the comparison signal comprises: performing frequency division on the comparison signal to obtain a first frequency division signal and a second frequency division signal; generating a first drive signal based on the first frequency division signal and a voltage conversion ratio of the conversion circuit; and generating a second drive signal based on the second frequency division signal and the voltage conversion ratio of the conversion circuit, wherein the drive signal of the conversion circuit comprises the first drive signal and the second drive signal as recited in claim 18.
Furthermore, the other prior art on record fails to suggest specific modifications to the converter of Xi that would have arrived at these features.
Claim 19 depends from claim 18 and would be allowable for the same reasons as explained above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 2009/0160416 discloses a DC-DC converter in which a slope compensation signal is generated based on a detected output voltage and is compared to an error signal to generate drive signals for the converter.
US 2012/0326688 is cited as being the US and English language equivalent to CN 101924469, as originally cited by Applicant in an IDS.
US 2013/0002223 discloses a constant-ON time converter and control method in which a slope signal is generated based on an output voltage and is compared to an error signal to generate drive signals for the transistors.
US 2021/0119465 was cited in a foreign Office action for its relevancy to the claimed invention, and it discloses a three-level DC-DC conversion circuit and a particular control circuit for generating four drive signals for the four transistors.
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/FRED E FINCH III/Primary Examiner, Art Unit 2838
1 Reference already on record as cited by Applicant in the 02 December 2024 IDS.
2 The method claim 16 recites the same essential structural and functional limitations a as found in claim 1, such that the citations to Xi are equally applicable to both device and method, as claimed.