DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group IIf (i.e., claims 11, 13-17) in the reply filed on 5/22/26 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11, 13--17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 11, lines 17-18, states “optical assembly mounting step S 150, comprising aligning and fixing the optical assemblies with the optical transceivers”. Since the aforesaid quoted passage is the first time in the claim “optical assembly” is mentioned, the passage should begin with “an optical assembly mounting step”. Also in the above passage, suddenly transitioning to “optical assemblies” is not clear. It somehow must be made clear that an optical assembly is mounted on each of a plurality of PCB boards/units. If Applicant would like to discuss proper wording, contact the examiner. For the purpose of the rejection below, it will be assumed that lines 17-18 of claim 11 reads “an optical assembly mounting step S150, comprising aligning and fixing an optical assembly with corresponding optical transceivers on each PCB board/unit in the case where there is a plurality of PCB boards/units”.
If Applicant would like to discuss proper wording, contact the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 11, 13--17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 114660742 A; “Wang”; already of record, however, a combined translation is provided herewith and relied upon for this Office action) with obviousness evidenced by {OEB} Razon (US 20030056628) and/or Lim et al. (US 20190364702; “Lim”) and/or Kim et al. (US 20050233567; “Kim”) and/or Meyers et al. (US 20200212012; “Meyers”).
Regarding claim 11, Wang teaches an optoelectronic assembly, wherein the optoelectronic assembly (e.g., figs. 2, 4-6) is prepared by a preparation method, the preparation method comprising: carrier preparation step S110, comprising acquiring a prepared PCB [“PCB” stands for “printed circuit board” which means circuitry/contacts are printed on the PCB/board] board/unit 1 12 11 (e.g., fig. 2; ¶ 0032: the substrate 1 may be a printed circuit board; for simplicity a PCB board/unit comprising elements 1, 11, 12 may be referred to as: “PCB board/unit 1/11/12”), wherein the PCB board/unit 1/11/12 is provided with an electrical connection surface and an optical coupling surface [e.g., the surface that device(s) 32 and element 3 are located is an optical coupling surface; figs. 2, 4-5; the surface that elements 11 and 12 {plurality of electrical contacts; ¶ 0028} are located is the claimed “electrical connection surface”] at an interval [e.g. emitter/receiving/transceiver devices 32 are spaced at interval; fig. 2; also, abstract: “one surface of the substrate is provided with a plurality of light emitting/receiving devices and drivers, and the other surface is provided with a plurality of electrical contacts” {see also ¶ 0028}; the thickness of the substrate/PCB is also an interval], and the PCB unit/board 1/11/12 corresponds to the optoelectronic assembly (e.g., figs. 2, 4-6) to be prepared; electrical connection surface preparation step S120, comprising printing [“PCB” stands for “printed circuit board” which means circuitry/contacts are printed on the PCB/board 1] and preparing metal pads 11 12 on the electrical connection surface (e.g., figs. 1, 3; ¶ 0028), wherein the metal pads 11/12 comprise a plurality of first contacts 11 at a central position (e.g., figs. 1, 3) and a plurality of second contacts 12 at a periphery of the first contacts (e.g., figs. 1, 3), and a surface area of the first contact 11 is larger than a surface area of the second contact 12 (e.g., figs. 1, 3); and fixing solder on the first contacts 11 and the second contacts 12 (e.g., fig. 1; ¶ 0030); chip attaching step S 130, comprising attaching a plurality of driver chips 31 [e.g., ¶ 0026, the Abstract, and Wang claim 1 each state having plural drivers, e.g., “One side of the substrate is provided with a plurality of light emitting/receiving devices and drivers”] and a plurality of optical transceivers 32 (e.g., emitter/receiving devices 32) on the optical coupling surface [e.g., the surface that device(s) 32 and element 3 are located is an optical coupling surface; figs. 2, 4-5]; and bonding step S140, comprising electrically connecting electrical contacts of the plurality of driver chips and the plurality of optical transceivers with electrical contacts of the PCB board [e.g., ¶ 0029 states “The light transmitting/receiving device 32, the driver 31 and the electrical contacts form a data channel, and the data channel is used to receive or transmit data” which means electrically connecting electrical contacts of the plurality of driver chips and the plurality of optical transceivers with electrical contacts of the PCB board occurs in order for multiple channels to exist]; optical assembly mounting step S 150, comprising aligning and fixing the optical assembly 3 with the optical transceivers 32 [an optical assembly 3 mounting step S 150, comprising aligning and fixing an optical assembly 3 (e.g., go from fig. 2 to fig. 5; also see fig. 4 as a partial cross-sectional view of the assembly) with corresponding optical transceivers 32 on each PCB board/unit 1 in the case where there is a plurality of PCB boards/units 1]; and PCB unit preparation step S 160, wherein a side edge of the PCB unit is provided with a plurality of semi-circular through holes (e.g., in fig. 2, round/semicircular holes are shown at each of the left and right edges of board 1; the round/semicircular holes are also shown in fig. 5 on the right edge).
Wang does not explicitly state the PCB board is provided with a plurality of PCB units and cutting the PCB board into a plurality of PCB units by using precision cutting.
However, it was well-known to use precision cutting a PCB board provided with a plurality of PCB units into a plurality of PCB units at least as evidenced by Razon (e.g., Razon ¶ 0002: precision cutting saws for singulating devices from a PCB) and/or Lim (e.g., Lim fig. 5B, ¶ 0040: PCB precision cut using a laser or saw; it is noted that Lim fig. 5B shows cutting through a series of holes in a straight line such that when the precision cut is complete half of a hole is left at the edge) and/or Kim [Kim ¶ 0006: dicing a PCB into package units (singulation process)] and/or Meyers (e.g., Meyers ¶ 0061: semiconductor packages may be singulated with the PCB to produce individual units). Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use precision cutting a PCB board provided with a plurality of PCB units into a plurality of PCB units at least for the purpose of producing a large number/plurality of units efficiently.
Thus claim 11 is rejected under Wang with OEB Razon and/or Lim and/or Kim and/or Meyers [herein, may simply be referred to as: “Wang-Razon-Lim-Kim-Meyers”; or even more simply as: Wang-R-L-K-M].
It is further noted that claim 11 is also rejected as a “product-by-process” claim. This type of claim is discussed in the MPEP as follows:
2113 Product-by-Process Claims
PRODUCT-BY-PROCESS CLAIMS ARE NOT LIMITED TO THE
MANIPULATIONS OF THE RECITED STEPS, ONLY THE STRUCTURE IMPLIED
BY THE STEPS
“[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) (citations omitted) (Claim was directed to a novolac color developer. The process of making the developer was allowed. The difference between the inventive process and the prior art was the addition of metal oxide and carboxylic acid as separate ingredients instead of adding the more expensive pre-reacted metal carboxylate. The product-by-process claim was rejected because the end product, in both the prior art and the allowed process, ends up containing metal carboxylate. The fact that the metal carboxylate is not directly added, but is instead produced in-situ does not change the end product).
So, it is noted at least from the above passage, that it is the end product of an “optoelectronic assembly” that primarily matters since that is the end product being claimed. Ultimately, the end product of the PCB board/unit as part of an optoelectronic assembly is disclosed by Wang (e.g., see Wang figs. 2, 5). Having plural optoelectronic assemblies like the single optoelectronic assembly in Wang figs. 2, 5 would have been obvious at least as a mere duplication of parts [e.g., MPEP § 2144.04 rearranging parts, and/or changing shape and/or duplication of parts of an invention involves only routine skill in the art].
Therefore, claim 11 is also rejected as a product-by-process claim.
Regarding claim 13, Wang-R-L-K-M teaches the optoelectronic assembly according to claim 11 (see above), wherein the driver chip 31 and the optical transceiver 32 (e.g., Wang ¶s 0028-0029; fig. 2) are mounted on the optical coupling surface, and the optical transceiver 32 is coupled with an optical fiber 7 through the optical assembly 3 (e.g., Wang fig. 4).
Thus claim 13 is rejected.
Regarding claim 14, Wang-R-L-K-M teaches the optoelectronic assembly according to claim 13 (see above), further comprising a first lens (e.g., fig. 4; 1st lens is directly above transceiver 32), a second lens (e.g., Wang fig. 4; 2nd lens is closest to fiber 7) and a reflection plane (e.g., fig. 4), wherein the optical assembly comprises one accommodating cavity (e.g., fig. 4), the first lens is aligned with an emission window of the optical transceiver 32 (e.g., fig. 4; 1st lens is directly above transceiver 32), and the second lens is aligned with an end face of the optical fiber 7 (e.g., Wang fig. 4).
Thus claim 14 is rejected.
Regarding claim 15, Wang-R-L-K-M teaches the optoelectronic assembly according to claim 14 (see above), further comprising a first protective cover 2, wherein the first protective cover 2 is provided on the outside of the first lens (e.g., Wang figs. 4, 5), the second lens and the reflection plane (e.g., Wang figs. 4, 5; fig. 5 shows 1st protective cover 2 over the assembly 3).
Thus claim 15 is rejected.
Regarding claim 16, Wang-R-L-K-M teaches the optoelectronic assembly according to claim 13 (see above), wherein: the optical transceiver 32 is mounted on the optical coupling surface through a bracket/holder 4 (e.g., Wang fig. 6), the optical assembly is an optical fiber guide hole 6 (e.g., fig. 6); and a side frame 5 (e.g., fig. 6) is further provided on the optical coupling surface (e.g., fig. 6), and an optical fiber guide hole 6 is mounted on the side frame 5, and the optical fiber guide hole is aligned with a center of the emission window of the optical transceiver (e.g., Wang fig. 6 and see associated text in Wang Spec.).
Thus claim 16 is rejected.
Regarding claim 17, Wang-R-L-K-M teaches the optoelectronic assembly according to claim 15 (see above), further comprising: a second protective cover 8, wherein the second protective cover 8 is provided on the outside of the driver chips 31 and the bracket 4 (e.g., Wang fig. 6).
Thus claim 17 is rejected.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mr. Michael Mooney whose telephone number is 571-272-2422. The examiner can normally be reached during weekdays, M-F.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached on 571-272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Center. Should you have questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). For checking the filing status of an application, please refer to <https://www.uspto.gov/patents/apply/checking-application-status/check-filing-status-your-patent-application>.
/MICHAEL P MOONEY/ Primary Examiner, Art Unit 2874
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