DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on November 7, 2025 has been entered.
Claim Objections
Claim(s) 20 is objected to because of the following informalities (note that the markings show the examiner’s suggested amendments):
Claim 20, line 1, “The method of Claim 19, wherein at least some of the steps are”, should be change to - - The method of Claim 19, wherein at least some the steps” in the claim.
Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claim(s) 1-2, 6, 15-16, and 19-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3-4, and 6-8 of Casey et al. U.S. Patent No. 11,962,131 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because patented Claims 1, 3-4, and 6-8 essentially anticipate the Instant Claims 1-2, 6, 15-16, and 19-20 and differ by having additional functional limitations.
Application No. 18/634,907
U.S. Patent No. 11,962,131 B2
1. (Currently amended) An electrical device comprising:
a first metal oxide layer and a second metal oxide layer, each metal oxide layer having an outer side and an inner side, the inner side having a pocket defined by a floor and a raised perimeter around the floor;
first and second outer electrodes implemented on the outer sides of the first and second metal oxide layers, respectively;
first and second inner electrodes implemented on the floors of the first and second metal oxide layers, respectively; and
an electrically insulating seal that joins the perimeters of the inner sides of the first and second metal oxide layers, such that the first outer electrode, the first metal oxide layer and the first inner electrode form a first metal oxide varistor (MOV), the first inner electrode, the second inner electrode and the respective pockets form a gas discharge tube (GDT), and the second inner electrode, the second metal oxide layer and the second outer electrode form a second MOV.
1. An electrical device comprising:
a first metal oxide layer and a second metal oxide layer joined with a glass seal, each metal oxide layer having an outer surface and an inner surface with the inner surface defining a pocket such that a perimeter of the inner surface is raised relative to a floor of the pocket, wherein the glass seal joins the raised perimeters of the inner surfaces of the first and second metal oxide layers, and wherein the pockets of the inner surfaces of the first and second metal oxide layers and the glass seal define a sealed chamber enclosing a gas therein;
first and second outer electrodes implemented on the outer surfaces of the first and second metal oxide layers, respectively;
first and second inner electrodes implemented on the inner surfaces of the first and second metal oxide layers, respectively; andwherein the first outer electrode, the first metal oxide layer and the first inner electrode form a first metal oxide varistor (MOV), the first inner electrode, the second inner electrode and the sealed chamber with the gas form a gas discharge tube (GDT), and the second inner electrode, the second metal oxide layer and the second outer electrode form a second MOV, such that the electrical device includes the first MOV, the GDT and the second MOV electrically connected in series with the first inner electrode being a common electrode between the first MOV and the GDT and the second inner electrode being a common electrode between the GDT and the second MOV.
2. (Currently amended) The electrical device of Claim 1, wherein the electrically insulating seal includes a glass seal.
1. An electrical device comprising:
a first metal oxide layer and a second metal oxide layer joined with a glass seal, each metal oxide layer having an outer surface and an inner surface with the inner surface defining a pocket such that a perimeter of the inner surface is raised relative to a floor of the pocket, wherein the glass seal joins the raised perimeters of the inner surfaces of the first and second metal oxide layers, and wherein the pockets of the inner surfaces of the first and second metal oxide layers and the glass seal define a sealed chamber enclosing a gas therein;
first and second outer electrodes implemented on the outer surfaces of the first and second metal oxide layers, respectively;
first and second inner electrodes implemented on the inner surfaces of the first and second metal oxide layers, respectively; and
wherein the first outer electrode, the first metal oxide layer and the first inner electrode form a first metal oxide varistor (MOV), the first inner electrode, the second inner electrode and the sealed chamber with the gas form a gas discharge tube (GDT), and the second inner electrode, the second metal oxide layer and the second outer electrode form a second MOV, such that the electrical device includes the first MOV, the GDT and the second MOV electrically connected in series with the first inner electrode being a common electrode between the first MOV and the GDT and the second inner electrode being a common electrode between the GDT and the second MOV.
6. (Currently amended) The electrical device of Claim 1, wherein the first and second metal oxide layers are electrically insulated from each other by only the electrically insulating seal.
3. The electrical device of claim 2, wherein the first and second metal oxide layers are electrically insulated from each other by only the glass seal.
15. (Original) The electrical device of Claim 1, wherein the first metal oxide layer is an approximate mirror image of the second metal oxide layer about a mid-plane between the first and second metal oxide layers.
6. The electrical device of claim 1, wherein the first metal oxide layer is an approximate mirror image of the second metal oxide layer about a mid-plane between the first and second metal oxide layers.
16. (Original) The electrical device of Claim 1, further comprising an emissive coating formed over each of the first and second inner electrodes.
4. The electrical device of claim 1, further comprising an emissive coating formed over each of the first and second inner electrodes.
19. (Currently amended) A method for manufacturing an electrical device, the method comprising:
providing or forming a first metal oxide layer and a second metal oxide layer each having an outer side and an inner side, such that the inner side has a pocket defined by a floor and a raised perimeter around the floor;
forming first and second inner electrodes on the inner sides of the first and second metal oxide layers, respectively;
joining the raised perimeters of the inner sides of the first and second metal oxide layers with an electrically insulating seal; and
forming first and second outer electrodes on the outer sides of the first and second metal oxide layers, respectively, such that the first outer electrode, the first metal oxide layer and the first inner electrode form a first metal oxide varistor (MOV), the first inner electrode, the second inner electrode and the respective pockets form a gas discharge tube (GDT), and the second inner electrode, the second metal oxide layer and the second outer electrode form a second MOV.
7. A method for manufacturing an electrical device, the method comprising:
providing or forming a first metal oxide layer and a second metal oxide layer, such that each of the first and second metal oxide layers includes an outer surface and an inner surface with the inner surface defining a pocket such that a perimeter of the inner surface is raised relative to a floor of the pocket;forming first and second inner electrodes on the inner surfaces of the first and second metal oxide layers, respectively;
forming first and second outer electrodes on the outer surfaces of the first and second metal oxide layers, respectively; and
joining the raised perimeters of the inner surfaces of the first and second metal oxide layers with a glass seal, such that the pockets of the inner surfaces of the first and second metal oxide layers and the glass seal define a sealed chamber enclosing a gas therein, such that the first outer electrode, the first metal oxide layer and the first inner electrode form a first metal oxide varistor (MOV), the first inner electrode, the second inner electrode and the sealed chamber with the gas form a gas discharge tube (GDT), and the second inner electrode, the second metal oxide layer and the second outer electrode form a second MOV, such that the electrical device includes the first MOV, the GDT and the second MOV electrically connected in series with the first inner electrode being a common electrode between the first MOV and the GDT and the second inner electrode being a common electrode between the GDT and the second MOV.
20. (Original) The method of Claim 19, wherein at least some of the steps are performed in an array format in which a plurality of units are joined in an array, with each unit corresponding to a partially or completely fabricated form of the electrical device.
8. The method of claim 7, wherein at least some of the steps are performed in an array format in which a plurality of units are joined in an array, with each unit corresponding to a partially or completely fabricated form of the electrical device.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 6, 15-16, and 19 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Fujiwara (JP 2012212535 A).
With regard to claim 1, Fujiwara teaches an electrical device (Fig. 1 – Fig. 4) comprising:
a first metal oxide layer (4 – Fig. 4) (see left side) and a second metal oxide layer (4 – Fig. 4) (see right side), each metal oxide layer (4 – Fig. 3) having an outer side (see outer side in contact with 5 – Fig. 4) and an inner side (see inner side in contact with 25 – Fig. 4), the inner side (see inner side in contact with 25 – Fig. 4) having a pocket (F, inner side of 33 – Fig. 4) (see annotated figure below) defined by a floor (F – Fig. 4) (see annotated figure below) and a raised perimeter (see inner side of 33 – Fig. 4) around the floor (F – Fig. 4) (see annotated figure below);
first and second outer electrodes (2, 5 – Fig. 4) implemented on the outer sides of the first and second metal oxide layers (4 – Fig. 4), respectively;
first and second inner electrodes (25 – Fig. 4) implemented on the floors (F – Fig. 4) of the first and second metal oxide layers (4 – Fig. 4), respectively; and
an electrically insulating seal (3 – Fig. 4) (page 2, lines 14-15; Machine Translation) that joins the perimeters of the inner sides of the first and second metal oxide layers (4 – Fig. 4), such that the first outer electrode (2, 5 – Fig. 4), the first metal oxide layer (4 – Fig. 4) (see left side) and the first inner electrode (25 – Fig. 4) form a first metal oxide varistor (MOV) (4 – Fig. 4) (page 2, lines 24-27; Machine Translation), the first inner electrode (25 – Fig. 4), the second inner electrode (25 – Fig. 4) and the respective pockets (F, inner side of 33 – Fig. 4) form a gas discharge tube (GDT) (6 – Fig. 2), and the second inner electrode (25 – Fig. 4), the second metal oxide layer (4 – Fig. 4) (see right side) and the second outer electrode (2, 5 – Fig. 4) form a second MOV (page 2, lines 24-27; Machine Translation).
With regard to claim 2, Fujiwara teaches all the limitations of claim 1, and further teaches wherein the electrically insulating seal (3 – Fig. 4) includes a glass seal (page 2, lines 14-15; Machine Translation).
With regard to claim 6, Fujiwara teaches all the limitations of claim 1, and further teaches the first and second metal oxide layers (4 – Fig. 4) are electrically insulated from each other by only the electrically insulating seal (3 – Fig. 4).
With regard to claim 15, Fujiwara teaches all the limitations of claim 1, and further teaches the first metal oxide layer (4 – Fig. 4) is an approximate mirror image of the second metal oxide layer (4 – Fig. 4) about a mid-plane between the first and second metal oxide layers (see Fig. 4).
With regard to claim 16, Fujiwara teaches all the limitations of claim 1, and further teaches an emissive coating (page 3, lines 8-9; Machine Translation) formed over each of the first and second inner electrodes (25 – Fig. 4).
With regard to claim 19, Fujiwara teaches a method for manufacturing an electrical device (Fig. 1 – Fig. 4), the method comprising:
providing or forming a first metal oxide layer (4 – Fig. 4) (see left side) and a second metal oxide layer (4 – Fig. 4) (see right side) each having an outer side (see outer side in contact with 5 – Fig. 4) and an inner side (see inner side in contact with 25 – Fig. 4), such that the inner side has a pocket (F, inner side of 33 – Fig. 4) (see annotated figure below) defined by a floor (F – Fig. 4) (see annotated figure below) and a raised perimeter (see inner side of 33 – Fig. 4) around the floor (F – Fig. 4) (see annotated figure below);
forming first and second inner electrodes (25 – Fig. 4) on the inner sides of the first and second metal oxide layers (4 – Fig. 4) (see Fig. 4), respectively;
joining the raised perimeters of the inner sides of the first and second metal oxide layers (4 – Fig. 4) with an electrically insulating seal (3 – Fig. 4) (page 2, lines 14-15; Machine Translation); and
forming first and second outer electrodes (2, 5 – Fig. 4) on the outer sides of the first and second metal oxide layers (4 – Fig. 4) (see Fig. 4), respectively, such that the first outer electrode (2, 5 – Fig. 4), the first metal oxide layer (4 – Fig. 4) (see left side) and the first inner electrode (25 – Fig. 4) form a first metal oxide varistor (MOV) (MOV) (4 – Fig. 4) (page 2, lines 24-27; Machine Translation), the first inner electrode (25 – Fig. 4), the second inner electrode (25 – Fig. 4) and the respective pockets (F, inner side of 33 – Fig. 4) form a gas discharge tube (GDT) (6 – Fig. 2), and the second inner electrode (25 – Fig. 4), the second metal oxide layer (4 – Fig. 4) (see right side) and the second outer electrode (2, 5 – Fig. 4) form a second MOV (page 2, lines 24-27; Machine Translation).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 20 is rejected under 35 U.S.C. 103 as being unpatentable over Fujiwara (JP 2012212535 A) in view of Heath (US 2016/0276146 A1).
With regard to claim 20, Fujiwara teaches all the limitations of claim 19, but does not teach at least some steps are performed in an array format in which a plurality of units are joined in an array, with each unit corresponding to a partially or completely fabricated form of the electrical device.
Heath teaches at least some are performed in an array format in which a plurality of units are joined in an array ([0016] lines 1-9), with each unit corresponding to a partially or completely fabricated form of the electrical device ([0031] lines 1-8).
It would have been obvious to one having ordinary skill in the art before the effective filing date to modify the method for manufacturing the electrical device of Fujiwara, to have at least some steps are performed in an array format in which a plurality of units are joined in an array, with each unit corresponding to a partially or completely fabricated form of the electrical device, in order to have a high volume production and since the method for manufacturing is an obvious matter of design choice and doing so is within the ordinary capability of those skilled in the art.
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Fujiwara (JP 2012212535 A) – Annotated Fig. 4
Allowable Subject Matter
Claim(s) 17-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With regard to claim 17, in combination with other limitations of the claim, the prior art fails to teach or fairly suggest “each of the first and second metal oxide layers is free of a piezoelectric material.”
With regard to claim 18, in combination with other limitations of the claim, the prior art fails to teach or fairly suggest “each of the first and second metal oxide layers is free of a piezoelectric property.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Please see attached PTO-892.
Casey (US 2022/0115202 A1) teaches a gas discharge tube (GDT) can include first and second electrodes each including an edge and an inward facing surface, such that the inward facing surfaces of the first and second electrodes face each other. The GDT can further include a sealing portion implemented to join and seal the edge portions of the inward facing surfaces of the first and second electrodes to define a sealed chamber between the inward facing surfaces of the first and second electrodes. The GDT can further include an electrically insulating portion implemented to provide a surface in the sealed chamber and to cover a portion of the inward facing surface of each of at least one of the first and second electrodes such that a leakage path within the sealed chamber includes the surface of the electrically insulating portion.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nicolas Bellido whose telephone number is (571) 272-5034. The examiner can normally be reached Monday to Friday from 9:00 am to 5:00 pm.
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/N.B./Examiner, Art Unit 2838
/MONICA LEWIS/Supervisory Patent Examiner, Art Unit 2838