DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 8-9 & 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Stutzman et al. (US Patent 6212076) in view of Inaba et al. (US PG. Pub. 2013/0168136).
Regarding claim 1 - Stutzman teaches a printed circuit board (PCB) (figs. 3, 13 [column 3 line 28-29] Stutzman states, “a printed circuit board 13”) comprising: a first thermal pad (16A [column 3 lines 62-65] Stutzman states, “contact pads 16A have a dual purpose. A predetermined number of leads and contact pads function as electrical signal contacts and the remainder of the contacts serve as thermal and ground contacts”) on a first side (top side) of the PCB (13) for a first integrated circuit (IC) (15C [column 3 & 1 lines 56 & 12-13] Stutzman states, “memory component 15A includes external leads 17A…A memory component comprises a memory integrated circuit (IC)”) having a first exposed pad (17A [column 3 lines 58-60] Stutzman states, “external leads 17A…the leads are gull wing, J leaded type or compliant pins and are connected to contact pads 16A using solder”); a second thermal pad (16C [column 5 line 5-6] Stutzman states, “contact pads 16C”) on a second side (bottom side) of the PCB (13) for a second integrated circuit (IC) (15C [column 5 lines 4-6] Stutzman states, “memory component 15C has leads 17C connected to contact pads 16C”) having a second exposed pad (17C), wherein the first thermal pad (16A) and the second thermal pad (16C) overlap (claimed overlap structure shown in figure 3) at least partially in a direction perpendicular to a plane of the PCB (13; claimed structure shown in figure 3), a first geometric center of the first thermal pad (16A) and a second geometric center of the second thermal pad (16C) are aligned and overlap in the direction perpendicular to the plane of the PCB (13; overlap structure show in figures 3 and 4).
Stutzman fails to teach the printed circuit board (PCB) comprising: a plurality of thermal vias, the plurality of thermal vias traverse the first thermal pad, the second thermal pad, and the PCB.
Inaba teaches the printed circuit board (PCB) (fig. 2, 10 [paragraph 0025] Inaba states, “multilayer printed circuit board 10”) comprising: a first thermal pad (20 [paragraph 0032] Inaba states, “the third electrode 23 is electrically coupled with the first electrode 20 through the connection vies 30 so that heat can be transferred between the first electrode 20 and the third electrode 23 through the connection vias 30”) on a first side (11a) of the PCB (10); a second thermal pad (23) on a second side (11b) of the PCB (10); and a plurality of thermal vias (30 [paragraph 0033] Inaba states, “the connection vias 30 can transfer heat among the first electrode 20, the heat releasing conductor 22, and the third electrode 23”), the plurality of thermal vias (30) traverse the first thermal pad (20), the second thermal pad (23), and the PCB (10), wherein the first thermal pad (20) and the second thermal pad (23) overlap at least partially in a direction perpendicular to a plane of the PCB (10; claimed structure shown in figure 2), a first geometric center of the first thermal pad (20) and a second geometric center of the second thermal pad (23) are aligned and overlap in the direction perpendicular to the plane of the PCB (10; claimed structure shown in figure 2).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the printed circuit board having a first and second thermal pad on opposite sides of a PCB with a first and second IC thereon as taught by Stutzman with the a plurality of thermal vias traversing the first and second thermal pads and the PCB as taught by Inaba because Inaba states, “Because the heat releasing conductor 22 is coupled with the first electrode 20 through the connection vias 30, the heat generated from the electronic component 100 is easily transferred. In other words, a heat capacity of a conductor coupled with the electronic component 100 increases compared with a case in which only the first electrode 20 is disposed. Accordingly, the heat generated from the electronic component 100 can be released more efficiently” [paragraph 0038].
Regarding claim 2 – Stutzman in view of Inaba teach the PCB according to Claim 1, wherein a first end (Inaba; fig. 2, top end of 30) of each thermal via (30) connecting to the first thermal pad (20) and a second end (bottom end of 30) of each thermal via (30) connecting to the second thermal pad (23).
Regarding claim 3 – Stutzman in view of Inaba teach the PCB according to claim 1, wherein the first thermal pad (Inaba; fig. 2, 20) and the second thermal pad (23) are substantially identical ([paragraph 0032] Inaba states, “the area of the third electrode 23 is same as the area of the first electrode 20 as an example”; figure 2 shows the pads having the same structural features and are considered “substantially identical”).
Regarding claim 4 – Stutzman in view of Inaba teach the PCB according to Claim 1, wherein the PCB (Stutzman; fig. 3, 13) further comprises the first IC (15A), the first exposed pad (17A) of the first IC (15A) is connected to the first thermal pad (16A) of the PCB (13).
Regarding claim 5 – Stutzman in view of Inaba teach the PCB according to claim 1, wherein the PCB further comprises the second IC (Stutzman; fig. 3, 15C), the second exposed pad (17C) of the second IC (15C) is connected to the second thermal pad (16C) of the PCB (13).
Regarding claim 8 – Stutzman in view of Inaba teach a layout structure for the PCB according to claim 1, the layout structure comprising: a first footprint (Stutzman; fig. 3, see footprint on top surface) on a first side of the layout structure for the first IC (15A) to be populated on the PCB (13); and a second footprint (see footprint on bottom surface) on a second side of the layout structure for the second IC (15C) to be populated on the PCB (13); wherein the first footprint and the second footprint overlap at least partially in the direction perpendicular to the plane of the PCB (13; claimed structure shown in figure 3).
Regarding claim 9 – Stutzman in view of Inaba teach the layout structure according to claim 8, wherein first and second geometric centers of the first footprint and the second footprint, respectively, are aligned and overlap in the direction perpendicular to the plane of the PCB (Stutzman; fig. 3, 13; claimed structure shown in figure 3).
Regarding claim 19 – Stutzman teaches a Printed Circuit Board (PCB) (figs. 3, 13 [column 3 line 28-29] Stutzman states, “a printed circuit board 13”) comprising: a first thermal pad (16A [column 3 lines 62-65] Stutzman states, “contact pads 16A have a dual purpose. A predetermined number of leads and contact pads function as electrical signal contacts and the remainder of the contacts serve as thermal and ground contacts”) on a first side (top side) of the PCB (13) for a first integrated circuit (IC) (15C [column 3 & 1 lines 56 & 12-13] Stutzman states, “memory component 15A includes external leads 17A…A memory component comprises a memory integrated circuit (IC)”) having a first exposed pad (17A [column 3 lines 58-60] Stutzman states, “external leads 17A…the leads are gull wing, J leaded type or compliant pins and are connected to contact pads 16A using solder”); and a second thermal pad (16C [column 5 line 5-6] Stutzman states, “contact pads 16C”) on a second side (bottom side) of the PCB (13) for a second integrated circuit (IC) (15C [column 5 lines 4-6] Stutzman states, “memory component 15C has leads 17C connected to contact pads 16C”) having a second exposed pad (17C), wherein the first thermal pad (16A) and the second thermal pad (16C) overlap at least partially in a direction perpendicular to a plane of the PCB (13; claimed structure shown in figure 3), a first geometric center of the first thermal pad (16A) and a second geometric center of the second thermal pad (16C) are aligned and overlap in the direction perpendicular to the plane of the PCB (13; overlap structure show in figure 3).
Stutzman fails to teach wherein the first thermal pad and the second thermal pad have different dimensions.
Inaba teaches the printed circuit board (PCB) (fig. 10, 10 [paragraph 0025] Inaba states, “multilayer printed circuit board 10”) comprising: a first thermal pad (20 [paragraph 0032] Inaba states, “first electrode 20”) on a first side (11a) of the PCB (10); a second thermal pad (lowermost pad 22(23) [paragraph 0040] Inaba states, “heat releasing conductor 22”) on a second side (11b) of the PCB (10); wherein the first thermal pad (20) and the second thermal pad (22(23)) overlap at least partially in a direction perpendicular to a plane of the PCB (10; claimed structure shown in figure 2), a first geometric center of the first thermal pad (20) and a second geometric center of the second thermal pad (22(23)) are aligned and overlap in the direction perpendicular to the plane of the PCB (10; claimed structure shown in figure 2), wherein the first thermal pad (20) and the second thermal pad (22(23)) have different dimensions ([paragraph 0038] Inaba states, “the area of the heat releasing conductor 22 is larger than the area of the first electrode 20”; annotated figure 10 below shows the lowermost thermal pad 22(23) being dimensionally larger than that of the first thermal pad 20).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the printed circuit board having a first and second thermal pad on opposite sides of a PCB with a first and second IC thereon as taught by Stutzman with the first and second thermal pads having different dimensions as taught by Inaba because Inaba states, “because the heat releasing performance can be improved without increasing the area of the first electrode 20” [paragraph 0042].
PNG
media_image1.png
666
883
media_image1.png
Greyscale
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Stutzman in view of Inaba et al. as applied to claim 1 above, and further in view of Eckhardt et al. (US PG. Pub. 2003/0142233).
Regarding claim 7 – Stutzman in view of Inaba teach the PCB according to Claim 1, wherein the PCB (Stutzman; fig. 3, 13) further comprises the first IC (15A) and the second IC (15C).
Stutzman in view of Inaba fail to teach wherein the first IC and the second IC are video serializer and video deserializer, respectively.
Eckhardt teaches wherein the first IC and the second IC are video serializer (fig. 4 [paragraph 0036] Eckhardt states, “Fig. 4 is a block diagram of an exemplary video serializer 200…The serializer 200 is preferably included on a single integrated circuit (IC)”) and video deserializer (fig. 1 [paragraph 0011] Eckhardt states, “Fig. 1 is a block diagram of an exemplary auto-configurable video deserializer 10…The deserializer 10 is preferably included on a single integrated circuit (IC)”), respectively.
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the PCB having a first and second IC as taught by Stutzman in view of Inaba with the first and second IC being a video serializer and a video deserializer as taught by Eckhardt because these types of IC devices allow for video processing/converting while maintaining signal quality of the video.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-5, 7-9 & 19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wen et al. (US PG. Pub. 2012/0181067) discloses a circuit board.
Febvre et al. (US PG. Pub. 2023/0371167) discloses a substrate for an electronic chip.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN T SAWYER whose telephone number is (571)270-5469. The examiner can normally be reached M-F 8:30 am - 5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at 5712722342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/STEVEN T SAWYER/Primary Examiner, Art Unit 2847
Prosecution Insights