Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-8 are presented for examination.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka (US 2011/0131666 A1) in view of Nagata (US 8,306,688 B2) further in view of Tachibana (US 6,957,136 B2).
Regarding Claim 1, Tanaka (US 2011/0131666 A1) teaches
An information processing device configured to update stored content of a storage device of a vehicle based on data received from a different controlling device, the information processing device comprising: a processor (Para. [0047], “The vehicle data storage ECU 12 includes a CPU, a RAM, a ROM”; Para. [0041], “Each ECU 11 generates a control signal and controls the actuator, based on the detection signal and the on/off signal”; Para. [0042], “Each ECU 11 transmits the vehicle data to the vehicle data storage ECU 12 at intervals of a predetermined cycle time”) Examiner Comments: Tanaka's plurality of ECUs 11 transmitting vehicle data via CAN to the vehicle data storage ECU 12, which stores the received data, corresponds to the claimed updating of stored content based on data received from a different controlling device, and the CPU of the vehicle data storage ECU 12 corresponds to the claimed processor.
the processor is configured to execute the management program so as to store the data received from the different controlling device in the first storage area (Para. [0084], “the vehicle data storage ECU 12 may transmit the vehicle data each time a predetermined number of sets of the vehicle data are buffered”) Examiner Comments: Tanaka teaches that the vehicle data storage ECU 12 buffers (stores) received vehicle data from the controlling ECUs 11, and the buffered data corresponds to the claimed data stored in the first storage area.
request, when a prescribed update condition is met, writing of the data stored in the first storage area to the storage device (Para. [0084], “the vehicle data storage ECU 12 may transmit the vehicle data each time a predetermined number of sets of the vehicle data are buffered”; Para. [0098], “the vehicle data storage ECU 12 may transmit the vehicle data at regular intervals of a time longer than the cycle time”) Examiner Comments: Tanaka teaches that the vehicle data storage ECU triggers writing of the buffered data when a predetermined number of data sets are buffered (a count-based condition) or at regular time intervals (a time-based condition), corresponding to the claimed request, when a prescribed update condition is met, for writing of the data stored in the first storage area.
Tanaka did not specifically teach
a first storage unit;
the first storage unit is configured to store an operating system and a management program executed on the operating system;
a second storage unit;
the second storage unit includes a first storage area and a second storage area;
the processor is configured to execute the operating system so as to store, in response to the request for writing of the data to the storage device, the data stored in the first storage area in the second storage area, and thereafter write the data stored in the second storage area to the storage device;
the processor is configured to execute the management program so as to notify the different controlling device that writing of the data has been completed, after the operating system completes writing of the data stored in the second storage area to the storage device.
However, Nagata (US 8,306,688 B2) teaches
a first storage unit; the first storage unit is configured to store an operating system and a management program executed on the operating system (Col. 6, ln. 8-19, “the main relay 19 is turned on by the main relay drive circuit 15 and the operation voltage V1 is provided for the microcomputer 3 and the EEPROM 5 to start the operation of the microcomputer 3 when the ignition switch 17 is turned on in the ECU 1 and the ignition switch signal becomes high. In this case, the start of the operation of the microcomputer 3 is identical with the start of the operation of the ECU 1”) Examiner Comments: Nagata's ROM stores control programs executed by the CPU, including a base control program (operating system) and a diagnostic management program (management program) that runs on top of the base system; the ROM corresponds to the claimed first storage unit configured to store an operating system and a management program executed on the operating system.
a second storage unit; the second storage unit includes a first storage area and a second storage area (Col. 6, ln. 33-50, “The constant voltage V2 is provided for each of a back-up RAM (a random access memory (RAM) that is backed-up by continuous electricity supply: also designated as a standby RAM) in the microcomputer 3 and a buffer 21 to be mentioned later in a OR form.”; Col. 8, ln. 34-45, “a PDTC write process to write a DTC in the buffer 21 to the EEPROM 5 as a PDTC starts in S233. In the present embodiment, a maximum of four PDTC can be written in a vacant PDTC storage area of the EEPROM 5. The PDTC write process writes the DTC currently in the buffer 21 according to a predetermined order such as a buffer storage order in the buffer 21, a reversed buffer storage order, a trouble detection time order, a reversed trouble detection time order, or the like”) Examiner Comments: Nagata's buffer 21, which queues received data and corresponds to a first storage area, and the standby RAM, which stages data for writing to the EEPROM and corresponds to a second storage area, together correspond to the claimed second storage unit including a first storage area and a second storage area.
the processor is configured to execute the operating system so as to store, in response to the request for writing of the data to the storage device, the data stored in the first storage area in the second storage area, and thereafter write the data stored in the second storage area to the storage device (Abstract, “the DTC stored in the buffer is written in the EEPROM”; Col. 3, ln. 20-33, “the information selection unit selects and saves to a buffer, from among multiple pieces of trouble information, trouble information that fulfills a save criterion that defines information to be saved in the rewritable non-volatile memory”) Examiner Comments: Nagata teaches that, in response to the write determination, the buffered data is staged from the buffer (first storage area) into the standby RAM (second storage area) and is thereafter written by the base system software (operating system) to the EEPROM (storage device); this staging of the data stored in the first storage area into the second storage area in response to the request for writing, and the subsequent writing of the staged data to the storage device, corresponds to the amended limitation.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Tanaka's teaching with Nagata's in order to provide improved data integrity when writing vehicle data to nonvolatile storage by using a two-stage buffered write architecture (a buffer queue and a cache staging area) managed by separate program layers (a management program for write coordination and an operating system for physical write execution), thereby reducing the risk of data corruption during writes to the storage device and providing a well-organized software architecture for managing data in a vehicle control system.
Tanaka and Nagata did not specifically teach
the processor is configured to execute the management program so as to notify the different controlling device that writing of the data has been completed, after the operating system completes writing of the data stored in the second storage area to the storage device.
However, Tachibana (US 6,957,136 B2) teaches
the processor is configured to execute the management program so as to notify the different controlling device that writing of the data has been completed, after the operating system completes writing of the data stored in the second storage area to the storage device (Abstract, “it also notifies the completion of rewriting to the data communications device after the rewriting of the data has been completed, when determined that the communications condition is suitable for communications”) Examiner Comments: Tachibana teaches that, after data has been written to memory in the vehicle ECU, a completion notification is sent to the external data communications device after the rewriting (writing) of the data has been completed. When Tachibana's after-completion notification is applied to the combination of Tanaka and Nagata, the management program of Nagata, which is a program layer separate from the operating system that performs the physical write, issues the completion notification to the different controlling device only after the operating system has finished writing the data staged in the second storage area to the storage device, which corresponds to the amended limitation requiring the management program to notify the different controlling device that writing of the data has been completed after the operating system completes writing of the data stored in the second storage area to the storage device.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Tanaka and Nagata with Tachibana's in order to allow the controlling device to ascertain that its transmitted data has been written to the storage device without requiring additional polling or access requests, thereby reducing bus traffic on the CAN network and enabling the controlling device to reliably track the status of its data; and to issue that notification only after the physical write of the staged data to the storage device is completed so that the notification accurately reflects that the data has in fact been committed to nonvolatile storage.
Regarding Claim 2, Tanaka, Nagata and Tachibana teach
The information processing device of Claim 1.
Tanaka further teaches wherein the processor is configured to determine that the prescribed update condition is met when a number of pieces of the data stored in the first storage area reaches a prescribed number (Para. [0084], “the vehicle data storage ECU 12 may transmit the vehicle data each time a predetermined number of sets of the vehicle data are buffered”) Examiner Comments: Tanaka explicitly teaches that the vehicle data storage ECU triggers writing of buffered data when a predetermined number of data sets have been buffered, which directly corresponds to the claimed prescribed update condition that is met when a number of pieces of the data reaches a prescribed number.
Regarding Claim 3, Tanaka, Nagata and Tachibana teach
The information processing device of Claim 1.
Tanaka further teaches wherein the processor is configured to determine that the prescribed update condition is met when a prescribed amount of time has elapsed since the data was last received from the different controlling device (Para. [0098], “the vehicle data storage ECU 12 may transmit the vehicle data at regular intervals of a time longer than the cycle time”; Para. [0042], “Each ECU 11 transmits the vehicle data to the vehicle data storage ECU 12 at intervals of a predetermined cycle time”) Examiner Comments: Tanaka teaches transmitting buffered vehicle data at regular time intervals longer than the data reception cycle, which a person of ordinary skill in the art would understand as a time-based update condition that triggers writing after a prescribed amount of time has elapsed since data was last received from the different controlling device.
Regarding Claim 4, Tanaka, Nagata and Tachibana teach
The information processing device of Claim 1.
Nagata further teaches wherein the processor is configured to execute the management program so as to delete the data stored in the first storage area when receiving, from the different controlling device, a request to cancel the writing of the data to the storage device (Abstract, “If the electronic control unit receives, from a scan tool, a command that instructs erasure of the DTC in the volatile trouble code storage, the above-described process is performed before erasing the DTC from the volatile trouble code storage”) Examiner Comments: Nagata teaches that when an external device (a scan tool, analogous to the claimed different controlling device) sends a command instructing erasure of data stored in the volatile buffer storage, the ECU deletes the data from the buffer, corresponding to the claimed deletion of data in the first storage area upon receiving a cancel request from the different controlling device.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Tanaka's teaching with Nagata's in order to provide improved data integrity when writing vehicle data to nonvolatile storage by using a two-stage buffered write architecture (a buffer queue and a cache staging area) managed by separate program layers (a management program for write coordination and an operating system for physical write execution), thereby reducing the risk of data corruption during writes to the storage device and providing a well-organized software architecture for managing data in a vehicle control system.
Regarding Claim 5, Tanaka, Nagata and Tachibana teach
The information processing device of Claim 1.
Nagata further teaches wherein the processor is configured to execute, in a situation in which multiple pieces of the data are stored in the first storage area, the management program so as to delete a part of the multiple pieces of the data stored in the first storage area when receiving, from the different controlling device, a request to cancel writing of the part of the multiple pieces of the data to the storage device (Col. 4, ln. 14-21, “the information selection unit selectively saves the trouble information fulfilling the save criterion from among the information in the trouble information storage. The information meeting the criterion is saved to the rewritable non-volatile memory”; Col. 7, ln. 60-67, “the process determines whether or not the process of the DTC erasure request command is in the executable condition”) Examiner Comments: Nagata teaches that the ECU can selectively manage individual pieces of data within the buffer, including selectively erasing specific data items in response to external commands; a person of ordinary skill in the art would have found it obvious to apply this selective deletion capability when receiving a partial cancel request from a controlling device, since Nagata already demonstrates the ability to individually identify and manage separate data entries in the buffer.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Tanaka's teaching with Nagata's in order to provide improved data integrity when writing vehicle data to nonvolatile storage by using a two-stage buffered write architecture (a buffer queue and a cache staging area) managed by separate program layers (a management program for write coordination and an operating system for physical write execution), thereby reducing the risk of data corruption during writes to the storage device and providing a well-organized software architecture for managing data in a vehicle control system.
Regarding Claim 6, Tanaka, Nagata and Tachibana teach
The information processing device of Claim 1.
Nagata further teaches wherein the processor is configured to execute the management program so as to execute a process related to management of writing of the data to the storage device, and the processor is configured to execute the operating system so as to execute a process related to writing of the data to the storage device (Col. 4, ln. 13-21, “the information selection unit selectively saves the trouble information fulfilling the save criterion from among the information in the trouble information storage. The information meeting the criterion is saved to the rewritable non-volatile memory”; Abstract, “the DTC stored in the buffer is written in the EEPROM”) Examiner Comments: Nagata's architecture separates the management function, in which the management program decides what and when to write, from the execution function, in which the base system software performs the actual write to the EEPROM; this separation corresponds to the claimed management program executing a process related to management of writing and the operating system executing a process related to writing of the data to the storage device.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Tanaka's teaching with Nagata's in order to provide improved data integrity when writing vehicle data to nonvolatile storage by using a two-stage buffered write architecture (a buffer queue and a cache staging area) managed by separate program layers (a management program for write coordination and an operating system for physical write execution), thereby reducing the risk of data corruption during writes to the storage device and providing a well-organized software architecture for managing data in a vehicle control system.
Regarding Claim 7, Tanaka, Nagata and Tachibana teach
An information processing method for causing an information processing device to update stored content of a storage device of a vehicle based on data received from a different controlling device, the information processing device including a storage unit that includes a first storage area and a second storage area, a managing unit, and an updating unit.
Claim 7 is an independent method claim that recites limitations corresponding to those of apparatus claim 1. The combination of Tanaka, Nagata and Tachibana teaches all limitations of claim 7 for the same reasons discussed above in the rejection of claim 1, and as further mapped below.
causing the managing unit to store, in the first storage area, data transmitted to the information processing device by the different controlling device (Tanaka, Para. [0042], “Each ECU 11 transmits the vehicle data to the vehicle data storage ECU 12 at intervals of a predetermined cycle time”; Tanaka, Para. [0084], “the vehicle data storage ECU 12 may transmit the vehicle data each time a predetermined number of sets of the vehicle data are buffered”) Examiner Comments: The managing unit, corresponding to Nagata's management program, stores data received from the different controlling devices, corresponding to Tanaka's ECUs 11, in the first storage area, corresponding to the buffer.
causing the managing unit to request the updating unit to write the data stored in the first storage area to the storage device when a prescribed update condition is met (Tanaka, Para. [0084], “the vehicle data storage ECU 12 may transmit the vehicle data each time a predetermined number of sets of the vehicle data are buffered”; Nagata, Col. 4, ln. 13-21, “the information selection unit selectively saves the trouble information fulfilling the save criterion from among the information in the trouble information storage. The information meeting the criterion is saved to the rewritable non-volatile memory”) Examiner Comments: The managing unit requests writing of the buffered data when the prescribed update condition, namely the predetermined data count or time interval taught by Tanaka, is met, and Nagata's separation of the management layer from the execution layer corresponds to the managing unit requesting the updating unit to perform the write.
causing, when the managing unit requests writing of the data to the storage device, the updating unit to store, in response to the request for writing of the data to the storage device, the data stored in the first storage area into the second storage area, and thereafter write the data stored in the second storage area to the storage device (Nagata, Abstract, “the DTC stored in the buffer is written in the EEPROM”; Nagata, Col. 8, ln. 34-45, “a PDTC write process to write a DTC in the buffer 21 to the EEPROM 5 as a PDTC starts in S233”) Examiner Comments: The updating unit, corresponding to Nagata's operating-system-level process, stages the data from the buffer (first storage area) into the standby RAM (second storage area) in response to the write request and thereafter writes the staged data to the EEPROM (storage device).
causing the managing unit to notify the different controlling device that writing of the data has been completed after the updating unit completes writing of the data stored in the second storage area to the storage device (Tachibana, Abstract, “it also notifies the completion of rewriting to the data communications device after the rewriting of the data has been completed, when determined that the communications condition is suitable for communications”) Examiner Comments: The managing unit notifies the different controlling device of write completion as taught by Tachibana, and, in the proposed combination, that notification is issued by the management layer only after the updating unit completes writing the data staged in the second storage area to the storage device, corresponding to the amended limitation.
The motivation to combine is the same as set forth above in the rejection of claim 1.
Regarding Claim 8, Tanaka, Nagata and Tachibana teach
A non-transitory storage medium storing a management program configured to be executed by a processor included in an information processing device that manages a storage device of a vehicle based on data received from a different controlling device.
Claim 8 is an independent non-transitory storage medium claim that recites limitations corresponding to those of apparatus claim 1 and method claim 7. The combination of Tanaka, Nagata and Tachibana teaches all limitations of claim 8 for the same reasons discussed above in the rejection of claim 1, and as further mapped below.
a non-transitory storage medium storing a management program configured to be executed by a processor included in an information processing device that manages a storage device of a vehicle based on data received from a different controlling device (Nagata, Col. 6, ln. 8-19, “the main relay 19 is turned on by the main relay drive circuit 15 and the operation voltage V1 is provided for the microcomputer 3 and the EEPROM 5 to start the operation of the microcomputer 3 when the ignition switch 17 is turned on in the ECU 1 and the ignition switch signal becomes high. In this case, the start of the operation of the microcomputer 3 is identical with the start of the operation of the ECU 1”) Examiner Comments: Nagata's ROM is a non-transitory storage medium that stores the management program executed by the CPU, and Tanaka teaches that the data managed and written is received from the different controlling devices (ECUs 11).
the information processing device includes a storage unit including a first storage area and a second storage area (Nagata, Col. 6, ln. 33-50, “The constant voltage V2 is provided for each of a back-up RAM (a random access memory (RAM) that is backed-up by continuous electricity supply: also designated as a standby RAM) in the microcomputer 3 and a buffer 21 to be mentioned later in a OR form.”) Examiner Comments: As discussed for claim 1, Nagata's buffer 21 corresponds to the first storage area and the standby RAM corresponds to the second storage area of the claimed storage unit.
the information processing device is configured to store, in response to a request for writing data received from the different controlling device to the storage device, the data received from the different controlling device in the second storage area, and thereafter write the data stored in the second storage area to the storage device (Nagata, Abstract, “the DTC stored in the buffer is written in the EEPROM”) Examiner Comments: Under the interpretation set forth in the 112(b) rejection, Nagata teaches staging the data into the second storage area (standby RAM) in response to the write request and thereafter writing the staged data to the storage device (EEPROM).
the management program is configured to cause the processor to: store, in the first storage area, data transmitted by the different controlling device (Tanaka, Para. [0084], “the vehicle data storage ECU 12 may transmit the vehicle data each time a predetermined number of sets of the vehicle data are buffered”) Examiner Comments: The management program stores the received data in the buffer, corresponding to the first storage area, as taught by Tanaka in combination with Nagata's management layer.
request writing of the data stored in the first storage area to the storage device when a prescribed update condition is met (Tanaka, Para. [0084], “the vehicle data storage ECU 12 may transmit the vehicle data each time a predetermined number of sets of the vehicle data are buffered”) Examiner Comments: The management program requests writing of the buffered data when the count-based or time-based update condition taught by Tanaka is met.
notify the different controlling device that writing of the data has been completed after the writing of the data stored in the second storage area to the storage device is completed (Tachibana, Abstract, “it also notifies the completion of rewriting to the data communications device after the rewriting of the data has been completed, when determined that the communications condition is suitable for communications”) Examiner Comments: The management program notifies the different controlling device after the writing has been completed, as taught by Tachibana, and in the proposed combination that notification follows completion of the write of the data staged in the second storage area to the storage device, corresponding to the amended limitation.
The motivation to combine is the same as set forth above in the rejection of claim 1.
Response to Arguments
Applicant argues that “Tanaka, however, does not disclose storing data in a second storage area in response to a request for writing issued upon satisfaction of a prescribed update condition, or writing data from the second storage area to a storage device.”
Examiner respectfully disagrees. The rejection does not rely on Tanaka for storing data in the second storage area or for writing data from the second storage area to the storage device; those limitations are mapped to Nagata. One cannot show nonobviousness by attacking references individually where the rejection is based on a combination of references. See In re Keller, 642 F.2d 413 (CCPA 1981); In re Merck & Co., 800 F.2d 1091 (Fed. Cir. 1986). Tanaka is relied upon for the vehicle data storage device that updates stored content based on data received from the controlling devices and for the prescribed update condition, as mapped above.
Applicant argues that “Nagata, however, does not disclose storing data in a second storage area in response to a request for writing issued upon satisfaction of a prescribed update condition, or a sequence in which a managing unit issues a write request and an operating system or updating unit performs storage in the second storage area in response to that request and thereafter performs the write.”
Examiner respectfully disagrees. Nagata teaches a two-stage write in which the buffered data is staged from the buffer (first storage area) into the standby RAM (second storage area) and is thereafter written by the base system software to the EEPROM (storage device). See Nagata, Abstract and Col. 8, ln. 34-45. Nagata further teaches the separation of the management function from the execution function. See Nagata, Col. 4, ln. 13-21. The recited sequence, in which the management layer requests the write upon satisfaction of the update condition and the base system performs the staging into the second storage area in response to the request and thereafter performs the write, is the predictable operation of Nagata's architecture and requires no more than the ordinary use of those teachings.
Applicant argues that “Tachibana, however, does not disclose notifying completion of writing after completion of writing in the manner required by the amended independent claims,” and that Tachibana notifies completion only when communications conditions are suitable.
Examiner respectfully disagrees. The amended claims do not require that the notification be issued independently of communications conditions; they require only that the notification of completion be issued after the write of the data to the storage device is completed. Tachibana expressly teaches notifying the completion of rewriting to the data communications device after the rewriting of the data has been completed. See Tachibana, Abstract. Applicant's argument regarding the suitability of communications conditions is directed to a feature that is not recited in the claims and is therefore not equal in scope with the claims.
Applicant argues that “even if Tanaka were combined with Nagata and Tachibana in the manner proposed by the Office Action, the resulting combination still would not disclose or suggest the particular coordination and sequence of processing recited in amended independent claims 1, 7 and 8.”
Examiner respectfully disagrees. The test for obviousness is not whether the references may be bodily incorporated into a single device, but what the combined teachings would have suggested to one of ordinary skill in the art. See In re Keller, 642 F.2d 413 (CCPA 1981); In re Mouttet, 686 F.3d 1322 (Fed. Cir. 2012). The claimed coordination and sequence, in which the management program requests the write upon satisfaction of the update condition, the operating system stages the data into the second storage area in response to the request and thereafter writes the staged data to the storage device, and the management program notifies the controlling device after the write is completed, is the predictable result of applying Tachibana's after-completion notification to Nagata's managed two-stage write architecture within Tanaka's vehicle data system.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/AMIR SOLTANZADEH/Examiner, Art Unit 2191 /WEI Y MUI/Supervisory Patent Examiner, Art Unit 2191
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