Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
2. This office action is in response to the amendment filed on 04/16/2024. Claims 1-14 are pending and have been considered below.
Claim Rejections - 35 USC § 103
3. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claims 1, 4-6, 10 and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Terasaki (US2023/0033927) in view of Alsaleem et al. (US2022/0041433).
Claim 1. Terasaki discloses a physical reservoir element comprising a first input terminal, a second input terminal, a first output terminal, and a first nonlinear circuit (a physical reservoir element 1 having multiple physical units U1–Un. Each unit has an input terminal t1, resistor R, capacitor C, switching element SW, output terminal t2, and control terminal t3.)( “Circuit Constitution of Reservoir Element,” Fig. 2 and Fig. 3)…(..the reservoir stores an input signal and converts it to another signal, and that the reservoir projects the input into a multidimensional nonlinear space) ([0039]), wherein the first input terminal is configured to be connectable to an input source for transmitting an input signal to the physical reservoir (The input terminal t1 is a terminal for inputting a signal to a unit.)([0047]), wherein the second input terminal is configured to be connectable to one or more other physical reservoir elements (..each unit U1–Un is individually connected to a different unit, and specifically: output terminal t2 of first unit U1 is connected to input terminal t1 of second unit U2) ([0043])…( The operation section reiterates: U1's output is input to U2; a signal is propagated between units; the units therefore form an interconnected reservoir [Operation of Reservoir Element])([0067]-[0068]), wherein the first nonlinear circuit is disposed between the first input terminal and the first sample-and-hold circuit (nonlinear conversion resulting from the physical RC reservoir unit and further states that differing RC time constants produce different frequency characteristics so that an input signal is converted in a nonlinear manner…the signal is converted nonlinearly as it propagates through the units and that the reservoir possesses both nonlinearity and memory) ([0044]),
wherein a second terminal of the first sample-and-hold circuit is connected to the first output terminal (Fig. 3 unit contains: resistor R → capacitor C → switching element SW → output terminal t2…. after sufficient charge has accumulated in C, SW is turned on and the accumulated charge is discharged, producing a signal at output terminal t2) ([0065]),
wherein the first output terminal is configured to be connectable to one or more other physical reservoir elements (output terminal t2 of first unit U1 is connected to input terminal t1 of second unit U2)([0019]-[0020], [0043]), and
Terasaki fails to explicitly disclose first sample-and-hold circuit; wherein a first terminal of the first sample-and-hold circuit is configured to receive a joined signal which is obtained by joining signals from the first input terminal and the second input terminal,
wherein the first sample-and-hold circuit holds and converts the joined signal.
However, Alsaleem discloses first sample-and-hold circuit ([0079]); wherein a first terminal of the first sample-and-hold circuit is configured to receive a joined signal which is obtained by joining signals from the first input terminal and the second input terminal (a reservoir input together with delayed feedback: the modulated input is supplied to the reservoir; a delayed reservoir signal is fed back; a feedback gain is applied; the delayed feedback and current input interact in generating the reservoir state….MEMS deflection is delayed, multiplied by a feedback gain, and that the feedback produces interactions between different nodes and additional memory) ([0079],[0081]),
wherein the first sample-and-hold circuit holds and converts the joined signal (holding operation: input is sampled; sample is held; and held sample becomes discretized input.) ([0079]). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Terasaki further in view of Alsaleem to incorporate the above cited features. One would have been motivated to do so in order to facilitate retaining of an analog state, yielding predictable reservoir memory and nonlinear processing.
Claim 4. Terasaki and Alsaleem disclose the physical reservoir element according to claim 1, Alsaleem further discloses comprising a second sample-and-hold circuit, wherein the second sample-and-hold circuit is disposed between the second terminal of the first sample-and-hold circuit and the first output terminal ([0098]). One would have been motivated to do so in order to facilitate retaining of an analog state, yielding predictable reservoir memory and nonlinear processing.
Claim 5. Terasaki and Alsaleem disclose the physical reservoir element according to claim 1, Terasaki further discloses comprising a resistor, wherein the resistor is disposed between the second terminal of the first sample-and-hold circuit and the first output terminal (Fig. 3 unit contains: resistor R → capacitor C → switching element SW → output terminal t2).. (nonlinear conversion resulting from the physical RC reservoir unit and further states that differing RC time constants produce different frequency characteristics so that an input signal is converted in a nonlinear manner…the signal is converted nonlinearly as it propagates through the units and that the reservoir possesses both nonlinearity and memory) ([0044]).
Claim 6. Terasaki and Alsaleem disclose the physical reservoir element according to claim 1, Alsaleem further discloses comprising a gain adjustment circuit, wherein the gain adjustment circuit is disposed between the second terminal of the first sample-and-hold circuit and the first output terminal (the delayed MEMS deflection is multiplied by a feedback gain, and states that this feedback provides interaction between reservoir nodes and additional memory) ([0081]). One would have been motivated to do so in order to facilitate retaining of an analog state, yielding predictable reservoir memory and nonlinear processing.
Claim 10. Supra Claim 1 and Terasaki further discloses a physical reservoir comprising a plurality of physical reservoir elements, wherein at least one of the plurality of physical reservoir elements is the physical reservoir element (a physical reservoir element 1 having multiple physical units U1–Un. Each unit has an input terminal t1, resistor R, capacitor C, switching element SW, output terminal t2, and control terminal t3.)( “Circuit Constitution of Reservoir Element,” Fig. 2 and Fig. 3).
Claim 13. Terasaki and Alsaleem disclose the physical reservoir according to claim 10, Terasaki further discloses wherein each of the plurality of physical reservoir elements includes the first nonlinear circuit, and wherein nonlinear characteristics of the first nonlinear circuit in at least one of the plurality of physical reservoir elements are different from nonlinear characteristics of the first nonlinear circuit in the other physical reservoir elements of the plurality of physical reservoir elements (At least one unit of the plurality of units differs from other units in an RC time constant) ([0014]-[0016])..(different RC time constants produce different frequency characteristics; those differences cause an input signal to be converted in a nonlinear manner; resistance values can differ among units; capacitance values can differ among units.)([0015]-[0016],[0026],[0044])..( as a signal propagates between units, it is converted nonlinearly and that the resulting variance in RC time constants produces the nonlinearity)([0067]).
Claim 14. Supra claim 1 and Alsaleem further discloses an information processing device comprising the physical reservoir according to claim 10 ([0075], abstract).
5. Claims 3 and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Terasaki (US2023/0033927) in view of Alsaleem et al. (US2022/0041433) and further in view of Liang et al. (Rotating neurons for all-analog implementation of cyclic reservoir computing; 2022).
Claim 3. Terasaki and Alsaleem disclose the physical reservoir element according to claim 1, but fail to explicitly disclose further comprising a second nonlinear circuit, wherein the second nonlinear circuit is disposed between the second input terminal and the first sample-and-hold circuit.
However, Liang discloses nonlinear processing in the dynamic neuron, using the diode DReLU as the nonlinear activation and Rint/Cint as the dynamic integration circuit (p. 4, fig. 2b-c). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Terasaki further in view of Liang to incorporate the above cited features. One would have been motivated to do so in order to facilitate high performance reservoir computing.
Claim 11. Terasaki and Alsaleem disclose the physical reservoir according to claim 10, but fail to explicitly disclose wherein at least some of the plurality of physical reservoir elements are connected in a ring shape.
However, Liang discloses wherein at least some of the plurality of physical reservoir elements are connected in a ring shape (a cyclic reservoir in which the randomly connected neurons are replaced by a ring structure. The corresponding Fig. 1(b) is explicitly captioned as a simplified/cyclic reservoir) (p. 2)….( the reservoir connection matrix becomes a cyclic topology and that the matrix corresponds to a one-time shift in a ring structure.)(p. 3). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Terasaki further in view of Liang to incorporate the above cited features. One would have been motivated to do so in order to facilitate high performance reservoir computing.
Claim 12. Terasaki and Alsaleem disclose the physical reservoir according to claim 11, but fail to explicitly disclose further comprising a plurality of physical reservoir units in which the plurality of physical reservoir elements are connected in a ring shape, wherein at least two of the plurality of physical reservoir units are connected in series or in parallel.
However, Liang discloses a plurality of physical reservoir units in which the plurality of physical reservoir elements are connected in a ring shape, wherein at least two of the plurality of physical reservoir units are connected in series or in parallel (a complete eRNR architecture including M parallel N-neuron eRNRs. The text states that multiple parallel RNRs can share a common input and use different input-weight configurations to increase state richness) (p. 4, fig. 2f)….( the prototype was constructed with eight parallel reservoir circuits.)(p. 2). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Terasaki further in view of Liang to incorporate the above cited features. One would have been motivated to do so in order to facilitate high performance reservoir computing.
6. Claims 2, and 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Terasaki (US2023/0033927) in view of Alsaleem et al. (US2022/0041433) and further in view of Rowlands et al. (US2022/0012623).
Claim 2. Terasaki and Alsaleem disclose the physical reservoir element according to claim 1, but fail to explicitly disclose further comprising a second output terminal connected to the second terminal, wherein the second output terminal is configured to be connectable to a read-out for outputting a signal to the outside of the physical reservoir.
However, Rowlands discloses (physical reservoir includes input-output nodes, and that an input-output node can be used for input only, output only, or both input and output)([0041])…( output circuits connected to reservoir nodes and signal-conditioning/buffer circuitry) ([0044]-[0046]). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Terasaki further in view of Rowlands to incorporate the above cited features. One would have been motivated to do so in order to isolate the source from the reservoir node.
Claim 7. Terasaki and Alsaleem disclose the physical reservoir element according to claim 1, but fail to explicitly disclose further comprising a first voltage follower circuit, wherein the first voltage follower circuit is disposed between the first input terminal and the first nonlinear circuit.
However, Rowlands discloses signal-conditioning circuitry and a buffer stage connected to the reservoir output [The use of a buffer/voltage follower between an input source and nonlinear analog circuitry is a conventional impedance-isolation measure] ([0045]). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Terasaki further in view of Rowlands to incorporate the above cited features. One would have been motivated to do so in order to isolate the source from the reservoir node.
Claim 8. Terasaki and Alsaleem disclose the physical reservoir element according to claim 1, but fail to explicitly disclose further comprising a second voltage follower circuit, wherein the second voltage follower circuit is disposed between the second input terminal and the first nonlinear circuit or between the first sample-and-hold circuit and the first output terminal.
However, Rowlands discloses buffer stages associated with reservoir nodes and signal conditioning [The placement of a buffer either before nonlinear processing or between the storage circuit and reservoir output would be a predictable implementation choice for impedance isolation and signal integrity]([0045]). Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Terasaki further in view of Rowlands to incorporate the above cited features. One would have been motivated to do so in order to isolate the source from the reservoir node.
Claim 9. Terasaki Alsaleem and Rowlands disclose the physical reservoir element according to claim 2, Rowlands further discloses comprising a third voltage follower circuit, wherein the third voltage follower circuit is disposed between the first sample-and-hold circuit and the second output terminal (output signal-conditioning circuits and buffer stages associated with reservoir output nodes) ([0045],[0054])[ The claimed third buffer therefore represents conventional output buffering of a physical reservoir state]. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Terasaki further in view of Rowlands to incorporate the above cited features. One would have been motivated to do so in order to isolate the source from the reservoir node.
Conclusion
7. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure (See PTO-892).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phenuel S. Salomon whose telephone number is (571) 270-1699. The examiner can normally be reached on Mon-Fri 7:00 A.M. to 4:00 P.M. (Alternate Friday Off) EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Usmaan Saeed can be reached on (571) 272-4046. The fax phone number for the organization where this application or proceeding is assigned is 571-273-3800.
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/PHENUEL S SALOMON/Primary Examiner, Art Unit 2146
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