DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 11-14, 19 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Siemieniec et al. (US 2016/0064547 A1).
Regarding claim 11, Siemieniec discloses a semiconductor device (Fig 3A & 3B), comprising: a substrate (100), comprising a source region (110); a source trench structure (160), in the substrate; a gate trench structure (150), in the substrate and adjacent to the source region, a bottom of the gate trench structure being higher than a bottom of the source trench structure, wherein the gate trench structure surrounds the source trench structure and defines a device unit (TC), and an interface between the gate trench structure and the source region of the substrate along a fixed direction is a hexagon; and a drain electrode (320), below the substrate.
PNG
media_image1.png
488
520
media_image1.png
Greyscale
PNG
media_image2.png
536
528
media_image2.png
Greyscale
Regarding claim 12, Siemieniec discloses that the source region is between the gate trench structure and the source trench structure.
Regarding claim 13 Siemieniec discloses a source contact (310) extending from an upper surface of the source region to an upper surface of the source trench structure.
Regarding claim 14, Siemieniec discloses that the six sides of the hexagon have substantively the same length.
Regarding claim 19, Siemieniec discloses that the source trench structure comprises: a dielectric layer (161); and a conductor layer (165), surrounded by the dielectric layer.
Regarding claim 20, Siemieniec discloses that the gate trench structure comprises: a gate dielectric layer (151); and a gate layer (155), surrounded by the gate dielectric layer.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 7-10, 16 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Siemieniec.
Regarding claim 1, Siemieniec discloses a semiconductor device (Fig 3A & 3B), comprising: a substrate (100); a source trench structure (160), in the substrate; a gate trench structure (150), in the substrate, a bottom of the gate trench structure being higher than a bottom of the source trench structure, wherein the gate trench structure surrounds the source trench structure and defines a device unit (TC); and a drain electrode (320), below the substrate.
Siemieniec does not disclose the relative projection areas of the source trench and the gate trench along a fixed direction. It would have been obvious to one of ordinary skill in the art at the time of filing to form the device such that a first projection area of the source trench structure along a fixed direction is less than 20% of a second projection area of the gate trench structure along the fixed direction, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Regarding claim 2, Siemieniec does not disclose the relative projection areas of the source trench and the gate trench along a fixed direction. It would have been obvious to one of ordinary skill in the art at the time of filing to form the device such that a first projection area of the source trench structure along a fixed direction is less than 15% of a second projection area of the gate trench structure along the fixed direction, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Regarding claim 3, Siemieniec does not disclose the relative projection areas of the source trench and the gate trench along a fixed direction. It would have been obvious to one of ordinary skill in the art at the time of filing to form the device such that a first projection area of the source trench structure along a fixed direction is more than 5% of a second projection area of the gate trench structure along the fixed direction, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Regarding claim 4, Siemieniec discloses that the device unit has a shape of hexagon, quadrangle or triangle in a top view.
Regarding claim 7, Siemieniec discloses that the substrate further comprises: a source doped region (110), between the gate trench structure and the source trench structure.
Regarding claim 8, Siemieniec discloses a source contact (310) extending from an upper surface of the source doped region to an upper surface of the source trench structure.
Regarding claim 9, Siemieniec discloses that the source trench structure comprises: a dielectric layer (161); and a conductor layer (165), surrounded by the dielectric layer.
Regarding 10, Siemieniec discloses that the gate trench structure comprises: a gate dielectric layer (151); and a gate layer (155), surrounded by the gate dielectric layer.
Regarding claim 16, Siemieniec does not disclose the relative projection areas of the source trench and the gate trench along a fixed direction. It would have been obvious to one of ordinary skill in the art at the time of filing to form the device such that a first projection area of the source trench structure along a fixed direction is 5% to 20% of a second projection area of the gate trench structure along the fixed direction, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Regarding claim 17, Siemieniec does not disclose the relative projection areas of the source trench and the gate trench along a fixed direction. It would have been obvious to one of ordinary skill in the art at the time of filing to form the device such that, in a top view, a first projection area of the source trench structure along a fixed direction is 5% to 15% of a second projection area of the gate trench structure along the fixed direction, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Claim(s) 5 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Siemieniec as applied to claim 1 above, and further in view of Hatada et al. (US 2025/0081548 A1).
Regarding claim 5, Siemieniec discloses that the device unit has a shape of hexagon in a top view, but does not disclose that the hexagon has a first side and a second side, wherein the first side has a greater length than the second side.
Hatada discloses a similar device wherein the device unit has the shape of a hexagon with a first side having a greater length than the second side (Fig 2). Hatada discloses that such a configuration allows for a greater margin for error when disposed contacts along a given direction (¶64). Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to use an elongated hexagon as disclosed by Hatada as the shape of the device unit in order to realize such a greater margin of error in contact formation.
PNG
media_image3.png
674
572
media_image3.png
Greyscale
Regarding claim 6, Hatada discloses that four sides of the hexagon have a first length, and the remaining two sides have a second length different from the first length.
Claim(s) 15 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Siemieniec as applied to claim 11 above, and further in view of Hatada.
Regarding claim 15, Siemieniec discloses that the device unit has a shape of hexagon in a top view, but does not disclose that the hexagon has a first side and a second side, wherein the first side has a greater length than the second side.
Hatada discloses a similar device wherein the device unit has the shape of a hexagon with a first side having a greater length than the second side (Fig 2). Hatada discloses that such a configuration allows for a greater margin for error when disposed contacts along a given direction (¶64). Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to use an elongated hexagon as disclosed by Hatada as the shape of the device unit in order to realize such a greater margin of error in contact formation.
Regarding claim 18, Siemieniec discloses that the device unit has a shape of hexagon in a top view, but does not disclose that the hexagon has four sides which have a first length, and the remaining two sides have a second length different from the first length.
Hatada discloses a similar device wherein the device unit has the shape of a hexagon with four sides having a first length, and the remaining two sides having a second length different from the first length (Fig 2). Hatada discloses that such a configuration allows for a greater margin for error when disposed contacts along a given direction (¶64). Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to use an elongated hexagon as disclosed by Hatada as the shape of the device unit in order to realize such a greater margin of error in contact formation.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL P SHOOK whose telephone number is (571)270-7890. The examiner can normally be reached 9:00 am - 5:00 pm, Mon-Fri.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WILLIAM KRAIG can be reached at (571)272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DANIEL P SHOOK/Primary Examiner, Art Unit 2896
Prosecution Insights