DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Invention I, claims 1-12 and 20 in the reply filed on 07/30/26 is acknowledged. The traversal is on the grounds that searching the additional claims is not a burden. This is not found persuasive because the other set of claims is to .
The requirement is still deemed proper and is therefore made FINAL.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04/22/25 and 04/18/24 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4-7, 10-12, and 20 are rejected under 35 U.S.C. 102 as being anticipated by Li et al. ( US 2021/0287984 A1; hereinafter Li )
Regarding claim 1, Li teaches a structure comprising: a capacitor structure comprising a plurality of capacitor plates ( Fig. 2 capacitor 125; [0025] Capacitor 125 is a single plane (i.e., formed in a single x-y plane) interleaved comb capacitor ) within layers of dielectric material ( Fig. 3 wiring dielectric layer 116 ); a wiring structure ( Fig. 6 contacts 152 ) in a lower layer ( Fig. 6 BE interconnect stack level ) of the dielectric material ( Fig. 6 contact dielectric layer 150 ), the wiring structure electrically connecting to one of the capacitor plates ( [0051] In the depicted embodiment, capacitor 125 is connected to wiring in a lower wring level ); and a plurality of via bars ( Fig. 3 VIAs 119 ) within the layers of dielectric material ( Fig. 4 interlayer dielectric (ILD) layer 120 ) and interleaved with the plurality of capacitor plates, the plurality of via bars comprising a different width dimension than the plurality of capacitor plates ( Fig. 5 #119 and #125 are different widths ).
Regarding claim 2, Li teaches the structure of claim 1 ( as discussed above ), wherein the capacitor plates comprise a comb structure ( Fig. 2 capacitor 125; [0025] Capacitor 125 is a single plane (i.e., formed in a single x-y plane) interleaved comb capacitor ).
Regarding claim 4, Li teaches the structure of claim 2 ( as discussed above ), wherein the via bars connect to an underlying metal wiring layer in the lower layer of the dielectric material ( Fig. 9 #115 and 119 ).
Regarding claim 5, Li teaches the structure of claim 1 ( as discussed above ), wherein the plurality of capacitor plates are interleaved with one another ( Fig 2 first conductive comb #130 and second conductive comb #140 ).
Regarding claim 6, Li teaches the structure of claim 5 ( as discussed above ), wherein the plurality of interleaved capacitor plates comprise a first comb structure ( Fig. 2 #130 ) interleaved with a second comb structure ( Fig. 2 #140 ).
Regarding claim 7, Li teaches the structure of claim 6 ( as discussed above ), wherein the first comb structure ( Fig. 2 #130 ) is a top comb structure and the second comb structure ( Fig. 2 #140 ) is a bottom comb structure ( as shown in Fig. 2 ).
Regarding claim 10, Li teaches the structure of claim 1 ( as discussed above ), wherein the plurality of via bars ( Fig. 5 #119 ) do not overlap with ( as shown in Fig. 5 ) the plurality of capacitor plates ( Fig. 5 #125 ).
Regarding claim 11, Li teaches the structure of claim 1 ( as discussed above ), wherein the plurality of via bars ( Fig. 5 #119 ) have a smaller width dimension ( as show Fig. 5 ) than the plurality of the capacitor plates ( Fig. 5 #125 ).
Regarding claim 12, Li teaches the structure of claim 1 ( as discussed above ), wherein a spacing between each of the plurality of via bars ( Fig. 5 #119 ) and adjacent capacitor plates ( Fig. 5 #125 ) of the plurality of capacitor plates is less than the width ( as shown in Fig. 5 ) dimension of the plurality of via bars ( Fig. 5 #119 ).
Regarding claim 20, Li teaches a method ( Fig. 21 method 500 ) comprising: forming a capacitor structure comprising a plurality of capacitor plates within layers of dielectric material ( Fig. 21 #125 ); forming a wiring structure in a lower layer of the dielectric material ( [0103] capacitor 125 may be formed within the BE wiring dielectric layer 124 between wiring lines 123, 127 ), the wiring structure electrically connecting to one of the capacitor plates ( [0104] Method 500 may continue with forming a BE interconnect stack that is connected to a first comb of the interleaved capacitor (block 508) ); and forming a plurality of via bars within the layers of dielectric material and interleaved with the plurality of capacitor plates ( [0080] VIA 119 may be formed upon and contact the portion(s) of capacitor plate 220 that extends beyond the footprint of capacitor plate 200 ), the plurality of via bars ( device 100 Fig. 7 #119 ) comprising a different width dimension than the plurality of capacitor plates ( device 100 Fig. 7 #125 ).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 3 is rejected under U.S.C. 103 as being unpatentable over Li et al.; US 2021/0287984 A1; 03/2020 in view of Tang et al.; US 2023/402356 A1; 06/2022
Claim 3: Li discloses the structure of claim 2 ( as discussed above).
Li does not appear to disclose the plurality of via bars comprise a comb structure interleaved within the capacitor plates.
However, Tang teaches the plurality of via bars comprise a comb structure ( Fig. 3 fingered-comb-shaped two-dimensional contours LF4 308 ) interleaved within the capacitor plates ( Fig. 3 ; [0033] Fabricated together, adjacent to and conductively coupled with each other, the illustrated layers (including via layers) LF1 through LF5 in FIG. 3 form a capacitor that can be configured to be used in series or parallel with other capacitors or coupled to other components ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Tang with Li to implement the plurality of via bars comprise a comb structure interleaved within the capacitor plates because this approach maximizes capacitance density.
Claims 8 and 9 are rejected under U.S.C. 103 as being unpatentable over Li et al.; US 2021/0287984 A1; 03/2020 in view of Urashima et al.; EP 1761119 A1; 01/2006
Claim 8: Li discloses the structure of claim 6 ( as discussed above ).
Li does not appear to disclose the plurality of via bars are free floating via bars.
However, Urashima teaches the plurality of via bars are free floating via bars ( Fig. 10 #211; [0093] the dummy via conductors 211 are not connected to any of the other conductors inside the ceramic capacitor 101 )
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Urashima with Li to implement the plurality of via bars are free floating via bars because
Claim 9: Li and Urashima disclose the structure of claim 8 ( as discussed above ).
Li does not appear to disclose the free floating via bars are between the plurality of capacitor plates of the first comb structure and the second comb structure.
However, Urashima teaches the free floating via bars ( Fig. 10 #211 ) are between the plurality of capacitor plates of the first comb structure and the second comb structure ( [0094] the dummy via conductors 211 as the dummy conductor are disposed in the space between the capacitor function units 107 and 108 ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Urashima with Li to implement the free floating via bars are between the plurality of capacitor plates of the first comb structure and the second comb structure because this approach allows the free floating bars to interact solely with the electric fields generated by the active plates.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIMBERLY N FREY whose telephone number is (571)272-5068. The examiner can normally be reached Monday - Friday 7:30 am - 5 pm.
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/K.N.F./Examiner, Art Unit 2817
/ALI NARAGHI/Primary Examiner, Art Unit 2817
