Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detail action
Claims 1-8 and 21-32 are pending and being considered.
Claims 1, 21 and 27 have been amended.
Response to 101
Applicant’s arguments filed on 05/26/2026 have been fully considered and are not persuasive.
In response to applicant’s argument that the claims as amended are not directed towards abstract idea because the claims recite additional element such memory device coupled with host processor to perform the steps of the claims. The applicant argues that these additional elements such memory device coupled with host processor are not generic component. The examiner respectfully disagrees because these elements in the claim are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using a generic computer component.
The applicant further argues that even where claim recited a judicial exception, the claim is not directed to that exception when, taken as whole, the claim integrated the exception into practical application. The applicant argues that the claims as whole are directed towards hardware-rooted for securing host-to-remote communication by offloading symmetric cryptography from host processor to a memory device. The examiner respectfully disagrees because the claim merely recites receiving encrypted request, decrypting the encrypted request, transmitting plaintext request, receiving a plaintext response, encrypting plaintext response and the transmitting the encrypted response. The examiner notes that devices capable of merely exchanging encrypted/decrypted communications is not a practical application. For detail see 101 analyses below.
Response to 103
Applicant’s arguments filed on 05/26/2026 have been fully considered and are persuasive but are moot in view of new grounds of rejection. The arguments do not apply to the current art being used.
In response to applicant’s argument on last para of page 4 of remarks that Puri’s delivery agent 112 is not a memory device because the delivery agent has its own internal processor 602, internal bus 601 and its own I/O therefore cannot be a memory device as claimed. The examiner respectfully disagrees because Fig 2 of instant application clearly shows memory device 130 having its own processor 199 and communication interface 147. Therefore, delivery agent 112 of Puri can be reasonably interpreted as the claimed memory device
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim 1, 21 and 27 is rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim recites receiving encrypted request, decrypting the encrypted request, transmitting plaintext request, receiving a plaintext response, encrypting plaintext response and the transmitting the encrypted response.
The limitations receiving encrypted request, decrypting the encrypted request, transmitting plaintext request, receiving a plaintext response, encrypting plaintext response and the transmitting the encrypted response is a process that, under its broadest reasonable interpretation, covers performance of the limitations in the mind mentally or physically nothing in the claim precludes the steps from practically being performed in the mind or using paper and pencil. Receiving encrypted request, decrypting the encrypted request, transmitting plaintext request, receiving a plaintext response, encrypting plaintext response and the transmitting the encrypted response.as drafted is a process that, under its broadest reasonable interpretation, covers performance of the limitations in the mind. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application because the claim recites additional element memory bus, host processor, memory device and remote computing device. These elements in the claim are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional element of devices to perform receiving encrypted request, decrypting the encrypted request, transmitting plaintext request, receiving a plaintext response, encrypting plaintext response and the transmitting the encrypted response, steps amounts to no more than mere instructions to apply the exception using a generic computer component see spec para of instant application [0117-0123]. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The claim is not patent eligible.
Further recited elements within dependent claims 2-8, 22-26 and 28-30 taken individually do not amount to “significantly more” than just the abstract idea as previously identified above. Therefore, the claims do not amount to significantly more than the previously defined abstract idea. Some of the evidences of “significantly more” are a) improvement to another technology or field; b) applying judicial exception with or by a “particular machine’; c) transforming particular article/data into different state or thing; d) adding unconventional or non-routine steps, producing useful application; and e) other meaningful limitations beyond generic link to particular technological environment.
As a result, the claims are directed to non-statutory subject matter. See Also Alice, 134 S. Ct. at 2360. Under Alice, that is not sufficient "to transform an abstract idea into a patent-eligible invention." See Alice Corporation v. CLS Bank International, (S.Ct.2014) and Ultramercial, Inc. v. Hulu, LLC. (Fed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 and 21-32 are rejected under 35 U.S.C. 103 as being unpatentable over Puri et al (hereinafter Puri) (US 20160150403) in view of Nix (US 20210352132) and further in view Bshara et al (hereinafter Bshara) (US 10740466).
Regarding claim 1 Puri teaches a system comprising (Puri on [0003] teaches a system and method for transmitting a secure message over a signaling network);
a host processor (Puri on [0021] teaches a message sending system 111. See on [0044-0045] teaches message system implemented as computer architecture as shown Fig 5 comprising processor);
a memory bus (Puri on [0044] teaches architecture 600 includes a system bus 601 for communicating information, and a processor 602 coupled to bus 601 for processing information. Architecture 600 can also be coupled to a second, I/O bus 606 via an I/O interface 607);
and a memory device (Puri Fig 2 block 204 and text on [0022] teaches the message sending system 111 (i.e., host processor) transmits the encrypted message, a recipient identifier of the recipient mobile device 113 (i.e., message containing recipient device identifier wherein mobile device is equivalent to remote computing device), and a sender identifier of the message sending system 111 to the delivery agent 112 (i.e., memory device since it stores information [0021-0023 and 0045]));
decrypt the encrypted request using a symmetric key associated with the remote computing device to obtain a plaintext request (Puri Fig 2 block 208 and text on [0023-0024] teaches the delivery agent 112 decrypts the message based on the pre-defined function and the regenerated key (i.e., regenerated key as symmetric key is associated with remote computing device since its regenerated based on recipient identifier and used for encrypting and decrypting the message), wherein the delivery agent 112 regenerates the key based on an encryption scheme, for example a cryptographic hash function, using one or more of the recipient identifier, the sender identifier, the copy of the device attribute, the copy of the service subscription attribute, the agent key, and the nonce);
transmit the plaintext request to the remote computing device (Puri Fig 2 block 209 and text on [0024] teaches the delivery agent 112 engages the control plane network of the recipient mobile device 113 to transmit the decrypted message (i.e., plaintext) to the recipient mobile device 113);
receive a plaintext response from the remote computing device (Puri Fig 2 block 210 and text on [0024] teaches the control plane of the recipient mobile device 113 sends a positive or negative acknowledgement (i.e., plaintext response) to the delivery agent);
and transmit the (Puri Fig 2 block 211 and text on [0024] teaches the delivery agent 112 further transmits the positive or negative acknowledgement to the message sending system 111).
Puri fails to explicitly teach encrypt the plaintext response using the symmetric key to generate an encrypted response, however Nix from analogous art teaches
encrypt the plaintext response using the symmetric key to generate an encrypted response (Nix on [0022-0024] teaches the SRU-SP can decrypt the encrypted, compressed application data using the derived symmetric ciphering key and a symmetric ciphering algorithm. The SRU-SP can encrypt the compressed data using the derived symmetric ciphering key. The SRU-SP can forward (a) the encrypted, compressed server B response data and (b) the digital signature for the server B response data to the RU via the Internet and the narrowband or wideband wireless network);
and transmit the encrypted response to the host processor (Nix on [0022-0024] teaches the SRU-SP can decrypt the encrypted, compressed application data using the derived symmetric ciphering key and a symmetric ciphering algorithm. The SRU-SP can encrypt the compressed data using the derived symmetric ciphering key. The SRU-SP can forward (a) the encrypted, compressed server B response data and (b) the digital signature for the server B response data to the RU via the Internet and the narrowband or wideband wireless network).
Thus, it would have been obvious to one ordinary skill in the art before the effective filing date to implement the teaching of Nix into the teaching of Puri by encrypting the response message and transmitting the encrypted response message to host processor. One would be motivated to do so in order to enable secure communication between devices (Nix [0023]).
Although the combination of Puri and Nix teaches a memory bus and encrypted request transmitted to memory device, however the combination fails to explicitly teach a memory device coupled to the host processor via the memory bus for transmitting the encrypted response to the host processor via the memory bus, however Bshara from analogous art teaches
and a memory device coupled to the host processor via the memory bus (Bshara Fig 2 block 104, 202, 206 and text on [col 7 lines 52-60] teaches the integrated circuit 104 coupled to data storage device 202 via an interface 206, wherein the interface 206 is memory address bus);
and transmit the encrypted response to the host processor via the memory bus (Bshara on [col 16 lines 32-36] teaches the storage device may send the encrypted data to the integrated circuit via the memory bus 206).
Thus, it would have been obvious to one ordinary skill in the art before the effective filing date to implement the teaching of Bshara into the combined teaching of Puri and Nix by transmitting encrypted response to the processor via memory bus. One would be motivated to do so in order to prevent jeopardizing the confidentiality and integrity of the sensitive data stored in memory device communicated on various interface of computing node (Bshara [col 1 line 10-20]).
Regarding claim 21 Puri teaches a method performed by a memory device (Puri on [0003] teaches a system and method for transmitting a secure message over a signaling network);
receiving an encrypted request from the host processor via the memory bus, the encrypted request identifying a remote computing device (Puri Fig 2 block 204 and text on [0022] teaches the message sending system 111 (i.e., host processor) transmits the encrypted message, a recipient identifier of the recipient mobile device 113 (i.e., message containing recipient device identifier wherein mobile device is equivalent to remote computing device), and a sender identifier of the message sending system 111 to the delivery agent 112 (i.e., memory device since it stores information [0021-0023 and 0045]));
decrypting the encrypted request using a symmetric key associated with the remote computing device to obtain a plaintext request (Puri Fig 2 block 208 and text on [0023-0024] teaches the delivery agent 112 decrypts the message based on the pre-defined function and the regenerated key (i.e., regenerated key as symmetric key is associated with remote computing device since its regenerated based on recipient identifier and used for encrypting and decrypting the message), wherein the delivery agent 112 regenerates the key based on an encryption scheme, for example a cryptographic hash function, using one or more of the recipient identifier, the sender identifier, the copy of the device attribute, the copy of the service subscription attribute, the agent key, and the nonce);
transmitting the plaintext request to the remote computing device (Puri Fig 2 block 209 and text on [0024] teaches the delivery agent 112 engages the control plane network of the recipient mobile device 113 to transmit the decrypted message (i.e., plaintext) to the recipient mobile device 113);
receiving a plaintext response from the remote computing device (Puri Fig 2 block 210 and text on [0024] teaches the control plane of the recipient mobile device 113 sends a positive or negative acknowledgement (i.e., plaintext response) to the delivery agent);
and transmitting the (Puri Fig 2 block 211 and text on [0024] teaches the delivery agent 112 further transmits the positive or negative acknowledgement to the message sending system 111).
Puri fails to explicitly teach encrypt the plaintext response using the symmetric key to generate an encrypted response, however Nix from analogous art teaches
encrypting the plaintext response using the symmetric key to generate an encrypted response (Nix on [0022-0024] teaches the SRU-SP can decrypt the encrypted, compressed application data using the derived symmetric ciphering key and a symmetric ciphering algorithm. The SRU-SP can encrypt the compressed data using the derived symmetric ciphering key. The SRU-SP can forward (a) the encrypted, compressed server B response data and (b) the digital signature for the server B response data to the RU via the Internet and the narrowband or wideband wireless network);
and transmitting the encrypted response to the host processor (Nix on [0022-0024] teaches the SRU-SP can decrypt the encrypted, compressed application data using the derived symmetric ciphering key and a symmetric ciphering algorithm. The SRU-SP can encrypt the compressed data using the derived symmetric ciphering key. The SRU-SP can forward (a) the encrypted, compressed server B response data and (b) the digital signature for the server B response data to the RU via the Internet and the narrowband or wideband wireless network).
Thus, it would have been obvious to one ordinary skill in the art before the effective filing date to implement the teaching of Nix into the teaching of Puri by encrypting the response message and transmitting the encrypted response message to host processor. One would be motivated to do so in order to enable secure communication between devices (Nix [0023]).
Although the combination of Puri and Nix teaches a memory bus and encrypted request transmitted to memory device, however the combination fails to explicitly teach a memory device coupled to the host processor via the memory bus for transmitting the encrypted response to the host processor via the memory bus, however Bshara from analogous art teaches
and a memory device coupled to the host processor via the memory bus (Bshara Fig 2 block 104, 202, 206 and text on [col 7 lines 52-60] teaches the integrated circuit 104 coupled to data storage device 202 via an interface 206, wherein the interface 206 is memory address bus);
and transmitting the encrypted response to the host processor via the memory bus (Bshara on [col 16 lines 32-36] teaches the storage device may send the encrypted data to the integrated circuit via the memory bus 206).
Thus, it would have been obvious to one ordinary skill in the art before the effective filing date to implement the teaching of Bshara into the combined teaching of Puri and Nix by transmitting encrypted response to the processor via memory bus. One would be motivated to do so in order to prevent jeopardizing the confidentiality and integrity of the sensitive data stored in memory device communicated on various interface of computing node (Bshara [col 1 line 10-20]).
Regarding claim 27 Puri teaches a non-transitory computer-readable storage medium for tangibly storing computer program instructions capable of being executed by a memory device (Puri on [0044] teaches computer readable instruction stored in memory executed by a processor);
receiving an encrypted request from the host processor via the memory bus, the encrypted request identifying a remote computing device (Puri Fig 2 block 204 and text on [0022] teaches the message sending system 111 (i.e., host processor) transmits the encrypted message, a recipient identifier of the recipient mobile device 113 (i.e., message containing recipient device identifier wherein mobile device is equivalent to remote computing device), and a sender identifier of the message sending system 111 to the delivery agent 112 (i.e., memory device since it stores information [0021-0023 and 0045]));
decrypting the encrypted request using a symmetric key associated with the remote computing device to obtain a plaintext request (Puri Fig 2 block 208 and text on [0023-0024] teaches the delivery agent 112 decrypts the message based on the pre-defined function and the regenerated key (i.e., regenerated key as symmetric key is associated with remote computing device since its regenerated based on recipient identifier and used for encrypting and decrypting the message), wherein the delivery agent 112 regenerates the key based on an encryption scheme, for example a cryptographic hash function, using one or more of the recipient identifier, the sender identifier, the copy of the device attribute, the copy of the service subscription attribute, the agent key, and the nonce);
transmitting the plaintext request to the remote computing device (Puri Fig 2 block 209 and text on [0024] teaches the delivery agent 112 engages the control plane network of the recipient mobile device 113 to transmit the decrypted message (i.e., plaintext) to the recipient mobile device 113);
receiving a plaintext response from the remote computing device (Puri Fig 2 block 210 and text on [0024] teaches the control plane of the recipient mobile device 113 sends a positive or negative acknowledgement (i.e., plaintext response) to the delivery agent);
and transmitting the (Puri Fig 2 block 211 and text on [0024] teaches the delivery agent 112 further transmits the positive or negative acknowledgement to the message sending system 111).
Puri fails to explicitly teach encrypt the plaintext response using the symmetric key to generate an encrypted response, however Nix from analogous art teaches
encrypting the plaintext response using the symmetric key to generate an encrypted response (Nix on [0022-0024] teaches the SRU-SP can decrypt the encrypted, compressed application data using the derived symmetric ciphering key and a symmetric ciphering algorithm. The SRU-SP can encrypt the compressed data using the derived symmetric ciphering key. The SRU-SP can forward (a) the encrypted, compressed server B response data and (b) the digital signature for the server B response data to the RU via the Internet and the narrowband or wideband wireless network);
and transmitting the encrypted response to the host processor (Nix on [0022-0024] teaches the SRU-SP can decrypt the encrypted, compressed application data using the derived symmetric ciphering key and a symmetric ciphering algorithm. The SRU-SP can encrypt the compressed data using the derived symmetric ciphering key. The SRU-SP can forward (a) the encrypted, compressed server B response data and (b) the digital signature for the server B response data to the RU via the Internet and the narrowband or wideband wireless network).
Thus, it would have been obvious to one ordinary skill in the art before the effective filing date to implement the teaching of Nix into the teaching of Puri by encrypting the response message and transmitting the encrypted response message to host processor. One would be motivated to do so in order to enable secure communication between devices (Nix [0023]).
Although the combination of Puri and Nix teaches a memory bus and encrypted request transmitted to memory device, however the combination fails to explicitly teach a memory device coupled to the host processor via the memory bus for transmitting the encrypted response to the host processor via the memory bus, however Bshara from analogous art teaches
and a memory device coupled to the host processor via the memory bus (Bshara Fig 2 block 104, 202, 206 and text on [col 7 lines 52-60] teaches the integrated circuit 104 coupled to data storage device 202 via an interface 206, wherein the interface 206 is memory address bus);
and transmitting the encrypted response to the host processor via the memory bus (Bshara on [col 16 lines 32-36] teaches the storage device may send the encrypted data to the integrated circuit via the memory bus 206).
Thus, it would have been obvious to one ordinary skill in the art before the effective filing date to implement the teaching of Bshara into the combined teaching of Puri and Nix by transmitting encrypted response to the processor via memory bus. One would be motivated to do so in order to prevent jeopardizing the confidentiality and integrity of the sensitive data stored in memory device communicated on various interface of computing node (Bshara [col 1 line 10-20]).
Regarding claim 2, 22 and 28 the combination of Puri, Nix and Bshara teaches all the limitations of claims 1, 21 and 27 respectively, Nix further teaches the memory device further configured to receive a request to establish a secure communication session with the remote computing device and perform a key exchange protocol with the remote computing device to establish the symmetric key (Nix on [0092, 0112 and 0309-0310] teaches performing an elliptic curve Diffie Hellman (ECDH) key exchange. See on [0057 and 0076] teaches SRU-SP establishing secure communication with service provider such as TLS session).
The reason and motivation for combining is same as set forth above in claim 1.
Regarding claim 3, 23 and 29 the combination of Puri, Nix and Bshara teaches all the limitations of claims 2, 22 and 28 respectively, Nix further teaches wherein the key exchange protocol comprises an Elliptic Curve Diffie-Hellman (ECDH) key exchange (Nix on [0092, 0112 and 0309-0310] teaches performing an elliptic curve Diffie Hellman (ECDH) key exchange).
The reason and motivation for combining is same as set forth above in claim 1.
Regarding claim 4, 24 and 30 the combination of Puri, Nix and Bshara teaches all the limitations of claims 1, 21 and 27 respectively, Nix further teaches wherein the memory device is configured to maintain a table mapping remote computing device identifiers to associated symmetric keys (Nix on [0310] teaches the server A 108 could also record a symmetric key 127b for SRU 109 with SRU ID 109i).
The reason and motivation for combining is same as set forth above in claim 1.
Regarding claim 5, 25 and 31 the combination of Puri, Nix and Bshara teaches all the limitations of claims 1, 21 and 27 respectively, Nix further teaches wherein the plaintext request comprises an HTTP request and the plaintext response comprises an HTTP response (Nix on [0188] teaches HTTP request and HTTP response).
The reason and motivation for combining is same as set forth above in claim 1.
Regarding claim 6 the combination of Puri, Nix and Bshara teaches all the limitations of claim 1 above, Nix further teaches wherein the memory bus comprises an Open NAND Flash Interface (ONFI) (Nix on [0068, 0092 and 0237-0238] teaches NAND device).
The reason and motivation for combining is same as set forth above in claim 1.
Regarding claim 7 the combination of Puri, Nix and Bshara teaches all the limitations of claim 1 above, Nix further teaches wherein the memory device comprises a managed NAND device (Nix on [0068, 0092 and 0237-0238] teaches NAND device).
The reason and motivation for combining is same as set forth above in claim 1.
Regarding claim 8, 26 and 32 the combination of Puri, Nix and Bshara teaches all the limitations of claim 1, 21 and 27 respectively, Nix further teaches wherein the memory device further includes a cryptographic co-processor configured to decrypt the encrypted request and encrypt the plaintext response (Nix on [0022-0024] teaches the SRU-SP can decrypt the encrypted, compressed application data using the derived symmetric ciphering key and a symmetric ciphering algorithm. The SRU-SP can encrypt the compressed data using the derived symmetric ciphering key. The SRU-SP can forward (a) the encrypted, compressed server B response data and (b) the digital signature for the server B response data to the RU via the Internet and the narrowband or wideband wireless network).
The reason and motivation for combining is same as set forth above in claim 1.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOEEN KHAN whose telephone number is (571)272-3522. The examiner can normally be reached 7AM-5PM EST M-TH Alternate Fridays.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shewaye Gelagay can be reached at (571)272-4219. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOEEN KHAN/ Primary Examiner, Art Unit 2436
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