Prosecution Insights
Last updated: October 04, 2026
Application No. 18/640,765

Storage System for Simulation of Quantum Circuit

Non-Final OA §103§112
Filed
Apr 19, 2024
Priority
Oct 21, 2021 — RE 10-2021-0141159 +2 more
Examiner
HENN, TIMOTHY J
Art Unit
2639
Tech Center
2600 — Communications
Assignee
Seoul National University R&DB Foundation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
929 granted / 1083 resolved
+23.8% vs TC avg
Moderate +12% lift
Without
With
+11.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
20 currently pending
Career history
1103
Total Applications
across all art units

Statute-Specific Performance

§101
6.5%
-33.5% vs TC avg
§103
48.0%
+8.0% vs TC avg
§102
17.5%
-22.5% vs TC avg
§112
18.8%
-21.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1083 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant's claim for foreign priority based on applications filed in KR on 21 October 2021 and 07 April 2022. It is noted, however, that applicant has not filed a certified copies of the KR10-2021-0141159 and KR10-2022-0043557 applications as required by 37 CFR 1.55. Claim Interpretation Claim(s) 1-20 do not use “means for” (or “step for”) language, or generic placeholders for "means” coupled with functional language without recitation of sufficient structure for carrying out the claimed functions and therefore do not invoke 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph). Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.[claims 1-8] Claim(s) 1-8 recite functional language “reads data consecutively stored…”. This functional language has the effect of limiting the claim scope to require a read operation of reading data from the first storage device. The recited function does not follow from the structure of the claim, i.e. multiple storage devices and a RAID expansion card, so it is unclear whether the function requires some other structure or is simply a result of operating the system in a certain manner. Thus one of ordinary skill in the art would not be able to draw a clear boundary between what is and is not covered by the claim. See MPEP 2173.05(g). Applicant may overcome the above rejection by amending the claim to specify a particular structure which performs the claimed function, provided such an amendment is supported by the specification, in order to inform one of ordinary skill in the art of the metes and bounds of the functional limitation. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 3-9, 11-15 and 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Doi (US 2020/0218787 A1) in view of Official Notice in view of Janssen et al. (US 2005/0190609 A1).[claim 1] Regarding claim 1, Doi discloses a storage system comprising: multiple storage devices (Figure 16; Paragraph 0140, disk drive arrays/RAID systems); and reads data stored in a first storage device among the multiple storage devices to a main memory in response to a data read request for an operation in a main memory of the host device (Figure 4, S101 and S102; receiving instruction to allocate n qubits and reading stored parameters to system memory). However, Doi does not explicitly disclose: wherein the multiple storage devices are connected to a host device through a redundant array of independent disks (RAID) expansion card. Official Notice is taken that it is well known in the art to provide a connection to an array of disks such as a RAID array together and to a host device using a RAID expansion card. The use of such a card allows the control of the RAID array processing to be offloaded and further allows for the addition of RAID capabilities to a general purpose processing system without a native RAID controller. Therefore, it would have been obvious to use a RAID card to interface with the array of disks/RAID array of Doi so that RAID processing may be offloaded and added to general purpose systems without a native RAID controller. However, Doi in view of Official Notice does not teach consecutively stored data in a first storage device read with a single access to the first storage device. Janssen discloses a memory interface and data processing system which allows reading of a sequence of consecutively stored data using a single memory access (e.g. Abstract) which allows for efficient access to a series of data through parallel readout (e.g. Paragraphs 0054-0055). Therefore, it would have been obvious to perform readout with a single access as taught by Janssen so that the data necessary for simulating the qubits in Doi may be quickly loaded.[claim 3] Regarding claim 3, Doi discloses wherein the multiple storage devices include storage devices of one type among a hard disk drive (HDD), a solid state drive (SSD), and nonvolatile memory express (NVMe) (Paragraph 0140, disk drives). However, Official Notice is further taken that it is well known in the art to use SDD and NVMe data storage devices in computing systems to provide fast access to stored data. Therefore, it would have been obvious to use a SSD or NVMe storage device in the system of Doi so that the data access speed may be further increased.[claim 4] Regarding claim 4, see the rejection of claim 3 above.[claim 5] Regarding claim 5, Doi discloses wherein the host device requests read of probability amplitude data for each of sub-circuits obtained by partitioning a quantum circuit to simulate each of the sub-circuits (e.g. Figures 3 and 6; Paragraphs 0037, 0045-0046, 0051-0055, 0070-0076).[claim 6] Regarding claim 6, Doi discloses wherein the multiple storage devices change a layout of data of each of the sub-circuits in response to a block permutation operation which is performed by the host device for each of the sub-circuits (e.g. Paragraph 0051).[claim 7] Regarding claim 7, Doi does not disclose , wherein the processor causes the multiple storage devices to be connected to another storage system through the redundant array of independent disks (RAID) expansion card However, Official Notice is further taken that it is well known in the art to add additional storage systems/disks to a RAID array using a RAID expansion card so that the size of the array may be increased. Therefore, it would have been obvious to cause the multiple storage devices to be connected to another storage system through the redundant array of independent disks (RAID) expansion card so that additional storage may be added to the RAID array to have increased size.[claim 8] Regarding claim 8, Doi does not disclose wherein a bandwidth of the storage system is determined according to a number of SAS3 expansion cards connected to the multiple storage devices. However, Official Notice is further taken that it is well known in the art to include SAS3 expansion cards to multiple storage devices in a RAID array to provide SAS3 connectivity to the RAID array. Therefore, it would have been obvious to use SAS3 expansion cards connected to the storage devices in the multiple storage devices of the RAID array to provide connectivity to SAS3 devices. Note that by doing so, the total bandwidth would be dependent on the number of SAS3 expansion cards as claimed, i.e. more SAS3 cards would lead to increased total bandwidth.[claims 9 and 11-14] Claims 9 and 11-14 are method claims corresponding to apparatus claims 1, 3-5 and 1. Therefore, claims 9 and 11-14 are analyzed and rejected as previously discussed with respect to claims 1, 3-5 and 1 respectively. Additionally note that by using a RAID array, the multiple storage devices would be connected together through the RAID card as claimed.[claims 15, and 17-20] Regarding claims 15 and 17-20, see the rejection of claims 9 and 11-14 above, and further note that Doi discloses a computer-readable non-transitory recording medium storing a computer program including at least one instruction configured to perform the claimed methods using multiple storage devices (Paragraphs 0140-0149). Claim(s) 2, 10 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Doi (US 2020/0218787 A1) in view of Official Notice in view of Janssen et al. (US 2005/0190609 A1) in view of Johnston (US 2018/0210985 A1).[claim 2] Regarding claim 2, Doi in view of Official Notice in view of Janssen does not explicitly disclose wherein operation result data consecutively stored in the main memory are consecutively written to a second storage device among the multiple storage devices with a single access in response to a data write request of the host device. Johnston discloses a similar system for simulating a quantum circuit including storage of input states and further discloses storing the output state as well (Figure 1, 130). Therefore, it would have been obvious to additionally store the output state of the simulated quantum circuit so that the results of the simulation may be stored. Additionally, following the teachings of Janssen, it would have been obvious to store the output state in a consecutive manner with a single access to increase writing efficiency (e.g. Paragraphs 0102-0104). While Doi in view of Official Notice in view of Janssen in view of Johnston does not explicitly disclose that the writing is done to a second storage device among the multiple storage devices, Official Notice is further taken that it is well known in the art to read from and write to different disks/storage devices in a RAID array so that data can be evenly spread out over the array. Therefore, it would have been obvious to read the input state form a first disk/storage device and write the output state to a second disk/storage device so that the stored data may be spread out amongst the multiple storage devices of the RAID array.[claim 10] Claim 10 is a method claim corresponding to apparatus claim 2. Therefore, claim 10 is analyzed and rejected as previously discussed with respect to claim 2.[claim 16] Regarding claim 16, see the rejection of claim 10 above, and further note that Doi discloses a computer-readable non-transitory recording medium storing a computer program including at least one instruction configured to perform the claimed methods using multiple storage devices (Paragraphs 0140-0149). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The following references show similar systems/methods for simulating quantum circuits and writing/reading data to storage devices: Bernoudy et al. US 2020/0293331 A1 Lee et al. US 2021/0011748 A1 Pednault et al. US 2019/0347575 A1 Yamamoto US 5,895,502 Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIMOTHY J HENN whose telephone number is (571)272-7310. The examiner can normally be reached Monday-Friday ~10-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Twyler Haskins can be reached at (571) 272-7406. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Timothy J Henn/ Primary Examiner, Art Unit 2639
Read full office action

Prosecution Timeline

Apr 19, 2024
Application Filed
Jul 22, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
97%
With Interview (+11.6%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1083 resolved cases by this examiner. Grant probability derived from career allowance rate.

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