Prosecution Insights
Last updated: May 29, 2026
Application No. 18/640,869

THREE-LEVEL BUCK CONVERTER WITH MODIFIED TWO-LEVEL BUCK CONVERTER MODE OPERATION

Final Rejection §102§103
Filed
Apr 19, 2024
Examiner
PEREZ, BRYAN REYNALDO
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Qualcomm Incorporated
OA Round
2 (Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
607 granted / 724 resolved
+15.8% vs TC avg
Moderate +14% lift
Without
With
+13.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
18 currently pending
Career history
749
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
85.9%
+45.9% vs TC avg
§102
12.2%
-27.8% vs TC avg
§112
0.8%
-39.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 724 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This final office action is responsive to Applicants' response filed on 03/12/26. Claims 1-20 are presented for examination and are pending for the reasons indicated herein below. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Response to Arguments Applicant's arguments filed 03/12/26 have been fully considered but they are not persuasive. Applicant argues: Applicant respectfully traverses this rejection. A claim is anticipated only if each and every element as set forth in the claim is found, either expressly or inherently described, in a single prior art reference." Verdegaal Bros. v. Union Oil Co. of California, 814 F.2d 628, 631, 2 USPQ2d 1051, 1053 (Fed. Cir. 1987). "The identical invention must be shown in as complete detail as is contained in the ... claim." Richardson v. Suzuki Motor Co., 868 F.2d 1226, 1236, 9 USPQ2d 1913, 1920 (Fed. Cir. 1989). The elements must be arranged as required by the claim. In re Bond, 910 F.2d 831, 15 USPQ2d 1566 (Fed. Cir. 1990). Applicant submits that Zilio does not describe, either expressly or inherently, each and every element as set forth in the claims of the present application. For example, Zilio fails to anticipate or suggest a power supply circuit comprising: a three-level buck converter circuit including a switching node coupled to an inductive element; and a control circuit coupled to the three-level buck converter circuit and configured to control the three-level buck converter circuit such that the switching node operates with more than two different constant voltage levels as recited in independent claim 1 (emphasis added) and similar features recited in independent claim 12. In rejecting claims 1 and 12, the Examiner relies on common node VX of Zilio as teaching the recited "switching node," but then apparently relies on Vc, V1, and V2 of FIG. 6 for allegedly teaching that the switching node operates with more than two different constant voltage levels. OA, p. 3. However, Zilio is silent with respect to the common node VX operating with more than two different constant voltage levels. Moreover, VX is not illustrated in FIG. 6 of Zilio (excerpted below for the Examiner's convenience), so it is unclear how VX supposedly operates with more than two such levels. Furthermore, Vc is the voltage across the flying capacitor, rather than the common/switching node, so it is unclear why the Examiner relies on Vc. Regardless, Vc operates with only two different constant voltage levels (a first voltage potential V1 and a second voltage potential V2), as illustrated in FIG. 6 of Zilio, rather than more than two different constant voltage levels. See, e.g., Zilio, col. 10, lines 7-9. Similarly, the voltage applied to the inductor Lo (labeled "VL") of Zilio, operates with only two different constant voltage levels (a third voltage potential V3 and a fourth voltage potential V4), as illustrated in FIG. 6, rather than more than two different constant voltage levels. See, e.g., Zilio, col. 10, lines 10-13 and 22-24. PNG media_image1.png 692 644 media_image1.png Greyscale For an example of a switching node (of a three-level buck converter circuit) operating with more than two different constant voltage levels, the Examiner's attention is directed to the voltage of the switching node labeled "VSW" in the timing diagram 400B of FIG. 4B of the present application. As shown in FIG. 4B, VSW has three different constant voltage levels: VIN, VIN/2, and GND. A portion of FIG. 4B is excerpted below for the Examiner's convenience: PNG media_image2.png 448 508 media_image2.png Greyscale For at least these reasons presented above, Applicant contends that claims 1 and 12, as well as claims dependent thereon, are allowable. Withdrawal of this rejection is respectfully requested. Examiner respectively disagrees: See cited col 4 lines 20-35 show “FIGS. 1-26 are based on a three-level power converter. It should be noted that the three-level power converter…”. See also col 6 lines 25-30, teach reference on record can perform more than 3 levels of voltages. Graphs are used as an example, but do not limit the converter to only 2 voltages. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 12-14 rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zilo (US 11228256 B2) Regarding claim 1. Zilio teaches a power supply circuit [fig 1-6] comprising: a three-level buck converter circuit [col 4 lines 20-35] including a switching node [Vx] coupled to an inductive element [Lo]; and a control circuit coupled [102] to the three-level buck converter circuit and configured to control the three-level buck converter circuit such that the switching node operates with more than two different constant voltage levels [see fig 6, Vc, V1/V2]. Regarding claim 12. Zilio teaches a method [method of device of fig 1-6] of regulating power, the method comprising operating a three-level buck converter [col 4 lines 20-35] circuit including a switching node [Vx] coupled to an inductive element [Lo] such that the switching node operates with more than two different constant voltage levels [see fig 6, Vc, V1/V2]. Regarding claim 13. Zilio teaches the method of claim 12, wherein operating the three-level buck converter circuit comprises: operating the three-level buck converter circuit in a first phase such that the switching node has a first constant voltage level; operating the three-level buck converter circuit in a second phase such that the switching node has a second constant voltage level; and operating the three-level buck converter circuit in a third phase such that the switching node has a third constant voltage level [col 2 line 50 – col 3 line 10, shows a device performing 4 different phases to achieve different voltage levels]. Regarding claim 14. Zilio teaches the method of claim 13, wherein a current through the inductive element has a first slope during the first phase [see fig 6, t1-t2 charging phase has a slope value], wherein the current through the inductive element has a second slope [t2-t3 has a negative slope, which is lower than the first slope] during the second phase, and wherein the second slope is lower than the first slope. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 20 rejected under 35 U.S.C. 103 as being unpatentable over Zilio (US 11228256 B2) in view of Lin et al. (US 20210159795 A1) Regarding claim 20. Zilio teaches the method of claim 12. However, Zilio does not explicitly mention a circuit further comprising detecting a light load condition for the three-level buck converter circuit, wherein the three-level buck converter circuit is operated such that the switching node operates with the more than two different constant voltage levels based on the detection of the light load condition. Lin teaches a circuit further comprising detecting a light load condition for the three-level buck converter circuit, wherein the three-level buck converter circuit is operated such that the switching node operates with the more than two different constant voltage levels based on the detection of the light load condition [¶30-31]. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to use the features of Lin in order to provide a circuit that can reduce power draw by stopping power regulation while keeping essential peripherals active, improving efficiency. Allowable Subject Matter Claims 2-11 and 15-19 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and if the claim objections stated above were overcome. Examiner Note The examiner cites particular columns and lines numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Bryan Perez whose telephone number is (571)272-8837. The examiner can normally be reached on Mon.-Fri. (7:30 – 5:00). If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Crystal Hammond, can be reached on (571) 270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://portal.uspto.gov/external/portal. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /BRYAN R PEREZ/ Examiner, Art Unit 2838
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Prosecution Timeline

Apr 19, 2024
Application Filed
Dec 19, 2025
Non-Final Rejection mailed — §102, §103
Mar 12, 2026
Response Filed
Apr 23, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
98%
With Interview (+13.9%)
2y 3m (~2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 724 resolved cases by this examiner. Grant probability derived from career allowance rate.

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