DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Invention I in the reply filed on 07/14/2026 is acknowledged.
Claims 13-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 07/14/2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1-4, 6-8, 10-11 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Lee et al. (US 2013/0270714 A1; hereinafter “Lee”).
In regard to claim 1, Lee teaches microelectronic device (a step shaped conductive structure as shown in Fig. 1) (Fig. 1 and paragraph 34), comprising: a staircase structure in a stack, the stack structure comprising conductive structures and insulative structures arranged in a vertically repeated pattern of tiers, the tiers individually comprising at least one of the conductive structures and at least one of the insulative structures (step shaped conductive structure includes insulating interlayer patterns 12a-12g and conductive patterns 22a-22f alternately and repeatedly laminated on the substrate 10) (Fig. 1 and paragraph 34), the staircase structure comprising steps at lateral ends of the tiers of the stack structure (the steps shown at the lateral ends of the stack are shown in Fig. 1); an insulative fill region (a region containing an upper insulating interlayer 16) adjacent the staircase structure (Fig. 1 and paragraph 37); contacts individually extending through the insulative fill region toward the steps of the staircase structure (the contacts are shown extending through the upper insulating interlayer 16 towards the steps in Fig. 1):
some of the contacts extending toward the steps provided by lower tiers of the tiers of the stack structure (lower tiers of the step shaped conductive are shown in Fig. 1); and some other of the contacts extending toward the steps provided by upper tiers of the tiers of the stack structure (upper tiers of the step shaped conductive are shown in Fig. 1); and
conductive extensions (buffer conductor pattern 28) protruding from the conductive structures of the upper tiers toward the some of the contacts (buffer conductive pattern 28 includes a metallic material selectively deposited on the exposed conductive pattern) (Fig. 1, Fig. 9 and paragraphs 40),
at least one of the conductive extensions extending partially into the conductive structure from which the at least one of the conductive extensions protrudes (as the fifth and sixth conductive patterns 22e and 22f may be slightly etched while the other portion of the insulating interlayer are etched to the first maximum etch depth forming a third contact hole from the leftmost contact hole 26 and exposing an upper surface of the fourth conductive pattern 22d. Therefore, the buffer conductor pattern 28 would be located in the etched portion of the conductive patterns 22e and 22f) (paragraphs 60-61).
In regard to claim 2, Lee teaches wherein the at least one of the conductive extensions extends a different height than a height to which at least one other of the conductive extensions extends, the different height measured from an upper surface of the conductive structure from which the at least one of the conductive extensions protrudes, the height measured from an upper surface of the conductive structure from which the at least one other of the conductive extensions protrudes (the buffer conductive pattern 28 formed on the uppermost conductive pattern 22f may be removed to a greater extent than the other buffer conductive patterns 28, therefore, the height of the conductive patterns 28 would be different) (paragraph 74).
In regard to claim 3, Lee teaches wherein the different height is less than the height, and the at least one of the conductive extensions is at a higher elevation of the staircase structure than the at least one other of the conductive extensions (the buffer conductive pattern 28 formed on the uppermost conductive pattern 22f may be removed to a greater extent than the other buffer conductive patterns 28, therefore the height of the conductive patterns 28 would be different) (paragraph 74).
In regard to claim 4, Lee teaches wherein the at least one of the conductive extensions comprises:
a first conductive extension (the buffer conductor pattern 28 over the uppermost conductive pattern 22f) (Fig. 1 and paragraph 40), protruding from the conductive structure of one of the upper tiers (the buffer conductor pattern 28 is shown in the upper portions of the step shaped conductive structure in Fig. 9); and
a second conductive extension (the buffer conductor pattern 28 over the uppermost sixth conductive pattern 22f) (Fig. 1 and paragraph 40), protruding from the conductive structure of one other of the upper tiers (the buffer conductor pattern 28 is shown in the upper portions of the step shaped conductive structure in Fig. 9), the first conductive extension extending a further depth into the conductive structure of the one of the upper tiers than a depth to which the second conductive extension extends into the conductive structure of the one other of the upper tiers (as the sixth conductive pattern 22f is etched multiple times during manufacture the buffer conductor pattern 28 would be deeper into the sixth conductive pattern 22f than the fifth conductive pattern 22e which is only etched into once) (paragraph 60).
In regard to claim 6, Lee teaches wherein the contacts comprise a liner (a barrier metal layer) (Fig. 1, Fig. 9 and paragraph 78), the liner of the some of the contacts terminating at the steps provided by the lower tiers of the tiers of the stack structure, and the liner of the some other of the contacts terminating at the conductive extensions (the barrier metal layer not contacting the buffer conductive pattern 28 will end at the steps of the lowermost portion of the step shaped conductive structure, and the barrier metal layer contacting the buffer conductive pattern 28 will end at the buffer conductive pattern 28) (Fig. 1, Fig.9 and paragraph 41).
In regard to claim 7, Lee teaches a microelectronic device (a step shaped conductive structure as shown in Fig. 1) (Fig. 1 and paragraph 34), comprising: a tiered stack structure comprising a vertical arrangement of tiers, the tiers individually comprising at least one conductive structure and at least one insulative structure (step shaped conductive structure includes insulating interlayer patterns 12a-12g and conductive patterns 22a-22f alternately and repeatedly laminated on the substrate 10) (Fig. 1 and paragraph 34), lateral ends of the tiers providing steps of a staircase structure defined in the tiered stack structure (the steps shown at the lateral ends of the stack are shown in Fig. 1);
an insulative fill region adjacent the staircase structure (a region containing an upper insulating interlayer 16 is shown adjacent to the step shaped conductive structure in Fig. 1) (Fig. 1 and paragraph 37); contacts (a contact plug 34) individually extending through the insulative fill region toward the steps of the staircase structure (Fig. 1 and paragraph 39):
some of the contacts extending toward the steps provided by lower tiers of the tiers of the tiered stack structure (contact plug 34 may be filled in some contact holes 30 in the lowermost portion of the step shaped conductive structure) (Fig. 1 and paragraph 42); and
some other of the contacts extending toward the steps provided by upper tiers of the tiers of the tiered stack structure (the contact plug 34 may be filled in some contact holes 30 in the lowermost portion of the step shaped conductive structure) (Fig. 1 and paragraph 42); conductive extensions disposed between the conductive structures of the upper tiers and the some of the contacts (a buffer conductive pattern 28 and a contact plug 34 may be filled in some contact holes 30 (Fig. 1 and paragraph 39), at least some of the conductive extensions protruding a different height, above an upper surface of a respective one of the conductive structures of the upper tiers, than at least some other of the conductive extensions (varied protruding heights of the contact plugs 34 in the upper most portions are shown in Fig. 1).
In regard to claim 8, Lee teaches wherein the at least some of the conductive extensions are at least partially recessed within the respective ones of the conductive structures of the upper tiers (as the sixth conductive pattern 22f is etched multiple times during manufacture the buffer conductor pattern 28 would be disposed in the conductive pattern 22f) (paragraph 60).
In regard to claim 10, Lee teaches wherein the contacts individually comprise a liner (a barrier metal layer and the contact plugs 34 are deposited in the contact hole 30) (paragraph 74); and the conductive extensions do not comprise a liner (Lee is silent to an additional barrier metal that extends to the side walls of buffer conductive pattern 28).
In regard to claim 11, Lee teaches wherein a sidewall of individual of the conductive extensions is in direct contact with the insulative fill region (the buffer conductive pattern 28 is shown contacting the upper insulating interlayer 16 in Fig. 1).
In regard to claim 12, Lee teaches wherein the tiers individually comprise one of the conductive structures and one of the insulative structures (tiers of the step shaped conductive structure include insulating interlayer patterns 12a-12g and conductive patterns 22a-22f alternately and repeatedly laminated on the substrate 10) (Fig. 1 and paragraph 34).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5 is rejected under 35 U.S.C. 103 as being unpatentable over Lee as taught in Fig. 1 as applied to claim 1 or 7 above, and further in view of Lee as taught in Fig. 14-24.
In regard to claim 5, Lee, as taught in Fig. 1 and Fig. 9 doesn’t explicitly teach the microelectronic device, further comprising additional conductive extensions above some of the conductive extensions, between the some of the conductive extensions and respective ones of the some of the contacts.
In regard to claim 5, Lee, as taught in Figs. 10-24 teaches the microelectronic device (a contact structure) (Figs. 10-24 and paragraph 100), further comprising additional conductive extensions above some of the conductive extensions, between the some of the conductive extensions and respective ones of the some of the contacts (the second buffer conductive patterns 140 may be selectively formed on the first buffer conductive patterns 136) (Fig. 22, paragraphs 132 and 141).
It would have been obvious to one skilled in the art to combine the teachings of Lee of Lee in Fig. 1 and 9 with the teachings of Lee as shown in Figs. 14-24 since this allows the manufacture of a device with an increased number of word lines as taught by Lee (paragraph 114).
Claims 9 is rejected under 35 U.S.C. 103 as being unpatentable over Lee as taught in Fig. 1 as applied to claim 1 or 7.
In regard to claim 9, Lee teaches wherein, of the at least some of the conductive extensions protruding the different height (the buffer conductive pattern 28 formed on the uppermost conductive pattern 22f may be removed to a greater extent than the other buffer conductive patterns 28) (Fig. 1, Fig. 9 and paragraph 74):
at least one of the conductive extensions substantially consist of a single region of conductive material (as the buffer conductive pattern 28 formed on the uppermost conductive pattern 22f may be removed to a greater extent than the other buffer conductive patterns 28, the examiner takes official notice that the buffer conductive pattern 28 formed on the uppermost conductive pattern 22f has only a single region of conductive material) (paragraph 74); and
at least one other of the conductive extensions comprise multiple regions of the conductive material (due to the other the buffer conductive pattern 28 formed on the uppermost conductive patterns 22e and 22d having more material than the buffer conductive pattern 28 formed on the uppermost conductive pattern 22f, the examiner takes official notice that the buffer conductive pattern 28 formed on the uppermost conductive patterns 22e and 22d have multiple regions of the conductive material).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hashimoto (US 20110031630 A1).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEYON ALI-SIMAH PUNCHBEDDELL whose telephone number is (571)270-0078. The examiner can normally be reached Mon-Thur: 7:30AM-3:30 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at (571) 272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SEYON ALI-SIMAH PUNCHBEDDELL/Examiner, Art Unit 2893
/SUE A PURVIS/Supervisory Patent Examiner, Art Unit 2893
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