DETAILED ACTION
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
Claims 1-2, 9, 11, 14-16 and 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,966,343. Although the claims at issue are not identical, they are not patentably distinct from each other because the claimed invention simply claims a broader scope from the ’343 patent.
Claim Objections
Claims 1, 11 and 17 are objected to because of the following informalities:
In claim 1, line 1, spell out “SSD”. Claims 11 and 17 have the same issue. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Yang (US 11,507,298).
Referring to claims 1, 11 and 17, Yang discloses an SSD (fig. 1, SSD Controller 100 with NAND 110), comprising:
a storage (fig. 1, NAND flash 110) for a data;
a controller (fig. 11, NVMe Command Processing system 112 with host DMA 116) to process an input/output IO request (fig. 11, host data read command) from a host processor (fig. 11, host machine 106) on the data in the storage;
a computational storage unit (fig. 13, NVMe Command Processing system 112 with BMU 120 and 3D-VPA 114) to implement service for execution (fig. 13, host issues data processing command, processing data in BMU 120) on the data in the storage; and
a command router (fig. 11, NVMe Command Processing Subsystem 112) to route a command (fig. 11, read command 1; fig. 13, data processing command 1) received from the host processor to the controller (fig. 11, route command with steps 1/2/3/4/5/6/7/8) or the computational storage unit (fig. 13, route command with steps 1/2/3/4/5/6/7) based on the command,
wherein the command (fig. 11, read command 1; fig. 13, data processing command 1) is routed by the command router to the controller (fig. 11, NVMe Command Processing system 112 with host DMA 116) or the computational storage unit (fig. 13, NVMe Command Processing system 112 with BMU 120/3D-VPA 114) within the SSD.
As to claim 2, Yang discloses the SSD of claim 1, wherein the command is a Non-Volatile Memory Express NVNe command (fig. 1, NVMe command 112).
As to claim 3, Yang discloses the SSD of claim 1, wherein: the command uses a protocol (fig. 1, PCIe 104); a second command (fig. 8, config command) uses the protocol; and the command router is to route the command received from the host processor to the controller based on the command and to route the second command received from the host processor to the computational storage unit based on the second command (fig. 8, NCPS NAND Read Command with steps 1/2/3/4/5/6).
As to claims 4, 12 and 18, Yang discloses the SSD of claim 1, wherein the controller is separate (fig. 11, DMA 116 separate from NVMe Command Processing 112; fig. 13, BMU 120 separate from NVMe Command Processing 112) from the command router.
As to claims 5, 13 and 19, Yang discloses the SSD of claim 1, wherein the controller includes (fig. NVMe Command Processing system 112 itself) the command router.
As to claim 6, Yang discloses the SSD of claim 1, wherein the command router is to route the command to the controller based on the command being a storage device command (fig. 11, read command from NAND flash).
As to claim 7, Yang discloses the SSD of claim 1, wherein the command router is to route the command to the computational storage unit based on the command being a computational storage unit command (fig. 13, processing data in BMU).
As to claims 8 and 14, Yang discloses the SSD of claim 1, wherein the command includes two services (fig. 11, read command; fig. 13, processing data in BMU) of the computational storage unit.
As to claim 9, Yang discloses the SSD of claim 1, wherein the command router includes a list of commands (fig. 11, read from NAND; fig. 12, write to NAND) to be routed to the controller.
As to claim 10, Yang discloses the SSD of claim 1, wherein the command router includes a list of commands (fig. 13, processing data in BMU; fig. 14, write data to BMU) to be routed to the computational storage unit.
As to claims 15-16 and 20, Yang discloses the method of claim 11, wherein selecting the controller of the SSD or the computational storage unit of the SSD as a recipient based on the command includes: determining (fig. 11, NVMe Command Processing Sybsystem 112), at the command router, whether the command is in a list of commands (fig. 11, NAND read; fig. 13, BMU processing) to be routed to the SSD and/or the computational storage unit.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to examiner Cheng-Yuan Tseng whose telephone number is (571)272-9772, and fax number is (571)273-9772. The examiner can normally be reached on Monday through Friday from 09:00 to 17:30 Eastern Time. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alicia Harrington can be reached on (571)272-2330. The fax phone number for the organization where this application or proceeding is assigned is (571)273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at (866)217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call (800)786-9199 (IN USA OR CANADA) or (571)272-1000.
/CHENG YUAN TSENG/Primary Examiner, Art Unit 2615