Office Action Predictor
Last updated: April 16, 2026
Application No. 18/644,096

ZERO VOLTAGE SWITCHING HYBRID CONVERTER

Non-Final OA §102§103
Filed
Apr 24, 2024
Examiner
BEHM, HARRY RAYMOND
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Alpha And Omega Semiconductor International LP
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
88%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
913 granted / 1150 resolved
+11.4% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
37 currently pending
Career history
1187
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
49.5%
+9.5% vs TC avg
§102
34.9%
-5.1% vs TC avg
§112
8.9%
-31.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1150 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 4/24/24 has been considered by the examiner. Claim Objections Claim 11 is objected to because of the following informalities: in claim 11, line 1, “the buck converter” lacks antecedent basis. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1, 6, 11-12 and 16 are rejected under 35 U.S.C. 102a1 and 102a2 as being anticipated by Rizzolatti (US 2023/0353058). With respect to claim 1, Rizzolatti discloses a DC-DC switching hybrid converter receiving an input voltage (Fig. 18 Vin) and generating an output voltage (Fig. 18 Vout) having a substantially constant magnitude on an output node (Fig. 18 com), the hybrid converter comprising: a switched-capacitor converter circuit (Fig. 18 Q1-Q4) comprising: a plurality of switches (Fig. 18 Q1-Q4) configured to provide a fixed step-down ratio of M:1 (paragraph 152 8:1) between the input voltage and the output voltage; a first capacitor (Fig. 18 Cc2) coupled between a first node (Fig. 18 node Q4-Q5) and a second node (Fig. 18 node vy), the first node being switchably coupled (Fig 18 Q4) to the input voltage and the second node being switchably coupled (Fig 18 Q6) to a ground potential (Fig 18 ground symbol); and second (Fig. 18 Cres1) and third capacitors (Fig. 18 Cres2) coupled to the plurality of switches in a cross-coupled configuration; first and second inductors (Fig. 18 N1 of phase 1 and phase 2) each having a first terminal coupled to the output node (Fig 18 com), the first and second inductors being configured as a coupled inductor (Fig. 18 coupled as shown); and a zero-voltage switching network (Fig. 18 Lzvs, Q3,Q6) coupled between the second node (Fig. 18 vy) and the ground potential (Fig 18 ground symbol) to discharge voltages at some of the switches between switching states (Fig. 11 t3-t5, t8-t10) of the hybrid converter, wherein the hybrid converter generates the output voltage at the output node being 1/M (paragraph 152 1/8) of the input voltage. With respect to claim 6, Rizzolatti discloses the DC-DC switching hybrid converter of claim 1, wherein the zero-voltage switching network comprises a fourth capacitor (Fig. 18 Cc1) and a third inductor (Fig. 18 Lzvs) connected in series between the second node (Fig. 18 vy) and the ground potential (Fig. 18 Cc1 between ground via Q7-Lout-Vout). With respect to claim 11, Rizzolatti discloses the DC-DC switching hybrid converter of claim 1, wherein the buck converter has a fixed step-down ratio of 8:1 (paragraph 152 8:1). With respect to claim 12, Rizzolatti discloses a DC-DC switching hybrid converter receiving an input voltage (Fig. 8 Vin) and generating an output voltage (Fig. 8 Vout) having a substantially constant magnitude on an output node (Fig. 8 com), the hybrid converter comprising: a switched-capacitor converter circuit (Fig. 8 Q1-Q4) comprising: a plurality of switches configured to provide a fixed step-down ratio of M:1 (paragraph 152 8:1) between the input voltage and the output voltage; a first capacitor (Fig. 8 Cc2) coupled between a first node (Fig. 8 214) and a second node (Fig. 8 216), the first node being switchably coupled (Fig. 8 Q4) to the input voltage and the second node being switchably coupled (Fig. 8 Q6) to a ground potential (Fig. 8 ground symbol); and second (Fig. 8 CRES2) and third capacitors (Fig. 8 CRES1) coupled to the plurality of switches in a cross-coupled configuration; a transformer (Fig. 8 850) including a first primary winding (Fig. 8 W1) and a second primary winding (Fig. 8 W4) inductively coupled to a first secondary winding (Fig. 8 W2) and a second secondary winding (Fig. 8 W3), center taps (Fig. 8 nodes W1-CRES2 and W4-CRES1) of the first and second primary windings being coupled to respective second and third capacitors (Fig. 8 CRE2,CRES1), each primary winding and each secondary winding have a turns ratio of N1/N2 (Fig. 8 N1/N2); and a zero-voltage switching network (Fig. 8 Lzvs,Q3,Q6) coupled between the second node and the ground potential to discharge voltages at some of the switches (Fig. 8 Q1-Q4) between switching states of the hybrid converter, wherein the hybrid converter generates the output voltage at the output node having a stepped down value from the input voltage determined by the fixed step-down ratio M:1 and the turns ratio N1/N2 of the transformer (equation 3). With respect to claim 16, Rizzolatti discloses the DC-DC switching hybrid converter of claim 1, wherein the zero-voltage switching network comprises a fourth capacitor (Fig. 8 Cc1) and a third inductor (Fig. 8 Lzvs) connected in series between the second node (Fig. 8 216) and the ground potential (Fig. 8 Cc1 between ground via Q7-Lout-Vout). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 10 is rejected under 35 U.S.C. 103 as being unpatentable over Rizzolatti (US 2023/0353058). With respect to claim 10, Rizzolatti discloses the DC-DC switching hybrid converter of claim 1 as set forth above, and further discloses wherein Cc1=Cc2 (paragraph 193) and remains silent as to the inductance values. Nevertheless, the circuit topology has a symmetric structure between the two phases and it would have been desirable to balance the two phase currents (Fig. 18 is1,is2) by keeping the inductance values the same and keeping the capacitance values the same in order to reduce the output ripple. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing of the inventio to implement wherein the second and third capacitors have the same capacitance values and the first and second inductors have the same inductance values, in order to balance the current and to reduce the output current ripple. Allowable Subject Matter Claims 2-5, 7-9, 13-15 and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: With respect to claim 2, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, wherein the plurality of switches of the switched-capacitor converter circuit comprise: first, second, third and fourth switches connected in series between the input voltage and the ground potential, the first node being between the first switch and the second switch; and fifth, sixth, seventh and eighth switches connected in series where the fifth switch and the eighth switch have respective end terminals connected to the ground potential, the second node being between the fifth switch and the sixth switch, wherein the second capacitor has a first terminal coupled to a third node between the second switch and the third switch and a second terminal coupled to a fourth node between the seventh switch and the eighth switch; and the third capacitor has a first terminal coupled to a fifth node between the sixth switch and the seventh switch and a second terminal coupled to a sixth node between the third switch and the fourth switch; and wherein the first inductor has the first terminal coupled to the output node and a second terminal coupled to the sixth node; and the second inductor has the first terminal coupled to the output node and a second terminal coupled to the fourth node. With respect to claim 13, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, wherein the plurality of switches of the switched-capacitor converter circuit comprise: first, second, third and fourth switches connected in series between the input voltage and the ground potential, the first node being between the first switch and the second switch; and fifth, sixth, seventh and eighth switches connected in series where the fifth switch and the eighth switch have respective end terminals connected to the ground potential, the second node being between the fifth switch and the sixth switch, wherein the second capacitor has a first terminal coupled to a third node between the second switch and the third switch and a second terminal coupled to a second center tap of the second primary winding of the transformer; and the third capacitor has a first terminal coupled to a fifth node between the sixth switch and the seventh switch and a second terminal coupled to a first center tap of the first primary winding; and wherein the first primary winding of the transformer is connected in series with the first secondary winding at a sixth node between the third switch and the fourth switch; the second primary winding of the transformer is connected in series with the second secondary winding at a forth node between the seventh switch and the eighth switch, the first and second secondary windings being connected in series between the sixth and the fourth nodes, a center tap of the first and second secondary windings is the output node providing the output voltage. With respect to claim 19, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, wherein the hybrid converter generates the output voltage at the output node having a stepped down value being M+(M/2)*N1/N2. The aforementioned limitations in combination with all remaining limitations of the respective claims are believed to render the aforementioned indicated claim and any dependent claims thereof patentable over the art of record. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Halamicek (“Cross-Coupled Series-Capacitor Quadruple Step-Down Buck Converter”) discloses the base topology without ZVS and uses ZCS for switch SW2 as shown in Figure 2b, as well as a different switching pattern (see Fig. 3). Ellis (WO 2025/106919) discloses a hybrid converter. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HARRY RAYMOND BEHM whose telephone number is (571)272-8929. The examiner can normally be reached M-F: 8-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu Tran can be reached at 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HARRY R BEHM/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Apr 24, 2024
Application Filed
Jan 09, 2026
Non-Final Rejection — §102, §103
Mar 30, 2026
Response Filed

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12587102
POWER SUPPLY SYSTEM WITH OPTIMIZED AVAILABILITY
2y 5m to grant Granted Mar 24, 2026
Patent 12567814
Method and Device for Calibrating a Time Base Signal in a Photovoltaic Inverter
2y 5m to grant Granted Mar 03, 2026
Patent 12567733
FAULT PROTECTION APPARATUS AND PHOTOVOLTAIC INVERTER
2y 5m to grant Granted Mar 03, 2026
Patent 12562564
REDUCING INRUSH CURRENT TO A CAPACITOR BANK
2y 5m to grant Granted Feb 24, 2026
Patent 12555730
RELAY MODULE WITH COMBINED CONTROL AND POWER SUPPLY INPUT
2y 5m to grant Granted Feb 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
88%
With Interview (+8.2%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1150 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in for Full Analysis

Enter your email to receive a magic link. No password needed.

Free tier: 3 strategy analyses per month