DETAILED ACTION
The instant action is in response to application 24 April 2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification is objected to for the following informalities:
Since the Taiwanese patent appears to have the oldest filing date, it is required to include the filing date and number of that application in the background section. It is also ordinary and customary to place any other copending applications filing dates and publication dates (if available) in the background section.
¶1 should include the term of art “synchronous rectifier controller”.
¶3 should include term of art false-turn on.
The specification (¶12, 22, 24, 27, 28) appears to refer to term TOR and the figures TQR (Figure 3). This should be kept consistent.
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in Taiwan on 16 August 2023.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph.
As to claim 2, applicant claims “from an inner of the secondary side controller”. This adjective appears to be lacking a noun, because there a large number of things inside insdie the secondary controller. For the purposes of examination, it will be assumed that the above reads as “from an internal circuit element of the secondary side controller”.
As to claim 9, there is to claim 2 above and is being interpreted in a similar manner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore the previous rejections based on the apparatus will not be repeated. (The claims have been condensed.)
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 6, 8, 13 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 20140133192).
As to claim 1, Lin explicitly discloses a secondary-side controller applied to a flyback power converter, wherein the secondary-side controller prevents a secondary side of the flyback power converter from conducting incorrectly, the secondary-side controller comprising: a first comparison circuit (Fig. 3, item 120) for generating a first comparison signal according to a drain voltage (VDS) of a synchronous switch of the secondary side of the flyback power converter and a first parameter; a second comparison circuit (131, 132, 133 ) coupled to the first comparison circuit (coupled via Qbar) for generating a ready signal (VX1) according to the first comparison signal and a resistance of an
Though Lin teaches much of the claimed invention, he does not explicitly teach an external resistor. However external resistors are old and well known and therefore not patentable (See MPEP 2144.03 US 20120134516 ¶15; US 20090128353 ¶84, US 5193217 Fig. 2, item 86) and as such is not patentable. The advantage of using an external resistor would be to make maintenance significantly easier rather than having to troubleshoot individual pins.
As to claim 6, Lin teaches when the gate control signal generating circuit receives the ready signal and the drain voltage is less than a judgement voltage, the gate control signal generating circuit generates the gate control signal to the synchronous switch (¶52 “If a voltage of the sensing signal VSEN is lower than a predetermined threshold voltage by the synchronous rectification control circuit 110, the synchronous rectification control circuit 110 outputs the control signal VCTL to the synchronous rectification switch SS to have the synchronous rectification switch SS enter into a cut-off state”).
As to claim 8, Lin teaches An operational method of a secondary-side controller applied to a flyback power converter, wherein the secondary-side controller comprises a first comparison circuit, a second comparison circuit, and a gate control signal generating circuit, the operational method comprises: the first comparison circuit generating a first comparison signal according to a drain voltage of a synchronous switch on a secondary side of the flyback power converter and a first parameter; the second comparison circuit generating a ready signal according to the first comparison signal and a resistance of an external resistor; and the gate control signal generating circuit generating a gate control signal to the synchronous switch according to the ready signal and the drain voltage, wherein the synchronous switch is turned on according to the gate control signal (this is a method claim corresponding to apparatus claim 1 above and is regarded as obvious per MPEP 2112.02).
As to claim 13, this is a method claim corresponding to apparatus claim 6 above and is regarded as obvious per MPEP 2112.02).
Claims 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Lin (US 20140133192) in view of Radic (US 10756640)
As to claim 7, Lin does not explicitly teach wherein the flyback power converter operates in a quasi-resonance mode, though it is heavily implied.
Radic teaches wherein the flyback power converter operates in a quasi-resonance mode (Col. 1, lines 22-30“Quasi-resonant control methods induce a resonant waveform having sinusoidal voltage oscillations at the drains of one or more semiconductor switches of the power converter. Through well-timed control actions, the semiconductor switches are turned on at the instants where the drain voltage is minimum (i.e., valley switching), thus minimizing the semiconductor switching losses and drain-source dv/dt slope, leading to increased power processing efficiency and reduced electromagnetic interference (EMI).”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device above to use QR mode as disclosed in Radic to switch stress.
As to claim 14, this is a method claim corresponding to apparatus claim 7 above and is regarded as obvious per MPEP 2112.02.
Allowable Subject Matter
Claims 2, 9 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claims 3-5, 10-12 would be allowable if rewritten to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
As to claim 2, the prior art fails to disclose " wherein the first comparison circuit comprises: a sample-and-hold circuit for generating a sampled voltage according to the drain voltage; a first adjustment circuit coupled to the sample-and-hold circuit, wherein the first adjustment circuit updates a reference voltage according to the sampled voltage and the first parameter, and the first parameter is generated from an inner of the secondary-side controller; and a first comparator coupled to the synchronous switch and the first adjustment circuit, wherein the first comparator generates the first comparison signal when the drain voltage is greater than the reference voltage.” in combination with the additionally claimed features, as are claimed by the Applicant.
As to claim 3, the prior art fails to disclose: “wherein the second comparison circuit comprises: a counter coupled to the first comparison circuit, wherein the counter generates a counting signal according to the first comparison signal; a second adjustment circuit coupled to the first comparison circuit and the external resistor, wherein the second adjustment circuit updates a reference count according to the first comparison signal and the resistance of the external resistor; and a second comparator coupled to the counter and the second adjustment circuit, wherein the second comparator generates the ready signal when the count signal is greater than the reference count and after the drain voltage is less than a reference voltage, and the counter resets the count signal when the count signal is greater than the reference count and after the drain voltage is less than the reference voltage.” in combination with the additionally claimed features, as are claimed by the Applicant.
As to claim 9, the prior art fails to disclose " wherein the first comparison circuit generating the first comparison signal according to the drain voltage of the synchronous switch and the first parameter, comprises: a sample-and-hold circuit of the first comparison circuit generating a sampled voltage according to the drain voltage; a first adjustment circuit of the first comparison circuit updating a reference voltage according to the sampled voltage and the first parameter, wherein the first parameter is generated from an inner of the secondary-side controller; and a first comparator of the first comparison circuit generating the first comparison signal when the drain voltage is greater than the reference voltage.” in combination with the additionally claimed features, as are claimed by the Applicant.
As to claim 10, the prior art fails to disclose: “wherein the second comparison circuit generating the ready signal according to the first comparison signal and the resistance of the external resistor comprises: a counter of the second comparison circuit generating a counting signal according to the first comparison signal; a second adjustment circuit of the second comparison circuit updating a reference count according to the first comparison signal and the resistance of the external resistor; and after the drain voltage is less than a reference voltage and when the count signal is greater than the reference count, a second comparator of the second comparison circuit generating the ready signal and the counter resetting the count signal.” in combination with the additionally claimed features, as are claimed by the Applicant.
Please note: while objected or allowed claims have been indicated, only the presented claims have been examined for compliance with form and 35 USC 112 consideration. As a reminder, claims that are dependent upon objected claims still require examination for form and 35 USC 112 issues even if they overcome 35 USC 102 and 103 rejections. Similarly, amendments incorporating allowable subject matter into independent claims requires reconsideration for dependent claim form and any possible 35 USC 112 issues that arise through amendments even if the 35 USC 102 and 103 rejections are overcome. As such, applicant is advised that while examiner can enter previously allowed claims or previously objected claims rewritten into independent form after final rejection, any other claims may not be entered.
Conclusion
Examiner has cited particular column, paragraph, and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER M NOVAK whose telephone number is (571)270-1375. The examiner can normally be reached on 9AM-5PM,Monday through Thursday, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu Tran can be reached on 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PETER M NOVAK/ Primary Examiner, Art Unit 2839