DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 7-8, 10, 16 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu et al. (WO 2023092679 A1), Yu hereinafter.
Examiner’s note
The following rejection is based on an international reference WO 2023092679 A1. For rejection purposes reference is made to the US counterpart (US 20240032390 A1).
Regarding claim 1, Yu discloses display panel, comprising: an array substrate (10, ¶ [61], fig. 1), wherein a display region (101, ¶ [60], figs. 1 & 2) of the array substrate (10) is surrounded by a border region (102, ¶ [60], figs. 1 & 2) of the array substrate (10), and the border region (102) comprises an organic-layer-free region (OLF, hereinafter as denoted on the figure below); a protruding structure (24, ¶ [71], fig. 1), disposed in the border region (102) and at a side of the organic-layer-free region (OLF) away from the display region (101); and a packaging layer (40, ¶ [61], fig. 1), covering the display region (101) and at least a part of the border region (102), wherein the packaging layer (40) is disposed at a side of the protruding structure (24) facing the display region (101) (see fig. 1).
PNG
media_image1.png
409
845
media_image1.png
Greyscale
Regarding claim 2, Yu discloses a touch electrode layer (50, ¶ [61], fig. 1) disposed at a side of the packaging layer (40) away from the array substrate (10); wherein the array substrate (10) further comprises a metal wiring layer (211, ¶ [62], fig. 1), and the touch electrode layer (50) is electrically connected to the metal wiring layer (211) through a first via (63, ¶ [80], fig. 1).
Regarding claim 7, Yu discloses in ¶ [74] discloses that the protruding structure (24) blocks encapsulation layer (30); this implies that the protruding structure (24) extends along a direction parallel with a boundary between the display region (101) and the border region (102), and the protruding structure (24) comprises a continuous protruding strip.
Regarding claim 8, Yu discloses in ¶ [74] discloses that the protruding structure (24) blocks encapsulation layer (30); this implies that the protruding structure (24) extends along a direction parallel with a boundary between the display region (101) and the border region (102); and the protruding structure (24) comprise at least two rows of protruding units (241 & 242, ¶ [73], fig. 1), every two adjacent protruding units (241 & 242) in each of the at least two rows are separated by a gap (see fig, 1), and a projection of the at least two rows of protruding units (241 & 242) on the boundary is contiguous.
Regarding claim 10, Yu discloses in ¶ [71] that an edge of an interlayer insulating layer (70), which is disposed in the non-display region (102) and may also be used as a part of elevating a protruding structure (24); this implies that the protruding structure (24) is annular and surrounds the display region (101), since the non-display region (102) surrounds the display region (101) in an annular way.
Regarding claim 16, Yu discloses a method for manufacturing a display panel, comprising: forming an array substrate (10, ¶ [61], fig. 1) and a protruding structure (24, ¶ [71], fig. 1), wherein a display region (101, ¶ [60], figs. 1 & 2) of the array substrate (10) is surrounded by a border region (102, ¶ [60], figs. 1 & 2) of the array substrate (10), the border region (102) comprises an organic-layer-free region (OLF, hereinafter as denoted on the figure below), and the protruding structure (24) is formed in the border region (102) and at a side of the organic-layer-free region (OLF) away from the display region (101) (see fig. 1); and forming a packaging layer (40, ¶ [61], fig. 1) covering the display region (101) and at least a part of the border region (102), wherein the packaging layer (40) is disposed at a side of the protruding structure (24) facing the display region (101) (see fig. 1).
PNG
media_image1.png
409
845
media_image1.png
Greyscale
Regarding claim 20, Yu discloses a display device, comprising a display panel, wherein the display panel comprises: an array substrate (10, ¶ [61], fig. 1), wherein a display region (101, ¶ [60], figs. 1 & 2) of the array substrate (10) is surrounded by a border region (102, ¶ [60], figs. 1 & 2) of the array substrate (10), and the border region (102) comprises an organic-layer-free region (OLF, hereinafter as denoted on the figure below); a protruding structure (24, ¶ [71], fig. 1), disposed in the border region (102) and at a side of the organic-layer-free region (OLF) away from the display region (101); and a packaging layer (40, ¶ [61], fig. 1), covering the display region (101) and at least a part of the border region (102), wherein the packaging layer (40) is disposed at a side of the protruding structure (24) facing the display region (101) (see fig. 1).
PNG
media_image1.png
409
845
media_image1.png
Greyscale
Allowable Subject Matter
Claims 3-6, 9, 11-15 and 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if at least one the limitations indicated below were included in the base claim.
Regarding claim 3, the references of Prior Art of record fails to teach or suggest the combination of the limitations as set forth in claim 3, and specifically comprising the limitation directed to the protruding structure is arranged in the first border region and between the organic-layer-free region and the first via.
Regarding claim 4, the claim is allowable for the reasons given in claim 3 because of their dependency status from claim 3.
Regarding claim 5, the references of Prior Art of record fails to teach or suggest the combination of the limitations as set forth in claim 5, and specifically comprising the limitation directed to an anti-cracking groove is arranged in one or both of the third border region and the fourth border region; and the protruding structure is arranged in the one or both of the third border region and the fourth border region and at the side of the organic-layer-free region away from the display region.
Regarding claims 6 and 9, the claims are allowable for the reasons given in claim 5 because of their dependency status from claim 5.
Regarding claim 11, the references of Prior Art of record fails to teach or suggest the combination of the limitations as set forth in claim 11, and specifically comprising the limitation directed to a highest point of a surface of the protruding structure away from the array substrate is not lower than the target position.
Regarding claims 12-15, the claims are allowable for the reasons given in claim 11 because of their dependency status from claim 11.
Regarding claim 17, the references of Prior Art of record fails to teach or suggest the combination of the limitations as set forth in claim 17, and specifically comprising the limitation directed to at least the display region is located within a projection of an opening in the mask on the array substrate, and at least a part of a projection of the protruding structure on the array substrate is located within a projection of a non-opening region of the mask on the array substrate; and forming a packaging layer within the opening through the mask.
Regarding claims 18-19, the claims are allowable for the reasons given in claim 17 because of their dependency status from claim 17.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20250280710 A1, discloses a similar protruding structure on a border region.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSE M. DIAZ whose telephone number is (571)272-9822. The examiner can normally be reached Monday-Friday 8:00-4:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James R Greece can be reached at (571) 272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JOSE M DIAZ/Examiner, Art Unit 2875
/JAMES R GREECE/Supervisory Patent Examiner, Art Unit 2875
Prosecution Insights