DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 and 9-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by ISHIDO et al (US 2023/0074009).
Regarding claim 1, ISHIDO discloses a multilayer electronic component (Fig. 1-15), comprising: a body (Fig. 2) including a dielectric layer (Fig. 2, 2), a first internal electrode layer (Fig. ,2 5), and a second internal electrode layer (Fig. 2, 6) alternately disposed in a first direction (Fig. 2, left to right), with the dielectric layer interposed therebetween (Fig. 2); a first external electrode (Fig. 2, 8) disposed on one surface (Fig. 2, top surface) of two surfaces (Fig. 2, top and bottom) of the body opposing each other in a second direction (Fig. 2, up and down), perpendicular to the first direction (Fig. 2); and a second external electrode (Fig. 2, 10) disposed on the other surface of two surfaces of the body opposing each other in the second direction (Fig. 2), wherein the first internal electrode layer and the second internal electrode layer include first internal electrodes connected to the first external electrode (Fig. 2), and second internal electrodes connected to the second external electrode (Fig. 2), wherein the first and second internal electrodes are alternately disposed to be spaced apart from each other in a third direction (Fig. 6, up and down), perpendicular to the first (Fig. 6, left and right) and second directions (Fig. 6, in and out of the page), the first internal electrodes of the first internal electrode layer are alternately disposed with the second internal electrodes of the second internal electrode layer in the first direction (Fig. 6), and the second internal electrodes of the first internal electrode layer are alternately disposed with the first internal electrodes of the second internal electrode layer in the first direction (Fig. 6), wherein s ≥ td is satisfied, in which s is a distance in the third direction between one of the first internal electrodes and a second internal electrode, most adjacent to the one of the first internal electrodes in the third direction and td is a distance in the first direction between the one of the first internal electrodes and a second internal electrode, most adjacent to the one of the first internal electrodes in the first direction (Fig. 6, the distance between 5/6 in left to right is the same up and down so s = td, which teaches the claim limitation [0052])..
Regarding claim 2, ISHIDO further discloses that 0.5 ≤ te/we ≤1.5 is satisfied, in which te is a maximum size in the first direction of the one of the first internal electrode and the second internal electrode which is most adjacent to the one of the first internal electrodes in the first direction and we is a maximum size in the third direction of the one of the first internal electrodes and the second internal electrode which is most adjacent to the one of the first internal electrodes in the third direction (Fig. 6, they would be the same as they form squares of equal size therefore te/we would be 1).
Regarding claim 3, ISHIDO further discloses that te ≤ td is satisfied, in which te is a maximum size in the first direction of the one of the first internal electrode and the second internal electrode which is most adjacent to the one of the first internal electrodes in the first direction (they would be the same 0.3-10 μm [0051-0052]).
Regarding claim 9, ISHIDO further discloses that the first internal electrodes and the second internal electrodes are disposed in a lattice shape in a cross-section of the multilayer electronic component in the first and third directions (Fig. 6).
Regarding claim 10, ISHIDO further discloses that the first internal electrodes and the second internal electrodes have a substantially square shape in the cross-section of the multilayer electronic component in the first and third directions (Fig. 8).
Regarding claim 11, ISHIDO further discloses that the first internal electrodes are spaced apart from the second external electrode, and the second internal electrodes are spaced apart from the first external electrode (Fig. 2).
Regarding claim 12, ISHIDO further discloses that the dielectric layer (Fig. 2, 7) is disposed in a space in which the first internal electrodes are spaced apart from the second external electrode and in a space in which the second internal electrodes are spaced apart from the first external electrode (Fig. 2).
Regarding claim 13, ISHIDO further discloses that the first internal electrode layer and the second internal electrode layer comprise a plurality of first internal electrodes and a plurality of second internal electrodes, and an internal electrode, most adjacent to the one of the first internal electrodes, is a second internal electrode (Fig. 2 and 6).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over ISHIDO et al (US 2023/0074009).
Regarding claim 4, ISHIDO fails to specifically teach the claim limitations.
However, the examiner notes that the limitation of “wherein 50(te+td)≤ T is satisfied, in which te is a maximum size in the first direction of the one of the first internal electrode and the second internal electrode which is most adjacent to the one of the first internal electrodes in the first direction and T is a maximum size of the body in the first direction” is considered to be a result effective variable, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the invention to include the limitation of “wherein 50(te+td)≤ T is satisfied, in which te is a maximum size in the first direction of the one of the first internal electrode and the second internal electrode which is most adjacent to the one of the first internal electrodes in the first direction and T is a maximum size of the body in the first direction” as this limitation would be easily reached by one having ordinary skill in the art in order to construct the devices using understood variable specifications and designs in the art to best meet user needs based on known design possibilities.
Regarding claim 5, ISHIDO fails to specifically teach the claim limitations.
However, the examiner notes that the limitation of “wherein 50(s+te) ≤ W is satisfied, in which te is a maximum size in the first direction of the one of the first internal electrode and the second internal electrode which is most adjacent to the one of the first internal electrodes in the first direction and W is a maximum size of the body in the third direction” is considered to be a result effective variable, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the invention to include the limitation of “wherein 50(s+te) ≤ W is satisfied, in which te is a maximum size in the first direction of the one of the first internal electrode and the second internal electrode which is most adjacent to the one of the first internal electrodes in the first direction and W is a maximum size of the body in the third direction” as this limitation would be easily reached by one having ordinary skill in the art in order to construct the devices using understood variable specifications and designs in the art to best meet user needs based on known design possibilities.
Regarding claim 6, ISHIDO fails to specifically teach the claim limitations.
However, the examiner notes that the limitation of “wherein the first internal electrodes and the second internal electrodes are disposed in an amount of 25 or more layers in the first direction, respectively” is considered to be a result effective variable, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the invention to include the limitation of “wherein the first internal electrodes and the second internal electrodes are disposed in an amount of 25 or more layers in the first direction, respectively” as this limitation would be easily reached by one having ordinary skill in the art in order to construct the devices using understood variable specifications and designs in the art to best meet user needs based on known design possibilities.
Regarding claim 7, ISHIDO fails to specifically teach the claim limitations.
However, the examiner notes that the limitation of “wherein the first internal electrodes and the second internal electrodes are disposed in an amount of 25 or more layers in the third direction, respectively” is considered to be a result effective variable, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the invention to include the limitation of “wherein the first internal electrodes and the second internal electrodes are disposed in an amount of 25 or more layers in the third direction, respectively” as this limitation would be easily reached by one having ordinary skill in the art in order to construct the devices using understood variable specifications and designs in the art to best meet user needs based on known design possibilities.
Regarding claim 8, ISHIDO fails to specifically teach the claim limitations.
However, the examiner notes that the limitation of “wherein the number of first internal electrodes and second internal electrodes overlapping in the third direction is greater than the number of first internal electrodes and second internal electrodes overlapping in the first direction” is considered to be a result effective variable, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the invention to include the limitation of “wherein the number of first internal electrodes and second internal electrodes overlapping in the third direction is greater than the number of first internal electrodes and second internal electrodes overlapping in the first direction” as this limitation would be easily reached by one having ordinary skill in the art in order to construct the devices using understood variable specifications and designs in the art to best meet user needs based on known design possibilities.
Claim(s) 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over ISHIDO et al (US 2023/0074009) in view of Isota et al (US 2017/0018358).
Regarding claim 14, ISHIDO fails to specifically teach the claim limitations.
Isota teaches that the dielectric layer includes Ba and Ti ([0050]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Isota to the invention of ISHIDO, in order to increase the reliability of the capacitor with smaller dielectric layer (Isota [0037]).
Regarding claim 15, ISHIDO fails to specifically teach the claim limitations.
Isota teaches that the dielectric layer includes calcium (Ca), strontium (Sr), zirconium (Zr), and titanium (Ti) ([0050] Table 1).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Isota to the invention of ISHIDO, in order to increase the reliability of the capacitor with smaller dielectric layer (Isota [0037]).
Additional Relevant Prior Art:
KOBAYASHI et al (US 2008/0129156) teaches relevant art in Fig. 1-10.
Masuda et al (US 2009/0052110) teaches relevant art in Fig. 1-11.
Masuda et al (US 2009/0154054) teaches relevant art in Fig. 1-3.
LEE (US 2021/0082620) teaches relevant art in Fig. 1-19.
LEE et al (US 2021/0183577) teaches relevant art in Fig. 1-10.
Lee et al (US 2021/0183569) teaches relevant art in Fig. 1-13.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL P MCFADDEN whose telephone number is (571)270-5649. The examiner can normally be reached M-Thur 8am-9pm PST.
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/MICHAEL P MCFADDEN/Primary Examiner, Art Unit 2848