Prosecution Insights
Last updated: July 17, 2026
Application No. 18/645,012

VIRTUAL PROCESSOR AUTO-SUSPEND DURING VIRTUALIZATION STACK SERVICING

Non-Final OA §103
Filed
Apr 24, 2024
Examiner
ACHILLE, ASHMEED CARCIA
Art Unit
Tech Center
Assignee
Microsoft Technology Licensing, LLC
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-60.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
8 currently pending
Career history
5
Total Applications
across all art units

Statute-Specific Performance

§101
4.8%
-35.2% vs TC avg
§103
95.2%
+55.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§103
DETAILED ACTION The communication is in response to the application filed on 04/24/2024 in which claims 1-20 are pending in the application. Claims 1, 12 and 20 are independent form. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 12 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203 A1), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1). As per claim 1 Fahrig discloses: detecting a servicing operation for a component of a virtualization stack that supports execution of a virtual machine (VM); [0054] “the scheduler 250 may opportunistically create availability on LP1 by de-scheduling a thread issued from virtual processor or by de-scheduling a task 401 (e.g., I/O operation) being performed by the root partition 340, as shown in FIG. 4. This creation of availability may be in response to detecting that a thread was performing a spin wait for an extended number of consecutive cycles or that a time slice allocated to run the task 401 had expired. In this situation, the task 410 issued by the root partition 340 is stalled until the root partition 340 can be rescheduled to LP1 to complete the accompanying I/O operation.” detecting a first interrupt from a first virtual processor (VP) of a partition associated with the VM while the component of the virtualization stack is being serviced; [0060] “Initially, a setting in the scheduler may be invoked to exclusively schedule the root partition to LP1. This setting may be invoke in a variety of ways. In one instance, a pattern of I/O operations performed by the root partition may be monitored over a window of time and a hardware-interrupt rate may be derived as a function of the pattern of I/O operations.” determining that the first interrupt is a root interrupt type; [0060] “Initially, a setting in the scheduler may be invoked to exclusively schedule the root partition to LP1. This setting may be invoke in a variety of ways. In one instance, a pattern of I/O operations performed by the root partition may be monitored over a window of time and a hardware-interrupt rate may be derived as a function of the pattern of I/O operations.” Fahrig does not explicitly disclose based on the first interrupt being the root interrupt type: holding the first interrupt at a hypervisor; and suspending the first VP; and after completion of the servicing operation: resuming the first VP; and releasing the first interrupt to a root partition. However, Dalcher discloses holding the first interrupt at a hypervisor; and [0025] In response to an event interception, a security handler can put the event-triggering thread in a holding state and initiate tasks suspending the first VP; and [0024] “….an intercepted event in a virtual partition may be parked or suspended within the virtual partition while the event is evaluated…. Suspending associated operations can minimize performance impacts on the virtual partition and also allow an internal agent to run within the virtual partition to execute tasks for an external handler.” resuming the first VP; and [0035] “Virtualization guest may resume execution of other processes, threads, etc. at 345.” [0037] “…. may use hypervisor extension 115 to allow process 220 to continue at 360, such as by resetting virtual processor 205a's instruction pointer to resume execution from the point where the triggering event occurred.” Both Fahrig and Dalcher are in similar field of endeavor, as they both are in hypervisor-specific management and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, and with the teachings of Dalcher based on the first interrupt being the root interrupt type: to hold the first interrupt at a hypervisor; suspending the first VP; and after completion of the servicing operation: resuming the first VP; Motivation to combine would be to improve the performance of the system by giving access to the hypervisor to managing the interruption of the VM; while accessing the interruption with the VM the virtual processor is parked during the servicing and after completing the service resume where the interruption occurred. Fahrig in view of Dalcher does not explicitly disclose “releasing the first interrupt to a root partition” However, Steinert discloses “releasing the first interrupt to a root partition.” [0015] “… the hypervisor 110 releases the received interrupts. At 220, the applications within the first partition 102 and second partition 104 handle their respectively received interrupts from the hypervisor 110.” Fahrig, Dalcher and Steinert are in similar field of endeavor, as they both are in hypervisor-specific management and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, and with the teaching of Steinert after completion of the servicing operation, to release the first interrupt to a root partition Motivation to combine would be to improve the performance of the system by preventing reoccurring interruptions. As per claim 12, it has similar limitation as claim 1, therefore rejected under the same rationale. As per claim 20, it has similar limitation as claim 1, therefore rejected under the same rationale. Claims 2 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Entezari (US 20130332922). As per claim 2 Fahrig, Dalcher and Steinert disclose the method of claim 1 detailed above. Fahrig, Dalcher and Steinert does not disclose setting a partition property for the partition associated with the VM, the partition property indicating an auto-suspend mode that allows one or more VPs associated with the partition to continue running unless the VP generates an interrupt of the root interrupt type; and clearing the partition property after the completion of the servicing operation. However, Entezari discloses “setting a partition property for the partition associated with the VM, the partition property indicating an auto-suspend mode that allows one or more VPs associated with the partition to continue running unless the VP generates an interrupt of the root interrupt type;” [0020] “…. the error interrupt may be broadcast to all guest partitions. A monitor installed in each of the guest partitions may receive the broadcast error interrupt… If the error interrupt does affect the guest partition, the guest partition may wait for a message from a central error handling routine on a service partition, such as an advanced configuration and power interface (ACPI) service partition, of the system executing the guest partitions. The service partition may identify affected guest partitions assigned to the device that generated the error interrupt and transmit messages to the affected guest partitions. “clearing the partition property after the completion of the servicing operation.” [0020] “Alternatively, the message may include an instruction to remove and clear the device that caused the error.” Fahrig, Dalcher, Steinert, and Entezari are in similar field of endeavor, as they are all in hypervisor-specific management and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teaching of Steinert, and with the teaching of Entezari to set a partition property for the partition associated with the VM, the partition property indicating an auto-suspend mode that allows one or more VPs associated with the partition to continue running unless the VP generates an interrupt of the root interrupt type; and clear the partition property after the completion of the servicing operation. Motivation to combine would to be improve the system by quickly addressing error interruption which would further reduce the time of service within the processors. As per claim 13, it has similar limitation as claim 2, therefore is rejected under the same rationale. Claims 3 is rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Entezari (US 20130332922), in view of Sherwin (US 20240385867 A1). As per claim 3 Fahrig, Dalcher, Steinert, and Entezari disclose the method of claim 2 detailed above. Fahrig, Dalcher, Steinert, and Entezari does not disclose “wherein the partition property is set by a hypercall from the virtualization stack to the hypervisor.” However, Sherwin discloses “wherein the partition property is set by a hypercall from the virtualization stack to the hypervisor.” [0041] “In some embodiments, the management partition 110 is configured to send hypercalls to the hypervisor 140 when the management partition 110 requests for enabling the host mode or the system mode. For example, when the management partition 110 requests for access to performance monitoring hardware for monitoring a virtual processor (VP) of a particular guest partition in the host mode, a hypercall is issued with specific information, such as (but not limited to) a VM identifier corresponding to the particular guest partition, a VP identifier corresponding to the VP of the particular guest partition, PMU counters identifiers, and/or particular events that are to be tracked” Fahrig, Dalcher, Steinert, Entezari, and Sherwin are in similar field of endeavor, as they are all in hypervisor-specific management and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teaching of Steinert, with the teaching of Entezari, and with the teachings of Sherwin to have the partition property set by a hypercall from the virtualization stack to the hypervisor. Motivation to combine would be to improve of the performance of the system by allowing the hypervisor to have direct control of the certain information of the partition property. Claims 4 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Reuther (US 20240095053 A1), in view of Traut (US 20070136506 A1). As per claim 4 Fahrig, Dalcher and Steinert disclose the method of claim 1 detailed above. Fahrig, Dalcher and Steinert does not disclose saving a state of the component of the virtualization stack; servicing the component of the virtualization stack; and restoring the state of the component of the virtualization stack. However, Reuther discloses “saving a state of the component of the virtualization stack;” [0002] “Another form is VM save/restore migration, in which a virtualization stack saves VM state at a source VM host node, restores the VM state at a target VM host node, and brings up the VM at the target node.” restoring the state of the component of the virtualization stack. [0002] “Another form is VM save/restore migration, in which a virtualization stack saves VM state at a source VM host node, restores the VM state at a target VM host node, and brings up the VM at the target node.” Fahrig, Dalcher, Steinert and Reuther are in similar field of endeavor, as they are all in hypervisor-specific management and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, and with the teachings of Reuther to save and restore the state of the component of the virtualization stack. Motivation to combine would be to improve the performance of the system by being able to recover from a disruption and reverting back to a stable state of the virtualization stack. Fahrig, in view of Dalcher, Steinert and Reuther does not disclose servicing the component of the virtualization stack; However, Traut disclose “servicing the component of the virtualization stack;” [0042] “Virtualization Stack 310 in general, and the VSMM 312 in particular, utilize the hypervisor 308 services in order to create and manage isolated Partitions 304. Note that the VSMM 312 utilizes the memory related hypervisor services 314 while other components in the Virtualization Stack 312 utilize different hypervisor services 316” Fahrig, Dalcher, Steinert, Reuther and Traut are in similar field of endeavor, as they are all in virtualization of application and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, with the teachings of Reuther, and with the teachings on Traut to servicing the component of the virtualization stack. Motivation to combine would be to improve the performance of the system by optimizing the resource utilization which would further introduce scalability and efficiency. As per claim 14, it has similar limitation as claim 4, therefore is rejected under the same rationale. Claims 5 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Reuther (US 20240095053 A1), in view of Traut (US 20070136506 A1), in view of Bachu (US 9454549 B1). As per claim 5 Fahrig, Dalcher, Steinert, Reuther and Traut disclose the method of claim 4 detailed above. Fahrig in view of Dalcher, Steinert, Reuther and Traut does not disclose saving the state of the component of the virtualization stack comprises creating a backup record comprising an entirety of the state of the component of the virtualization stack; and restoring the state of the component of the virtualization stack comprises restoring the backup record as the state of the component of the virtualization stack. However, Bachu discloses “saving the state of the component of the virtualization stack comprises creating a backup record comprising an entirety of the state of the component of the virtualization stack;” [col 7 lines 34-39] “…. In some embodiments, the metadata includes data about a stored backup data. For example, metadata includes data indicating which data is stored in a backup data, backup versioning information of a stored backup data, replication information about a stored backup data, a time associated with a backup data….” “restoring the state of the component of the virtualization stack comprises restoring the backup record as the state of the component of the virtualization stack.” [col 7 lines 4-14] “…. In some embodiments, it is determined that state information is to be reconciled when it is detected that a backup application has encountered an error, failed, and/or has been restored from a backup data of the backup application. For example, when a backup application encounters an error, the state of the backup application is restored from a checkpoint of the backup data of the state data…” Fahrig Dalcher, Steinert, Reuther, Traut and Bachu are in similar field of endeavor, as they are all in data processing and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, with the teachings of Reuther, with the teachings on Traut, and with the teaching of Bachu to save the state of the component of the virtualization stack comprises creating a backup record comprising an entirety of the state of the component of the virtualization stack; and restore the state of the component of the virtualization stack comprises restoring the backup record as the state of the component of the virtualization stack. Motivation to combine would be to improve the system by increasing the performance by restoring and saving the virtualization stack by reduce the redundancy of workload even through maintenance. As per claim 15, it has similar limitation as claim 5, therefore is rejected under the same rationale. Claims 6 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Reuther (US 20240095053 A1), in view of Traut (US 20070136506 A1), in view of Liang (US 7120572 B1). As per claim 6 Fahrig, Dalcher, Steinert, Reuther and Traut method of claim 4 detailed above. Fahrig, Dalcher, Steinert, Reuther and Traut does not disclose “saving the state of the component of the virtualization stack comprises creating a backup record comprising less than an entirety of the state of the component of the virtualization stack; and restoring the state of the component of the virtualization stack comprises reconciling the backup record with a portion of the state that was permuted while servicing the component of the virtualization stack.” However, Liang disclose “saving the state of the component of the virtualization stack comprises creating a backup record comprising less than an entirety of the state of the component of the virtualization stack” [col 9 lines 11-13] “…. verifier 120, the verifier saves "snapshots" 282 of the derived map 130 for certain instructions in a local snapshot array 132.” [col 17 lines 60-64] “Therefore, when the fast verifier compares the virtual stack portion of a derived map with the virtual stack portion of the snapshot in a map sub-attribute for an exception handler in step 392, the fast verifier temporarily transforms the virtual stack portion of the derived map to contain just one entry….” restoring the state of the component of the virtualization stack comprises reconciling the backup record with a portion of the state that was permuted while servicing the component of the virtualization stack. [col 17 lines 65-67] “and then restores the stack portion of the derived map to its pre-transformed state after the processing of the exception handler instruction as a successor instruction is completed.” Fahrig, Dalcher, Steinert, Reuther, Traut and Liang are in similar field of endeavor, as they are all in arrangement for program and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, with the teachings of Reuther, with the teachings on Traut, and with the teaching of Liang to save the state of the component of the virtualization stack comprises creating a backup record comprising less than an entirety of the state of the component of the virtualization stack; and restore the state of the component of the virtualization stack comprises reconciling the backup record with a portion of the state that was permuted while servicing the component of the virtualization stack. Motivation to combine would be to improve the system by increasing the performance by restoring and saving a portion the virtualization stack by reduce the redundancy of workload even through maintenance. As per claim 16, it has similar limitation as claim 6, therefore is rejected under the same rationale. Claims 7 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Wang (US 20100077394 A1), in view of Yang (US 10282326 B1), in view of Bhandari (US 20190087223 A1) As per claim 7 Fahrig, Dalcher and Steinert disclose the method of claim 1 detailed above. Fahrig, Dalcher and Steinert does not disclose detecting a second interrupt from a second VP of the partition associated with the VM while the component of the virtualization stack is being serviced; determining that the second interrupt is a synthetic interrupt type; and based on the second interrupt being the synthetic interrupt type: holding the second interrupt at the hypervisor while permitting the second VP to continue running; or returning a timeout status VP while permitting the second VP to continue running. However, Wang disclose “detecting a second interrupt from a second VP of the partition associated with the VM while the component of the virtualization stack is being serviced;” [0030] “Continuing with the description of FIG. 2, the computer 200 can include a root partition 204 that may include a virtualization service provider 228 (VSP.) In this example architecture the root partition 204 can access the underlying hardware via device drivers 224. The VSP 228 in this example can effectuate interfaces in the children partitions that can be considered virtual machines by instantiating different classes of devices as software and exposes interfaces to the devices within the partitions. Each virtual machine such as VM 216 and 218 can include a virtual processor such as virtual processors 230 and 232 that the guest operating system can manage and schedule threads to execute on.” [0049] “FIG. 6 showing additional operation 818 that shows receiving an interrupt at the determined system time; and sending an interrupt to a virtual processor of the first virtual machine and an interrupt to a second virtual processor of the second virtual machine. Fahrig, Dalcher, Steinert and Wang are in similar field of endeavor, as they are all in arrangement for program and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, and with the teachings of Wang to detect a second interrupt from a second VP of the partition associated with the VM while the component of the virtualization stack is being serviced. Motivation to combine would be to improve the system performance by monitoring the interruption from further issue that may be cause by the interruptions. Fahrig in view of Dalcher, Steinert and Wang does not disclose determining that the second interrupt is a synthetic interrupt type; and based on the second interrupt being the synthetic interrupt type: holding the second interrupt at the hypervisor while permitting the second VP to continue running; or returning a timeout status VP while permitting the second VP to continue running. However, Yang discloses “determining that the second interrupt is a synthetic interrupt type;” [col 2 lines 42- 55] “The technique for monitoring synthetic interrupts includes executing monitoring software that configures a cycle counter to generate synthetic interrupts periodically. These interrupts are “synthetic” in that the interrupts are generated to simulate other interrupts…. In general, the synthetic interrupts mimic the behavior of the subject interrupts in as many ways as possible.” Fahrig, Dalcher, Steinert, Wang and Yang are in similar field of endeavor, as they are all in data processing and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, with the teachings of Wang and with the teaching of Yang to determine that the second interrupt is a synthetic interrupt type. Motivation to combine would be to improve the system by analyzing the reliably by separating the actual interruptions from the synthetic ones. Fahrig in view of Dalcher, Steinert, Wang and Yang does not disclose “holding the second interrupt at the hypervisor while permitting the second VP to continue running; or returning a timeout status VP while permitting the second VP to continue running.” However, Blandari discloses “holding the second interrupt at the hypervisor while permitting the second VP to continue running” [0067] “As described above, the hypervisor 420 may hold one or more interrupts 470 and monitor virtual processor 1 440, virtual processor 2 450 and virtual processor” Fahrig, Dalcher, Steinert, Wang, Yang and Blandari are in similar field of endeavor, as they are all in data processing and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, with the teachings of Wang, with the teachings of Yang and with the teachings of Blandari to determine that the second interrupt is a synthetic interrupt type and based on the second interrupt being the synthetic interrupt type to hold the second interrupt at the hypervisor while permitting the second VP to continue run. Motivation to combine would be to improve the system by creating stability without stopping the VPs because of an unnecessary interruption that has occurred. As per claim 17, it has similar limitation as claim 7, therefore is rejected under the same rationale. Claims 8 is rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1) in view of Wang (US 20100077394 A1), in view of Yang (US 10282326 B1), in view of Bhandari (US 20190087223 A1), in view of Yee (US 20220206972 A1) As per claim 8 Fahrig, Dalcher, Steinert, Wang, Yang and Blandari method of claim 7 detailed above. Fahrig, Dalcher, Steinert, Wang Yang and Blandari does not disclose releasing the second interrupt after the completion of the servicing operation. However, Yee discloses “releasing the second interrupt after the completion of the servicing operation.” [0095] “Due to this threshold being surpassed at time 474, the release interrupt requests signal is asserted causing the first, second, and ith interrupts…… At time 476, the core(s) 298 completes servicing of the first interrupt 297, and the first interrupt request 300 is cleared. At time 478, the core(s) 298 completes servicing of the second interrupt 297, and the second interrupt request 300 is cleared.” Fahrig, Dalcher, Steinert, Wang, Yang, Blandari and Yee are in similar field of endeavor, as they are all in data processing and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, with the teachings of Wang, with the teachings of Yang, with the teachings of Blandari, and with the teachings of Yee to release the second interrupt after the completion of the servicing operation Motivation to combine would be to improve the system by creating a controlled interruption stream. Claims 9 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Liguori (US 9292332 B1). As per claim 9 Fahrig, Dalcher, and Steinert disclose the method of claim 1 detailed above. Fahrig, Dalcher, and Steinert does not disclose suspending the first VP comprises suspending all VPs of the partition associated with the VM; and resuming the first VP comprises resuming all the VPs of the partition. However, Liguori discloses “suspending the first VP comprises suspending all VPs of the partition associated with the VM;” [col 22 lines 19-23] “By stopping operation of the virtual machine instances 120, the update can proceed without causing the loss of data or other failures that could occur. Stopping the operation of the virtual processors suspends operation of the virtual machine instances 120.” [col 22 lines 24-26] “At (5) state information associated with each virtual machine instance 120 is saved into memory partition 104B. Storing the state information in memory partition” “resuming the first VP comprises resuming all the VPs of the partition.” [col 23 lines 7-16] “At (7), the virtual machine monitor 110 retrieves the state information for the virtual machine instances 120. The state information for the virtual machine instances 120 allows the virtual machine monitor 110 to resume the operation of the physical computing device 100 and the virtual machine instances 120 without changing the state or any operation al characteristics or parameters of the virtual machine instances 120. At (8), the virtual machine monitor 110 instructs the virtual machine instances 120 to resume operation and at (9) the virtual machine instances 120 resume operation.” Fahrig, Dalcher, Steinert, and Liguori are in similar field of endeavor, as they are all in hypervisor-specific management and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, and with the teachings of Liguori to suspending the first VP comprises suspending all VPs of the partition associated with the VM and resuming the first VP comprises resuming all the VPs of the partition. Motivation to combine would be to preserving the state where the interruption has occurred, after preserving the state of the VPs, and the error has been cleared, the VPs can continue without restarting the VM nor VPs. As per claim 18, it has similar limitation as claim 9, therefore is rejected under the same rationale. Claims 10 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Liguori ( US 9292332 B1), in view of Pereira( US 20190050560 A1). As per claim 10 Fahrig, Dalcher, Steinert, and Liguori disclose the method of claim 9 detailed above. Fahrig, Dalcher, Steinert, and Liguori does not disclose freezing a partition reference time for the partition based on suspending all the VPs of the partition; and resuming the partition reference time based on resuming all the VPs of the partition. However, Pereira disclose “freezing a partition reference time for the partition based on suspending all the VPs of the partition; and resuming the partition reference time based on resuming all the VPs of the partition. [0050] “When entering connected standby, the partition reference time is paused. Resume from connected standby resumes the reference time from where it was.” Fahrig, Dalcher, Steinert, Liguori and Pereira are in similar field of endeavor, as they are all in hypervisor-specific management and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert, with the teachings of Liguori, and with the teachings of Pereira to freeze a partition reference time for the partition based on suspending all the VPs of the partition [col 22 lines 19-23 Liguori] ; and resuming the partition reference time based on resuming all the VPs of the partition [col 23 lines 7-16 Liguori]. Motivation to combine would be to improve the system by preserving the state where the interruption has occurred, and after the interruption been resolve, the VPs can continue at the reference time. As per claim 19, it has similar limitation as claim 10, therefore is rejected under the same rationale. Claims 11 is rejected under 35 U.S.C. 103 as being unpatentable over Fahrig (US 20110126203), in view of Dalcher (US 20120317570 A1), in view of Steinert (US 20160034291 A1), in view of Mansell (US 20100023666), As per claim 11 Fahrig, Dalcher, and Steinert disclose the method of claim 1 detailed above. Fahrig, Dalcher, and Steinert does not disclose “before holding the first interrupt at the hypervisor and suspending the first VP, determining that processing the first interrupt would rely on the component of the virtualization stack to which the servicing operation applies.” However, Mansell disclose “before holding the first interrupt at the hypervisor and suspending the first VP, determining that processing the first interrupt would rely on the component of the virtualization stack to which the servicing operation applies.” [0064] “The mapping data illustrated in FIG. 4 is managed and used by the hypervisor software to populate the list registers 18 with data characterising physical interrupt signals received by the external interface hardware 26 and requiring servicing by one of the virtual machines.” [0066] “FIG. 5 is a flow diagram schematically illustrating the action of the hypervisor software when receiving a physical interrupt signal from the external interface hardware 26 or a software interrupt signal as internally generated within the hypervisor software by a virtual device, or by software running on one of the virtual machines and via the hypervisor software. At step 36 the hypervisor receives an interrupt signal and is vectored to predetermined portion of code to process that interrupt signal. At step 38 the hypervisor reads the external interface hardware 26 to determine the physical interrupt number of the physical interrupt which has arisen. At step 40 the hypervisor software looks up within the table data of FIG. 4 which virtual machine is to handle that physical interrupt signal and what is the virtual interrupt number for the physical interrupt concerned.” Fahrig, Dalcher, Steinert, and Mansell are in similar field of endeavor, as they are all in hypervisor-specific management and, therefore, are combinable/modifiable. Therefore, it would have been obvious to one the ordinary skills in the art before the effective filing data of the claimed inventions to modify the teaching of Fahrig, with the teachings of Dalcher, with the teachings of Steinert and with the teachings of Mansell to determine that processing the first interrupt would rely on the component of the virtualization stack to which the servicing operation applies, before holding the first interrupt at the hypervisor and suspending the first VP. Motivation to combine would be to improve the system by having a management system that can ensure that hypervisor can handle the require services before hold the first interruption and suspending the first VP. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Oks et al. (US 20180285135 A1) discloses a hypervisor that applies resource policies to virtual processors and schedules execution of virtual processors on physical processors. Cui; Weidong (US 20130152207 A1) disclose a protection systems that is referred to as active monitoring, wherein a protection system actively intercepts system events as they occur on the computing device, and the protection system then interprets associated states of such events in accordance with the goals of the protection system. Traut; Eric P. (US 20070050764 A1) disclose a hierarchical virtualization includes using a hypervisor that maintains a first partition and using a virtualization stack within the first partition to create and control a second partition. Vega; Rene Antonio (US 20060206892 A1) disclose a distribution approach to intercept handling allows for a much less complex virtualizer and moves the intercept functionality up into each partition where each external monitor uses the resources of the corresponding guest operating system in that partition to resolve the intercept event. MCNULTY; Mark James (US 20210129024 A1) disclose a method saving and restoring physical hardware states and virtual machine (VM) states for an application actively being executed on a virtual machine. Lang; Jakob C (US 20160048405 A1) disclose a hypervisor to suspend virtual machines at a given future first point in time; the hypervisor determining if its virtual machines can be suspended at the first point in time, and, if the suspending is possible, returning a suspend handle to the control instance and storing the suspend handle. Tanaka; Shunji(US 5095427 A) disclose a method and a system in a virtual machine system controlling a simultaneous run of one or more operating systems (OS's) by use of a virtual machine control program on a real machine including a storage area for each virtual processor constituting the virtual machine for saving a status of each virtual processor. GREST; Alexander Daniel (US 20240211288 A1) disclose a hypervisor receives a request, from a first guest partition that operates at the hypervisor, to create a second guest partition as a child of the first guest partition. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHMEED ACHILLE whose telephone number is (571)272-9437. The examiner can normally be reached Monday-Friday 7am -4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, PIERRE VITAL can be reached at (571)272-4215. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A.A./Examiner, Art Unit 2198 /PIERRE VITAL/Supervisory Patent Examiner, Art Unit 2198
Read full office action

Prosecution Timeline

Apr 24, 2024
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §103 (current)

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month