DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 6, 11 and 16 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 6, 11 and 16 of U.S. Patent No. 12,597,180. Although the claims at issue are not identical, they are not patentably distinct from each other because it is clear that all the elements of the application claims 1, 6, 11 and 16 are to be found in patent claims 1, 6, 11 and 16 (as the application claims 1, 6, 11 and 16 fully encompasses patent claims 1, 6, 11 and 16). The difference between the application claims and the patented claims lies in the fact that the patent claims includes many more elements and is thus much more specific. Thus the invention of claims of the patent application is in effect a "species" of the "generic" invention of the application claims. It has been held that the generic invention is "anticipated" by the "species". See In re Goodman, 29 USPQ2d 2010 (Fed. Cir. 1993
18645273
1. (Currently Amended) A method for optimizing a search space associated with a plurality of alignment curves, the method comprising: determining, at least one processor, a bounding region; determining, at the at least one processor, an initial alignment within the bounding region; generating, at the at least one processor, a corridor buffer associated with the initial alignment; determining a plurality of completeness levels of a plurality of polygon bounded areas and a synthetic completeness of the plurality of polygon bounded areas based on cost layer data; and generating, at the at least one processor and based on the corridor buffer, a rasterized cost map including the plurality of completeness levels of the plurality of polygon bounded areas and the synthetic completeness of the plurality of polygon bounded areas.
2. (Original) The method of claim 1, further comprising: storing, in at least one memory, the rasterized cost map; and communicating, at the at least one processor, the rasterized cost map to a one dimensional (1-D) optimizer, the 1-D optimizer being configured to generate, based on the initial alignment, an optimized profile for an alignment.
4. (Original) The method of claim 1, in which generating the corridor buffer is based on a plurality of points distributed at or near the initial alignment.
5. (Original) The method of claim 1, in which the rasterized cost map comprises a two dimensional (2-D) set of values associated with a cost to traverse.
12,597,180 B2
1. A method for gap filling of geographic information service (“GIS”) data, the method comprising: determining, at at least one processor, a bounding region at or near an initial alignment; determining, at the at least one processor, the initial alignment within the bounding region; generating, at the at least one processor, a corridor buffer at or near the initial alignment and within the bounding region; processing, at the at least one processor, cost layer data; determining, at the at least one processor and based on the cost layer data, incompleteness of a plurality of polygon-bounded areas; determining, at the at least one processor and based on the cost layer data, partial completeness of the plurality of polygon-bounded areas; determining, at the at least one processor and based on the cost layer data, completeness of the plurality of polygon-bounded areas; generating, at the at least one processor and based on the incompleteness, the partial completeness, synthetic completeness, and the completeness of the plurality of polygon-based areas, the synthetic completeness of the plurality of polygon-bounded areas; and storing, at the at least one processor and in at least one memory, a rasterized cost map including the completeness and the synthetic completeness of the plurality of polygon-bounded areas.
3. The method of claim 1, further comprising communicating, at the at least one processor and from the at least one memory, the rasterized cost map to a one dimensional (1-D) optimizer, the 1-D optimizer being configured to optimize a profile of the initial alignment based on the completeness and synthetic completeness of the plurality of polygon-bounded areas.
4. The method of claim 1, in which the generating the corridor buffer is based on a point distribution.
5. The method of claim 1, in which the rasterized cost map comprises a two dimensional (2-D) plurality of values associated with costs to traverse.
6. (Currently Amended) An apparatus for optimizing a search space associated with a plurality of alignment curves, the apparatus comprising: at least one memory; and at least one processor coupled to the at least one memory, the at least one processor configured: to determine a bounding region; to determine an initial alignment within the bounding region; to generate a corridor buffer associated with the initial alignment; to determine a plurality of completeness levels of a plurality of polygon bounded areas and a synthetic completeness of the plurality of polygon bounded areas based on cost layer data; and to generate based on the corridor buffer, a rasterized cost map including the plurality of completeness levels of the plurality of polygon bounded areas and the synthetic completeness of the plurality of polygon bounded areas.
7. (Original) The apparatus of claim 6, in which the at least one processor is further configured :to store, in the at least one memory, the rasterized cost map; and to communicate the rasterized cost map to a one dimensional (1-D) optimizer, the 1-D optimizer being configured to generate, based on the initial alignment, an optimized profile for an alignment.
9. (Original) The apparatus of claim 6, in which the at least one processor is further configured to generate the corridor buffer based on a plurality of points distributed at or near the initial alignment.
10. (Original) The apparatus of claim 6, in which the rasterized cost map comprises a two dimensional (2-D) set of values associated with a cost to traverse.
6. An apparatus for gap filling of geographic information service (“GIS”) data, the apparatus comprising: at least one memory; and at least one processor coupled to the at least one memory, the at least one processor configured: to determine a bounding region at or near an initial alignment; to determine the initial alignment within the bounding region; to generate a corridor buffer at or near the initial alignment and within the bounding region; to process cost layer data; to determine based on the cost layer data, incompleteness of a plurality of polygon-bounded areas; to determine, based on the cost layer data, partial completeness of the plurality of polygon-bounded areas; to determine, based on the cost layer data, completeness of the plurality of polygon-bounded areas; to generate, based on the incompleteness, the partial completeness, synthetic completeness, and the completeness of the plurality of polygon-based areas, the synthetic completeness of the plurality of polygon-bounded areas; and to store in the at least one memory, a rasterized cost map, the rasterized cost map including the completeness and the synthetic completeness of the plurality of polygon-bounded areas.
8. The apparatus of claim 6, in which the at least one processor is further configured to communicate, from the at least one memory, the rasterized cost map to a one dimensional (1-D) optimizer, the 1-D optimizer being configured to optimize a profile of the initial alignment based on the completeness and synthetic completeness of the plurality of polygon-bounded areas.
9. The apparatus of claim 6, in which the at least one processor is further configured to generate the corridor buffer is based on a point distribution.
10. The apparatus of claim 6, in which the rasterized cost map comprises a two dimensional (2-D) plurality of values associated with costs to traverse.
11. (Currently Amended) A non-transitory computer-readable medium having program code recorded thereon, the program code executed by at least one processor and comprising: program code to determine, at the at least one processor, a bounding region; program code to determine, at the at least one processor, an initial alignment within the bounding region; program code to generate, at the at least one processor, a corridor buffer associated with the initial alignment; program code to determine a plurality of completeness levels of a plurality of polygon bounded areas and a synthetic completeness of the plurality of polygon bounded areas based on cost layer data and program code to generate, at the at least one processor and based on the corridor buffer, a rasterized cost map including the plurality of completeness levels of the plurality of polygon bounded areas and the synthetic completeness of the plurality of polygon bounded areas.
12. (Original) The non-transitory computer-readable medium of claim 11, in which the program code further comprises: program code to store, in the at least one memory, the rasterized cost map; and program code to communicate the rasterized cost map to a one dimensional (1-D) optimizer, the 1-D optimizer being configured to generate, based on the initial alignment, an optimized profile for an alignment.
14. (Original) The non-transitory computer-readable medium of claim 11, in which the program code further comprises program code to generate the corridor buffer is based on a plurality of points distributed at or near the initial alignment.
15. (Original) The non-transitory computer-readable medium of claim 11, in which the rasterized cost map comprises a two dimensional (2-D) set of values associated with a cost to traverse.
11. A non-transitory computer-readable medium having program code recorded thereon, the program code executed by at least one processor and comprising: program code to determine a bounding region, the bounding region being at or near an initial alignment; program code to determine the initial alignment, the initial alignment being within the bounding region; program code to generate a corridor buffer, the corridor buffer being at or near the initial alignment, the corridor buffer further being within the bounding region; program code to process cost layer data; program code to determine based on the cost layer data, incompleteness of a plurality of polygon-bounded areas; program code to determine based on the cost layer data, partial completeness of the plurality of polygon-bounded areas; program code to determine based on the cost layer data, completeness of the plurality of polygon-bounded areas; program code to generate based on the incompleteness, the partial completeness, synthetic completeness, and the completeness of the plurality of polygon-based areas, the synthetic completeness of the plurality of polygon-bounded areas; and program code to store, at the at least one processor and in at least one memory, a rasterized cost map, the rasterized cost map including the completeness and the synthetic completeness of the plurality of polygon-bounded areas.
13. The non-transitory computer-readable medium of claim 11, in which the program code comprises program code to communicate, at the at least one processor and from the at least one memory, the rasterized cost map to a 1-D optimizer, the 1-D optimizer being configured to optimize a profile of the initial alignment based on the completeness and synthetic completeness of the plurality of polygon-bounded areas.
14. The non-transitory computer-readable medium of claim 11, in which the program code to generate the corridor buffer is based on a point distribution.
15. The non-transitory computer-readable medium of claim 11, in which the rasterized cost map comprises a two dimensional (2-D) plurality of values associated with costs to traverse.
16. (Currently Amended) An apparatus for optimizing a search space associated with a plurality of alignment curves, the apparatus comprising: means for determining, at least one processor, a bounding region; means for determining, at the at least one processor, an initial alignment within the bounding region; means for generating, at the at least one processor, a corridor buffer associated with the initial alignment; means for determining a plurality of completeness levels of a plurality of polygon bounded areas and a synthetic completeness of the plurality of polygon bounded areas based on cost layer data; and means for generating, at the at least one processor and based on the corridor buffer, a rasterized cost map including the plurality of completeness levels of the plurality of polygon bounded areas and the synthetic completeness of the plurality of polygon bounded areas.
17. (Original) The apparatus of claim 16, further comprising: means for storing, in at least one memory, the rasterized cost map; and means for communicating, at the at least one processor, the rasterized cost map to a one dimensional (1-D) optimizer, the 1-D optimizer being configured to generate, based on the initial alignment, an optimized profile for an alignment.
19. (Original) The apparatus of claim 16, further comprising means for generating the corridor buffer based on a plurality of points distributed at or near the initial alignment.
20. (Original) The apparatus of claim 16, in which the rasterized cost map comprises a two dimensional (2-D) set of values associated with a cost to traverse.
16. An apparatus for gap filling of geographic information service (“GIS”) data, comprising: means for determining, at at least one processor, a bounding region at or near an initial alignment; means for determining, at the at least one processor, the initial alignment within the bounding region; means for generating, at the at least one processor, a corridor buffer at or near the initial alignment and within the bounding region; means for processing, at the at least one processor, cost layer data; means for determining, at the at least one processor and based on the cost layer data, incompleteness of a plurality of polygon-bounded areas; means for determining, at the at least one processor and based on the cost layer data, partial completeness of the plurality of polygon-bounded areas; means for determining, at the at least one processor and based on the cost layer data, completeness of the plurality of polygon-bounded areas; means for generating, at the at least one processor and based on the incompleteness, the partial completeness, synthetic completeness, and the completeness of the plurality of polygon-based areas, the synthetic completeness of the plurality of polygon-bounded areas; and means for storing, at the at least one processor and in at least one memory, a rasterized cost map, the rasterized cost map including the completeness and the synthetic completeness of the plurality of polygon-bounded areas.
18. The apparatus of claim 16, further comprising means for communicating, at the at least one processor and from the at least one memory, the rasterized cost map to a one dimensional (1-D) optimizer, the 1-D optimizer being configured to optimize a profile of the initial alignment based on the completeness and synthetic completeness of the plurality of polygon-bounded areas.
19. The apparatus of claim 16, in which the means for generating the corridor buffer is based on a point distribution.
20. The apparatus of claim 16, in which the rasterized cost map comprises a two dimensional (2-D) plurality of values associated with costs to traverse.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claims 1, 6, 11 and 16 have been amended to recite “determining a plurality of completeness levels of a plurality of polygon bounded areas and a synthetic completeness of the plurality of polygon bounded areas based on cost layer data” and “including the plurality of completeness levels of the plurality of polygon bounded areas and the synthetic completeness of the plurality of polygon bounded areas.”
Applicant’s originally filed application fails to provide support for a plurality of completeness levels of the polygon bounded areas and synthetic completeness of the plurality of polygon bounded areas.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “completeness levels” and “synthetic completeness” in claims 1, 6, 11 and 16 is a relative term which renders the claim indefinite. The term “completeness” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The specification fails to disclose the metes and bounds for completeness levels or synthetic completeness.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shirabe, U.S. Patent Number 11,216,599 B2.
Regarding claim 1, Shirabe discloses a method for optimizing a search space associated with a plurality of alignment curves, the method comprising: determining, at least one processor, a bounding region (figures 2, 4 and 5, start neighborhood; end neighborhood; col. 3, lines 19-20, obtain a grid of cells representing the target area, which Examiner interprets as a bounding region); determining, at the at least one processor, an initial alignment within the bounding region (figure 4; col. 3, lines 23-25, calculate translation costs caused by straight-ling translations of an optimized arrangement of cells through the grid; Figure 4 show alignment with the grid of cells); generating, at the at least one processor, a corridor buffer associated with the initial alignment (figure 4; col. 3, lines 31-33, design the corridor as a subset of the straight-line translations sequenced to connect a start zone of cells in the grid to an end zone of cells in the grid);
determining a plurality of completeness levels of a plurality of polygon bounded areas and a synthetic completeness of the plurality of polygon bounded areas based on cost layer data (col. 6, lines 58-67, start and end neighborhoods were considered uniquely defined; however, the start neighborhood’s location may not be completely specified, but only known to be, included in a start zone of cells, which Examiner interprets as a completeness level, i.e. neighborhoods location not completely specified);
and generating, at the at least one processor and based on the corridor buffer, a rasterized cost map including the plurality of completeness levels of the plurality of polygon bounded areas and the synthetic completeness of the plurality of polygon bounded areas (col. 8, lines 19- 27, “generate a cost distance map”; generating a raster layer on which each cell is assigned the minimum of the costs of those least-cost corridors; col. 8, lines 3-7, searching for a cost corridor from a terminus in the from-one set to a terminus in the to-one set whose cost is less than or equal to the cost of any corridor from any terminus in the from-on set to any terminus in the to-one set).
Regarding claim 2, Shirabe discloses further comprising: storing, in at least one memory, the rasterized cost map; and communicating, at the at least one processor, the rasterized cost map to a one dimensional (1-D) optimizer, the 1-D optimizer being configured to generate, based on the initial alignment, an optimized profile for an alignment (col. 1, lines 26-30, GISs, computer-aided designs (CAD) systems, raster graphic editors, and image processors, etc., are configured to store, process and/or present raster data; col. 8, lines 38-45, straight -line translations of an optimized arrangement of cells through the grid; optimized arrangement is characterized by a reduced variation of translation).
Regarding claim 3, Shirabe discloses in which generating the corridor buffer is based on a plurality of extended radii (col. 2, lines 28-34, corridor-like feature, but with variable widths; the width of the corridor-like feature tends to increase with the threshold; Figure 3, widths; figure 4).
Regarding claim 4, Shirabe discloses in which generating the corridor buffer is based on a plurality of points distributed at or near the initial alignment ; FI(col. 6, lines 4-9, corridor results from translating a neighborhood having the predefined cell arrangement, from a start neighborhood; (i.e., the corridor’s terminus points both also have the predetermined cell arrangement).
Regarding claim 5, Shirabe discloses in which the rasterized cost map comprises a two dimensional (2-D) set of values associated with a cost to traverse (col. 6, lines 12-14, translation cost associated with a straight-line translation is determined using locations and values of cells swept during the translation; col. 6, lines 30-32, values of the newly swept cells may be added to obtain the translation cost).
Regarding claims 6-10, they are rejected based upon similar rational as above claims 1-5. Shirabe further discloses an apparatus for optimizing a search space associated with a plurality of alignment curves, the apparatus comprising: at least one memory; and at least one processor coupled to the at least one memory (figure 1)
Regarding claims 11-15, they are rejected based upon similar rational as above. Shirabe further discloses a non-transitory computer-readable medium having program code recorded thereon, the program code executed by at least one processor and comprising: program code (col. 3, lines 37-40, non-transitory computer-readable recording medium storing executable codes which, when executed by a computer, make the computer perform a method).
Regarding claims 16-20, they are rejected based upon similar rational as above. Shirabe further discloses an apparatus for optimizing a search space associated with a plurality of alignment curves (col. 3, lines 8-15).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
1. (Currently Amended) A method for optimizing a search space associated with a plurality of alignment curves, the method comprising: determining, at least one processor, a bounding region; determining, at the at least one processor, an initial alignment within the bounding region; generating, at the at least one processor, a corridor buffer associated with the initial alignment; determining a plurality of completeness levels of a plurality of polygon bounded areas and a synthetic completeness of the plurality of polygon bounded areas based on cost layer data; and generating, at the at least one processor and based on the corridor buffer, a rasterized cost map including the plurality of completeness levels of the plurality of polygon bounded areas and the synthetic completeness of the plurality of polygon bounded areas.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Motilewa Good-Johnson whose telephone number is (571)272-7658. The examiner can normally be reached Monday - Friday 6am-2:30pm.
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MOTILEWA . GOOD JOHNSON
Primary Examiner
Art Unit 2616
/MOTILEWA GOOD-JOHNSON/Primary Examiner, Art Unit 2619
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