DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Group I and Device Species A, claims 1, 2, 3, 4 and 6 in the reply filed on 07/27/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4 and 6 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Nakamata JP2021150466A.
PNG
media_image1.png
390
720
media_image1.png
Greyscale
Figure 1
Nakamata JP2021150466A
Regarding claim 1, Nakamata Fig. 1 and [0001]-[0083] disclose a semiconductor device comprising:
a semiconductor module [0021] including a semiconductor chip 11;
a cooler 13 [0021] configured to cool the semiconductor module;
a thermal conductive layer 12(122) [0023] interposed between the semiconductor module and the cooler; and
a protective film 19 [0021]-[0039] covering:
a boundary between the semiconductor module and the thermal conductive layer; and
a boundary between the cooler and the thermal conductive layer,
wherein the protective film 19 has a water absorption rate ([0028] a physical property of polyamide, polyimide or resin containing a polyamide-imide) that is less than a water absorption rate of the thermal conductive layer 12(122) ([0023] a physical property of a material having excellent electrical insulation and thermal conductivity can be used. Examples of the material of the insulating substrate 122 include Al2O3, AlN, SiN and the like.) . See, for example, MPEP 2112.01.I.
Regarding claim 2, Nakamata Fig. 1 and [0001]-[0083] disclose a semiconductor device comprising:
a semiconductor module [0021] including a semiconductor chip 11;
a cooler 13 [0021] configured to cool the semiconductor module;
a thermal conductive layer 12(122) [0023] interposed between the semiconductor module and the cooler; and
a protective film 19 [0021]-[0039] covering:
a boundary between the semiconductor module and the thermal conductive layer; and
a boundary between the cooler and the thermal conductive layer,
wherein the protective film 19 [0028] has a thickness (e.g. 1-15 µm) that is less than a distance between the semiconductor module 11 and the cooler 13 (annotated above). See, for example, MPEP 2125.I
Regarding claim 3, Nakamata Fig. 1 and [0001]-[0083] teach the semiconductor device according to claim 2, wherein the protective film 19 has a water absorption rate ([0028] a physical property of polyamide, polyimide or resin containing a polyamide-imide) that is less than a water absorption rate of the thermal conductive layer 12(122) ([0023] a physical property of a material having excellent electrical insulation and thermal conductivity can be used. Examples of the material of the insulating substrate 122 include Al2O3, AlN, SiN and the like.) . See, for example, MPEP 2112.01.I.
Regarding claim 4, Nakamata Fig. 1 (annotated above) and [0001]-[0083] disclose the semiconductor device according to claim 1, wherein the thermal conductive layer 122 includes an outer peripheral portion disposed outside an outer peripheral edge of the semiconductor module 11 in plan view, and wherein the protective film 19 further covers the outer peripheral portion of the thermal conductive layer 122.
Regarding claim 6, Nakamata Fig. 1 and [0001]-[0083] disclose the semiconductor device according to claim 1, wherein the protective film 19 [0028] includes a urethane resin material, a fluoropolymer material, or a polyimide resin material.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SONYA D MCCALL-SHEPARD whose telephone number is (571)272-9801. The examiner can normally be reached M-F: 8:30 AM-5:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado can be reached at (571)272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Sonya McCall-Shepard/ Primary Examiner, Art Unit 2898
Prosecution Insights