Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1, 2, 4-13, 15-18, 20-23 are presented for Examination.
DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 4-13, 15-18, 20, 21 are rejected under 35 U.S.C. 103 as being unpatentable over Bailey et al. (U.S Patent Application Publication 20150177814; hereinafter “ Bailey”; (Reference cited as prior art in previous office action) in view of Gaikwad et al. (U.S Patent Application Publication 2021/0357016; hereinafter “Gaikwad”; (Reference cited as prior art in previous office action) further in view of McCarthy et al. (U.S Patent Application Publication 2010/0205469 ;hereinafter “McCarthy”; (Reference cited as prior art in previous office action)
1
Regarding Claims 1, 12, 17, Bailey discloses , A method for managing power consumption by data processing systems, the method :comprising:
obtaining telemetry data based on power consumption by a baseboard management controller of each data processing system of a portion of the data processing systems positioned in a rack [ “ IHS 100 comprises rack casing 105, “, 0033; “each block 160 has an associated block controller (BC) 162. Cooling subsystem 140 includes a plurality of fan modules of which a first fan module 142 and a second fan module 145 are show.. Within each block 160 is at least one, and likely a plurality of processing nodes 164…“, 0036; “BCs 162A-D are also communicatively connected to temperature sensors 146. .. Each of BCs 162A-D contains a field programmable gate array (FPGA) 260 .. “, 0042; “Within each of blocks 160A-D are at least one, and likely a plurality of processing/functional nodes, such as nodes 164A-D, which are generally referred to herein as processing nodes. Each processing node 164A-D contains node power distribution subsystem(s) 250A-D that receives and controls power distributed to nodes 164A-D.. Each of the node power distribution subsystems 250A-D contains associated board controller(s) 280A-D that control the operations of a respective node power distribution subsystem(s) 250A-D. Board controller(s) 280A-D can track and record power usage data and settings 281 for each of the processing nodes 164A-D.”; “, 0043; “Board controller 280A is communicatively connected to BC 162A by an I2C bus 218 and by a serial bus 214 that are connected via node power distribution board 504…”, 0055; ( i.e. the block controllers of each block are connected to the hardware components such as the temperature sensors, cooling fan, board controllers of the nodes in the respective blocks . The Block controller corresponds to the baseboard management controller)], the baseboard management controller being operably connected to hardware components of its corresponding data processing system via sideband channels that are separate from in-band channels, [ 0042-0043; “..Board controller 280A is communicatively connected to BC 162A by an I2C bus 218 and by a serial bus 214 that are connected via node power distribution board 504..”, 0055; Fig.2, 5; (i.e, the board controller of each node is connected to the block controller of the respective block. Further the block controllers obtains power usage data , temperature and other parameters via the sideband channels I2C bus, serial bus that is external or different from the in-band channels within which the processor , memory , storage devices are coupled)], the power consumption being-during a first period of time and monitored by the baseboard management controller via the sideband channels [ “rack-level management controller 110”, 0056; “The initialization of MC 110 includes microcontroller 112 loading RMC firmware 115 and loading at least one of the control parameters 122 .. The block controllers 162A-D transmit the power-usage data and settings 281 from the block controllers 162A-D to MC 110 (step 608).”, 0057; “MC 110 receives power usage data and settings 281 for each of the processing nodes 164A-D (step 610). MC 110 generates a power consumption profile or history table 422 for each individual node 164A-D during the pre-established most recent time periods T1-T5, and MC 110 stores the power consumption history table 422 in MC storage 120 (step 612).”, 0058;” Infrastructure manager (IM) 130 includes cooling subsystem interface 132, Ethernet switch 134, power distribution interface 136 and network “interface 138. Network interface 138 enables IHS 100 and specifically the components within IHS 100 to connect to and communicate with or via an external network 180.”, 0035; “Switch 134 enables MC 110 to communicate with block controllers 162 via a network of Ethernet cables 268…”, 0037; 0047;Fig.1, 2(i.e. power usage data monitored by the block controllers via the sideband channels are transmitted to the MC via an external network for various time periods) ].
obtaining, using a rack level power limit for the rack, a respective power cap for each data processing system of the portion of the data processing systems to obtain power caps [ “.. At step 614, MC 110 identifies a total available system power 408 of the IHS 100. MC 110 determines a system power cap 404 for the IHS 100 based on the power consumption history table 422 and the total available system power 408 (step 615). MC 110 determines a current power budget 412 for each of the processing nodes 164 based on an analysis of at least one of the power consumption history 422, the initial power budget 406, the current power consumption 402, the system power cap 404, and the total available system power 408 (step 616). MC 110 triggers the power subsystem 150 of the IHS 100 to regulate an amount of power budgeted and supplied to each of the processing nodes 164 of the IHS 100 based on the power consumption profiles 422 and the system power cap 404 (step 618).”, 0058; ( i.e obtaining power caps of the nodes in each of the blocks ; current power budget of the node corresponds to the power cap of each node and system power cap corresponds to the rack power limit)];
Bailey also teaches,
a processor[“MC 110 includes a microcontroller 112 (also generally referred to as a processor) which is coupled via an internal bus to memory 114”, 0033; Fig.1]; and
a memory coupled to the processor to store instructions, which when executed by the processor, cause the processor to perform operations for managing power consumption by data processing systems[0033; Fig.1] (as stated in claim 17).
However Bailey does not expressly disclose performing, based on the telemetry data, a power consumption forecasting analysis to obtain a respective power consumption forecast for each data processing system of the portion of the data processing systems for a second future period of time to obtain future power consumption forecasts; obtaining, using the future power consumption forecasts, an optimization model, a respective power cap for each data processing system of the portion of the data processing systems to obtain power caps; updating operation of each data processing system of the portion of the data processing systems based on a corresponding power cap of the power caps to limit aggregate power consumption of the portion of the data processing systems to be within the rack level power limit while computer implemented services are provided.
In the same field of endeavor ( e.g. a dynamic power capping system operating on a processor and coupled to the plurality of data center nodes, wherein the processor is configured by the dynamic power capping system to implement one or more algorithms that cause the processor to determine a power requirement for each of the plurality of data center nodes and to implement a power setting at each of the plurality of data center nodes that corresponds to the power requirement for the data center node), Gaikwad teaches ,
performing, based on the telemetry data, a power consumption forecasting analysis to obtain a respective power consumption forecast for each data processing system of the portion of the data processing systems for a second future period of time to obtain future power consumption forecasts[“..The system and algorithm of the present disclosure predicts the processor load on the cluster systems, identifies the relative power consumption and derives a dynamic approach to accurately mapping power capping accordingly…”, 0014-0015; “Dynamic power capping system 102 can be implemented as one or more algorithms that are installed on a processor and which cause the processor to perform the functions of monitoring data center nodes 104A-104N and their associated system components and dynamically adjusting the individual power caps for each node based on individual and system power levels. In one example embodiment, dynamic power capping system 102 can monitor power consumption by each of data center nodes 104A-104N… “, 0037; “In regards to predicting n-step ahead cluster node statistics, after the system information is collected as a historical data set, such as in a Probabilistic Weighted Fuzzy Time Series (PWFTS), over a period for each component (such as the CPU, memory, disk I/O and network system or other suitable system components), the next “n” steps ahead are predicted, where “n” can be selected based chassis on optimization, provided by a user or otherwise suitable provided. An example of a table of PWFTS multivariate time series is shown below:”, 0016; “..computed future step data is shown below:”, 0017; Table 2; ( i.e predicting/ forecasting power consumption based on the current usage / workload of the various components of a node )]
obtaining, using the future power consumption forecasts, an optimization model, a respective power cap for each data processing system of the portion of the data processing systems to obtain power caps [0016; The deviation Δ between the actual resource utilization R.sub.a and the predicted value R.sub.p can be monitored after every nδ time units and compared with a predefined tolerance ε, ..”, 0030; “An example of pseudocode for an adaptive threshold mechanism with continuous adjustment and accuracy improvement is provided below, but other suitable algorithms can also or alternatively be used. “, 0031; Table 5, 6; ( i.e. implementing an optimization algorithm/ model) ; “..each data center node 104A-104N can be provided with dynamic power cap levels that optimize power consumption, and that provide other noted benefits”, 0044; “ the cluster device load predictions can be generated by a processor that uses a prior cluster device loads at preceding time steps and which generates a prediction based on a trend analysis, ..The algorithm then proceeds to 206.”, 0047; “FIG. 2 is a diagram of an algorithm 200 for providing a dynamic adaptive power capping setting workflow..”, 0045; “ At 206, threshold values for power caps are identified. In one example embodiment, the threshold values for power caps can be identified by a processor that processes a series of power usage data values to identify a power cap that will not be exceeded by a predetermined number of “spikes,” or in other suitable manners. The algorithm then proceeds to 208”, 0048; ( i.e. obtaining power caps for each node of the portion of the cluster of nodes by using an optimization algorithm and forecasting analysis)].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bailey with Gaikwad . Gaikwad’s teaching of a dynamic power capping system by predictive optimization of power needs across virtualized environments of different data processing nodes will substantially improve Bailey’s system to automatically set the power capping value according to a predicted “future” load and “also prevent excessive revision of power capping values, by removing power usage data values that exceed a predetermined amount, which may be referred to as single point spikes or “spikes.” .. for continuous improvement and accuracy based autonomous setting of power capping values, to ensure that devices pull the optimal required power at any given point in time”, [para 0013].
However, Bailey, Gaikwad does not expressly disclose updating operation of each data processing system of the portion of the data processing systems based on a corresponding power cap of the power caps to limit aggregate power consumption of the portion of the data processing systems to be within the rack level power limit while computer implemented services are provided.
In the same field of endeavor (e.g. control system architecture operates at the group level and at the server level to budget and manage power consumption of the group and each server within a power budget by implementing a server capper and an efficiency controller to maintain the power consumption of the server within a specified level),
McCarthy teaches ,
updating operation of each data processing system of the portion of the data processing systems based on a corresponding power cap of the power caps to limit aggregate power consumption of the portion of the data processing systems to be within the rack level power limit while computer implemented services are provided [0011; “ The group capper 102 maintains the overall power of the group, including the unmanageable components 110 and the manageable servers 104, within the mgtCap 120 by a feedback mechanism. .. Each manageable server 104a-n is assigned a portion of the mgtCap 120 based on its power consumption, srvPow 126a-n. The assigned portions are the srvCap 122a-n and are the values that make up the power budget 130. The power budget 130 varies as power consumptions srvPow 126a-n of the manageable servers 104a-n varies. A server with a higher consumption, for example, may be assigned a greater portion of the mgtCap 120”, 0013; “ The server capper 221 receives the server power cap srvCap 122 from the power budget for the group from the group capper 102. The server capper 221 compares the srvCap 122 and a metric indicating server power consumption (srvPow 226) received from the manageable server component 222 in determining a variable (srvVar 204) that may be used to tune the manageable server component 222 to a power state. The srvCap 223 is a hard cap and should not be exceeded. The server capper 221 receives the measured power consumption of the server 200, shown as srvPow 226. If srvPow 226 is close to or exceeds srvCap 223, the server capper 221 reduces the power state of the manageable server component 222. For example, the server capper 221 reduces the frequency of the CPU, so the CPU consumes less power. In this example, the frequency of the CPU is the srvVar 204”0023; 0031;( i.e updating operation of the servers by reducing the frequency based on their respective power cap, not to exceed the aggregate power consumption of the portion of the management servers to be within the group power limit while determining the actual demand / services provided by the respective servers.)].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bailey in view of Gaikwad with McCarthy. McCarthy’s teaching of managing power consumption of the each server in a group within a power budget will substantially improve Bailey in view of Gaikwad’s system to dynamically adjust the power consumption of the nodes by adaptively reducing the frequency or the power state of the nodes based on the workload demand in order to maintain the power consumption within the server / group power limit.
Regarding claims 2, 13, 18, Bailey discloses, wherein the rack houses enclosures enclosure in which the portion of the data processing systems are positioned. [ 0032-0033; Fig.1].
Regarding claims 4, 15, 20, Gaikwad teaches,
ingesting, by a forecasting inference model, the telemetry data to perform a forecasting analysis of power consumption by each data processing system of the portion of the data processing systems to obtain the future power consumption forecasts [0015-0017; Table 1, 2]
Regarding claims 5, 16 Gaikwad teaches,
wherein a future power consumption forecast of the future power consumption forecasts comprises power consumption levels for a series of future times[ 0014-0016; Table 1] .
Regarding claim 6, Bailey discloses obtaining, using a rack level power limit for the rack, a respective power cap for each data processing system[0058, Fig.6]
obtaining, the power caps to limit the aggregate power consumption of the portion of the data processing systems to be within the rack level power limit [0058; “..MC 110 determines if the required power to operate all of the processing nodes at current power consumption levels is less than a system power cap threshold 424 (decision step 806). In response to determining that the current power consumption by all of the processing nodes 164 is less than the system power cap threshold 424, MC 110 increases the current power budget 412 for the identified processing nodes to a new power budget (step 808) and triggers power subsystem 150 to provide a corresponding increase in the power budget to the identified processing nodes and re-adjusts the power budget allocation across the IHS 100 based on the new power budget (step 810). “, 0060; Fig.8, 10].
Gaikwad, teaches, ingesting, by the optimization model, the future power consumption forecasts[0016-0017; Table 2] ;
performing, using the optimization model, the future power consumption forecasts, an optimization of the respective power cap for each data processing system of the portion of the data processing systems[0030;0037; 0047-0048; Table 5]; and
obtaining, from the optimization model, the power caps [ 0049-0051; Fig.2]
Regarding claim 7, Bailey discloses , setting the power caps to meet a goal for operation of the data processing systems based on the rack level power limit [0058; Fig.6, 8]
Gaikwad teaches wherein the optimization model is based on an optimization algorithm for setting the power caps [ 0016; 0030-0031; 0044-0046; Table 2, 5)
Regarding claim 8, Gaikwad teaches wherein the optimization algorithm is global optimization and the goal is defined using an objective function solved by the global optimization [0037; 0040].
Regarding claim 9, Bailey teaches consumption of power by the data processing systems at a level specified by the rack level power limit [“ MC 110 triggers the power subsystem 150 of the IHS 100 to regulate an amount of power budgeted and supplied to each of the processing nodes 164 of the IHS 100 based on the power consumption profiles 422 and the system power cap 404 (step 618). “, 0058; Fig.6]
Gaikwad teaches the objective function incentivizes consumption of power by the data processing systems[“..dynamically adjusting the individual power caps for each node based on individual and system power levels ..”, 0037; Fig.2].
Regarding Claim 10, Bailey discloses, wherein the rack level power limit is a quantity of power that can be supplied by power distribution units for the rack reduced by a factor of safety [0065; 0067; Fig.11] .
Regarding Claim 11, Bailey discloses ingesting, by a baseboard management controller, a power cap of the power caps to limit the aggregate power consumption of the portion of the data processing systems to be within the rack level power limit [“rack-level management controller 110”, 0056; 0060; Fig.8, 10] and
updating, by the baseboard management controller, the power consumption of the portion of the data processing systems based on power consumption specified by the power cap of the power caps[0059-0061; Fig.7, 8].
Regarding claim 21, Bailey discloses wherein the hardware components in each of the data processing systems of the portion of the data processing systems positioned in the rack comprise a first processor [ “Processor(s) 510”, Fig.5]and the baseboard management controller comprises a second processor that is separate from operates independently from the first processor[“Each of BCs 162A-D contains a field programmable gate array (FPGA) 260”,0042; Fig.2] .
Claims 22, 23 are rejected under 35 U.S.C. 103 as being unpatentable over Bailey in view of Gaikwad further in view of McCarthy as applied to claim 1 further in view of Itkin et al. (U.S Patent Application Publication 2017/0242819 ;hereinafter “Itkin”)
Regarding Claim 22, Bailey, Gaikwad, McCarthy teaches the limitations outlined in claim 1. However Bailey, Gaikwad, McCarthy does not expressly disclose wherein each of the data processing systems of the portion of the data processing systems positioned in the rack comprises a single network module that separately advertises network endpoints for the baseboard management controller and the hardware components such that first communications meant for the hardware components never flow through the baseboard management controller and second communications meant for the baseboard management controller never flow through the hardware components.
In the same field of endeavor (e.g. remote management of computers over a network), Itkin teaches ,
wherein each of the data processing systems of the portion of the data processing systems positioned in the rack comprises a single network module[“Servers 26 are host computers, each of which comprises a host complex 30 and is connected to an InfiniBand network by a host channel adapter (HCA) 34, which is the term used to denote a NIC in the InfiniBand environment. Servers 26 also comprise a BMC 36, which is connected to HCA 34 by a sideband channel. Management server 22 communicates with BMC 36 via this sideband channel, as described further hereinbelow, in order to perform management functions on server 26 independently of the host CPU, possibly including waking host complex 30 from sleep states.”, 0020; “ HCA 34 comprises a network interface 50, which connects to InfiniBand network 32, and a host interface 54, connecting via a peripheral component bus 56, such as a PCI Express® (PCIe®) bus, to host complex 30. The host complex comprises a central processing unit (CPU) 58 and system memory 60, as well as other components that are known in the art. Packet processing logic 52 in HCA normally receives and processes incoming packets on multiple QPs from other servers 26 on network 32, and passes the packet payloads to memory 60 for processing by processes running on CPU 58,..”, 0026; that separately advertises network endpoints for the baseboard management controller and the hardware components [0026; 0031-0032] such that first communications meant for the hardware components never flow through the baseboard management controller and second communications meant for the baseboard management controller never flow through the hardware components[ “ The host complex comprises a central processing unit (CPU) 58 and system memory 60, as well as other components that are known in the art. Packet processing logic 52 in HCA normally receives and processes incoming packets on multiple QPs from other servers 26 on network 32, and passes the packet payloads to memory 60 for processing by processes running on CPU 58, ..”, 0026; ( i.e. normal communications flowing only through hardware components); “... The decapsulation logic decapsulates and passes the management packets via a sideband connection 70 to BMC 36 ..”, 0027; “ Server 26 also comprises a power supply 62, which feeds a main power rail 64 to supply operating power to host complex 30 (including CPU 58 and system memory 60), and an auxiliary power rail 66, which supplies auxiliary power to other elements of server 26 even when the host complex is powered down. Auxiliary power rail 66 supplies power, inter alia, to BMC 36 and HCA 34. As a result, even when CPU 58 is powered down, in a sleep state for example, HCA 34 is able to receive, decapsulate, and pass management packets via sideband connection 70 to BMC 36. …0028; ( i.e. communications via BMC when the host is in sleep mode)]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Bailey in view of Gaikwad in view of McCarthy with Itkin. Itkin’s teaching of remotely managing the communication of a computing device and processing the data packets received form the management computer via a sideband connection that is independent of the host interface will substantially improve Bailey in view of Gaikwad in view of McCarthy’s system to diagnose and isolate faults and perform communications with the management server even when the host CPU is inoperative.
Regarding Claim 23, Itkin teaches , wherein, in each of the data processing systems of the portion of the data processing systems positioned in the rack, the baseboard management controller and a single network module are on separate power domains from the hardware components that the baseboard management controller and the single network module are operable while hardware components are inoperable[ 0028; Fig.2].
Response to Arguments
Applicant’s arguments with respect to amended limitations for claim(s) 1, 12, 17 have been considered but are moot as set forth in the above rejection
New claims 21, 22, 23 are rejected as set forth in this rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lambert et al., U.S Patent Application Publication 2020/0341929, teaches A multi-endpoint device sideband communication system includes a board including a board sideband communication subsystem coupled to a connector on the board and more particularly to exchanging sideband communications with multiple endpoint devices in an information handling system.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAYATHRI SAMPATH whose telephone number is (571)272-5489. The examiner can normally be reached on Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jaweed Abbaszadeh can be reached on 5712701640. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/GAYATHRI SAMPATH/ Examiner, Art Unit 2176
/JAWEED A ABBASZADEH/ Supervisory Patent Examiner, Art Unit 2176
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