DETAILED ACTION
Claims 1, 5-6, 8 and 10-12 are amended. Claims 2, 7 and 13-22 are cancelled. Claims 1, 3-6, 8-12 and 23-24 are pending.
Claim Objections
Claims 1, 5-6 and 11-12 are objected to because of the following informalities:
As per claim 1, the limitation “a sixth transistor comprising a first terminal directly coupled to the first terminal of the second transistor; and a second terminal directly coupled to the first terminal of the fourth transistor” should be “a sixth transistor comprising a first terminal directly coupled to the first terminal of the second transistor[[;]], and a second terminal directly coupled to the first terminal of the fourth transistor”.
As per claim 5, the limitation “a fifth transistor comprising a first terminal coupled to the second terminal of the sense capacitor; and a second terminal coupled to the control terminal of the first transistor” should be “a fifth transistor comprising a first terminal coupled to the second terminal of the sense capacitor[[;]], and a second terminal coupled to the control terminal of the first transistor”.
As per claim 6, the limitation “a fifth transistor comprising a first terminal; and a second terminal” should be “a fifth transistor comprising a first terminal[[;]], and a second terminal”.
As per claim 11, the limitation “a sixth transistor comprising a first terminal directly coupled to the supply terminal; and a second terminal directly coupled to the first terminal of the first transistor” should be “a sixth transistor comprising a first terminal directly coupled to the supply terminal[[;]], and a second terminal directly coupled to the first terminal of the first transistor”.
As per claim 12, the limitation “in a initial mode” should be “in an initial mode”
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 6 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Sang (US 20230097941) in view of Xiao (US 20160189610).
As per claim 1, Sang discloses a pixel circuit (Fig. 1; [0068]), the pixel circuit comprising:
a sample circuit (#T3) coupled to a data line (#21; [0074]);
a first transistor (#DT) comprising a control terminal coupled to the sample circuit (#T3), a first terminal coupled to a supply terminal (#VDD), and a second terminal ([0071]);
a second transistor (#T2) comprising a first terminal coupled to the control terminal of the first transistor (#DT), and a second terminal coupled to the second terminal of the first transistor (#DT);
a third transistor (#T4) comprising a first terminal coupled to the second terminal of the first transistor (#DT), and a second terminal ([0077]);
a light-emitting diode (LED) (#EL) comprising a first terminal coupled to the second terminal of the third transistor (#T4), and a second terminal coupled to a ground terminal (#VSS); and
a fourth transistor (#T5) comprising a first terminal coupled to the first terminal of the light-emitting diode (#EL), and a second terminal coupled to a reset terminal ([0078]; [0082]-[0083]); and
wherein in an initial mode, the sample circuit (#T3) is enabled and the fourth transistor (#T5) is turned on ([0082]).
However, Sang does not teach a sixth transistor comprising a first terminal directly coupled to the first terminal of the second transistor; and a second terminal directly coupled to the first terminal of the fourth transistor.
Xiao teaches a sixth transistor (Fig. 3, #T7) comprising a first terminal directly coupled to the first terminal of the second transistor (#T4); and a second terminal directly coupled to the first terminal of the fourth transistor (#T6; [0130]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have include the sixth transistor disclosed by Xiao to the pixel circuit or Sang so as to provide a second reset transistor.
As per claim 3, Sang in view of Xiao discloses the pixel circuit of Claim 1, wherein the pixel circuit is switched to a compensation mode after the initial mode (Sang: Figs. 2B and 3B; [0080]-[0081]; [0084]-[0085]).
As per claim 6, Sang in view of Xiao discloses the pixel circuit of Claim 1, wherein the sample circuit comprises:
a fifth transistor (Sang: Fig. 1, #T1) comprising a first terminal; and a second terminal (Sang: [0074]); and
a sense capacitor (Sang: #Cst) comprising a first terminal coupled to the second terminal of the fifth transistor (Sang: #T1), and a second terminal coupled to the control terminal of the first transistor (Sang: #DT).
As per claim 9, Sang in view of Xiao discloses the pixel circuit of Claim 1, further comprising:
a hold capacitor (Sang: Fig. 4A, #Cst) comprising a first terminal coupled to the supply terminal (Sang: #VDD), and a second terminal coupled to the control terminal of the first transistor (Sang: #DT).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Sang in view of Xiao in view of Kawabe (US 20100295758).
As per claim 5, Sang in view of Xiao discloses the pixel circuit of Claim 1.
However, Sang in view of Xiao do not teach the sample circuit comprises:
a sense capacitor comprising a first terminal, and a second terminal; and
a fifth transistor comprising a first terminal coupled to the second terminal of the sense capacitor; and a second terminal coupled to the control terminal of the first transistor.
Kawabe teaches the sample circuit comprises:
a sense capacitor (Fig. 1, #6) comprising a first terminal, and a second terminal ([0021]); and
a fifth transistor (#3) comprising a first terminal coupled to the second terminal of the sense capacitor (#6); and a second terminal coupled to the control terminal of the first transistor (#2; [0021]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the sense capacitor disclosed by Kawabe to the pixel circuit of Sang in view of Xiao so as to easily perform threshold value compensation for the driving transistor (Kawabe: [0010]).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Sang in view of Kim (US 20160005346).
As per claim 11, Sang discloses a pixel circuit (Fig. 1; [0068]), the pixel circuit comprising:
a sample circuit (#T3) coupled to a data line (#21; [0074]);
a first transistor (#DT) comprising a control terminal coupled to the sample circuit (#T3), a first terminal coupled to a supply terminal (#VDD), and a second terminal ([0071]);
a second transistor (#T2) comprising a first terminal coupled to the control terminal of the first transistor (#DT), and a second terminal coupled to the second terminal of the first transistor (#DT);
a third transistor (#T4) comprising a first terminal coupled to the second terminal of the first transistor (#DT), and a second terminal ([0077]);
a light-emitting diode (LED) (#EL) comprising a first terminal coupled to the second terminal of the third transistor (#T4), and a second terminal coupled to a ground terminal (#VSS); and
a fourth transistor (#T5) comprising a first terminal coupled to the first terminal of the light-emitting diode (#EL), and a second terminal coupled to a reset terminal ([0078]; [0082]-[0083]).
However, Sang does not teach a sixth transistor comprising a first terminal directly coupled to the supply terminal; and a second terminal directly coupled to the first terminal of the first transistor.
Kim teaches a sixth transistor (Fig. 2, #M2) comprising a first terminal directly coupled to the supply terminal (#VDD); and a second terminal directly coupled to the first terminal of the first transistor (#M2; [0075]-[0076]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the sixth transistor disclosed by Kim to the pixel circuit of Sang so as to control the first power supply voltage to be transmitted to the driving transistor based at least in part on the light-emitting signal.
Allowable Subject Matter
Claims 4, 8, 10 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of a pixel circuit comprising a sample circuit, a first transistor, a second transistor, a third transistor, a fourth transistor and a light-emitting diode (LED) does not teach or fairly suggest in the compensation mode, the sample circuit is enabled, the fourth transistor is turned on, the second transistor is turned on, and the third transistor is turned off; in a program mode, the sample circuit is enabled, the fourth transistor is turned on, the second transistor is turned off, and the third transistor is turned off; and in an emission mode, the sample circuit is disabled, the fourth transistor is turned off, the second transistor is turned off, and the third transistor is turned on, in the initial mode, the sixth transistor is turned on, the second transistor is turned off, and the third transistor is turned off; and in the compensation mode, a program mode and an emission mode, the sixth transistor is turned off, wherein the hold capacitor comprises a seventh transistor comprising a control terminal coupled to the control terminal of the first transistor, a first terminal coupled to the supply terminal, and a second terminal coupled to the supply terminal, in a initial mode, the sample circuit is enabled, the fourth transistor is turned on, the sixth transistor is turned off, the second transistor is turned on, and the third transistor is turned on; and in a compensation mode, a program mode and an emission mode, the sixth transistor is turned on.
Claims 23 and 24 are allowed.
The following is an examiner’s statement of reasons for allowance: The prior art of a pixel circuit, the pixel circuit comprising a sample circuit; a first transistor comprising a control terminal coupled to the sample circuit, a first terminal coupled to a supply terminal, and a second terminal; a second transistor comprising a first terminal coupled to the control terminal of the first transistor, and a second terminal coupled to the second terminal of the first transistor; a third transistor comprising a first terminal coupled to the second terminal of the first transistor, and a second terminal; a light-emitting diode (LED) comprising a first terminal coupled to the second terminal of the third transistor, and a second terminal coupled to a ground terminal; and a fourth transistor comprising a first terminal coupled to the first terminal of the light-emitting diode and a second terminal, and a second terminal coupled to a reset terminal; wherein the pixel circuit is switched to a compensation mode after an initial mode does not teach or fairly suggest in the compensation mode, the sample circuit is enabled, the fourth transistor is turned on, the second transistor is turned on, and the third transistor is turned off, in a program mode, the sample circuit is enabled, the fourth transistor is turned on, the second transistor is turned off, and the third transistor is turned off, and in an emission mode, the sample circuit is disabled, the fourth transistor is turned off, the second transistor is turned off, and the third transistor is turned on.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Response to Arguments
Applicant’s arguments with respect to claims 1 and 11 have been considered but are moot because of the new grounds of rejection as presented above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Lam whose telephone number is (571)272-8044. The examiner can normally be reached 1pm-9pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached on 571 272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Nelson Lam/Examiner, Art Unit 2627
/KE XIAO/Supervisory Patent Examiner, Art Unit 2627
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