DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 5-7, 9, 13, 14, 18 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by [Mollenkopf et al (Fig. 1); 6,377,786].
Regarding claims 1, 18 and 20, Mollenkopf et al discloses an amplifier circuit comprising a forward signal path (204A, 206A, 208) comprising a first digital modulator (204A) configured to generate the modulated signal (output signal of 204A) based on the digital input signal (DIGITAL WAVEFORM) as modified by a digital correction signal (output signal of 230), a feedforward path (204A, 210A, 218, 220, 222) comprising a second digital modulator (220) configured to generate a feedforward signal (output signal of 220) based on the digital input signal (DIGITAL WAVEFORM), a first low pass filter (222) configured to apply low pass filtering to the feedforward signal (output signal of 220) to provide a filtered feedforward signal (output signal of 222), a first feedback node (right input terminal of 224) configured to receive a first feedback signal (output signal of 236) indicative of an output signal (output signal of 214) output from the switching output stage (214), an error path (228, 230, 232) configured to process an error signal (output signal of 224) to generate the digital correction signal (output signal of 230) and wherein the error signal (output signal of 224) is generated as a difference between the filtered feedforward signal (output signal of 222) and a filtered feedback signal (output signal of 234) and wherein the filtered feedback signal (output signal of 234) corresponds to the first feedback signal (output signal of 236) with low pass filtering (234) applied and wherein the error path (228, 230, 232) comprises an error loop filter (228) with an analog input filter stage (232), and the modulator circuit (202) is configured to apply the first feedback signal (output signal of 236) to a first node (lower vertical input node of 212) of the error path (228, 230, 232) downstream of the analog input filter stage (232) as a feedback compensation signal (output signal of 234) for phase lead compensation.
Regarding claim 2, wherein the modulator circuit (202) is further configured to apply the feedforward signal (output signal of 220) prior to filtering by the first low pass filter (222) to the first node (lower vertical input node of 230) of the error path (228, 230, 232) as a feedforward compensation signal (output signal of 222) for phase lead compensation.
Regarding claim 3, wherein the first feedback signal (output signal of 236) and the feedforward signal (output signal of 220) are applied to the first node (lower vertical input node of 230) of the error path (228, 230, 232) via respective gain elements (gain elements in 232) to provide the feedback compensation signal (output signal of 234) and the feedforward compensation signal (output signal of 222) respectively.
Regarding claim 5, wherein the first node (lower vertical input node of 212) of the error path (228, 230, 232) is at the output (output of 232) of the analog input filter stage (232).
Regarding claim 6, wherein the error loop filter (228) comprises at least one additional filter stage (filter in 228) downstream of the first node (lower vertical input node of 212) of the error path (228, 230, 232).
Regarding claim 7, Mollenkopf et al further comprising a second low pass filter (234) and the second low pass filter (234) is configured to receive and low pass filter the first feedback signal (output signal of 236) to provide the filtered feedback signal (output signal of 234).
Regarding claim 9, wherein the first low pass filter (222) is a finite impulse response filter.
Regarding claim 13, wherein the first (204A) and second (220) digital modulators comprise digital pulse width modulation modulators.
Regarding claim 14, Mollenkopf et al further comprising an output stage (214).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over [Mollenkopf et al (Fig. 1); 6,377,786] in view of [Hallivuori (Fig. 2); 8,369,446].
Regarding claim 15, Mollenkopf et al discloses all the limitations in claim 15 except for that the output filter in an output path configured to low pass filter the output signal from the output stage. Hallivuori discloses an amplifier circuit comprising an output filter (108) in an output path (108, 110, 132) configured to low pass filter (108) the output signal (the signal generating from the output terminal 132) from the output stage (114). It would have been obvious to one of ordinary skill in the art at the time the invention was made would have found it obvious to have employed the low pass filter at the output terminal of the output stage of Mollenkopf et al (Fig. 1), such as taught by Hallivuori (Fig. 2) in order to provide the advantageous benefit of eliminating the high frequency signals of the amplifier circuit.
Regarding claim 16, wherein the first feedback signal (138) is tapped from the output (132) of the output stage upstream of the output filter (108) and the filtered feedback signal (138) is tapped from the output of the output filter (108).
Regarding claim 17, wherein the output filter (108) is an LC filter (low pass filter).
Allowable Subject Matter
Claims 4, 8, 10-12 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Allowance
The following is an examiner’s statement of reasons for allowance: Regarding claim 4, the closest prior art of record, Mollenkopf et al does not disclose the following limitation: additional node of the error path via respective gain elements so as to provide an additional feedback compensational signal and an additional feedforward compensational signal for phase lead compensation at that additional node. Regarding claim 8, the closest prior art of record, Mollenkopf et al does not disclose the following limitation: second feedback signal -------- said filtered feedback signal. Regarding claim 10, the closest prior art of record, Mollenkopf et al does not disclose the following limitation: filter controller is configured to adapted at least one filter parameter of the --------in the error signal. Regarding claim 12, the closest prior art of record, Mollenkopf et al does not disclose the following limitation: error loop filter comprises a hybrid filter comprising ------analog filter stages. Regarding claim 19, the closest prior art of record, Mollenkopf et al does not disclose the following limitation: the first compensation signal corresponds -------- without low pass filtering.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
7,177,603 teaches feedforward amplifier circuit.
2003/0,107,434 also teaches the feedforward amplifier circuit.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Henry Choe whose telephone number is (571)272-1760. The examiner can normally be reached MONDAY-FRIDAY 5AM-11:00PM.
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/HENRY CHOE/ Primary Examiner, Art Unit 2843
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