DETAILED ACTION
This action is in response to the Response to Election 02/10/2026
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 04/26/2024 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner.
Election/Restrictions
Claims 13 – 18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 02/10/2026
Applicant’s election without traverse of Specie III in the reply filed on 02/10/2026 is acknowledged.
Claim Objections
Claim(s) 1 and 19 is/are objected to because of the following informalities:
Claim(s) 1 recite(s) "determine a first transistor within half bridge converter circuitry is powered on for a first amount of time" in line(s) 3 – 4. It appears that it should be "determine a first amount of time when a first transistor within a half bridge converter circuitry is powered on”
Claim(s) 1 recite(s) " determine a second transistor within the half bridge converter circuitry is powered on for a second amount of time" in line(s) 5 – 6. It appears that it should be "determine a second amount of time when a second transistor within the half bridge converter circuitry is powered on”.
Claim(s) 19 recite(s) "determine a first transistor within half bridge converter circuitry is powered on for a first amount of time" in line(s) 3 – 4. It appears that it should be "determine a first amount of time when a first transistor within a half bridge converter circuitry is powered on”
Claim(s) 19 recite(s) " determine a second transistor within the half bridge converter circuitry is powered on for a second amount of time" in line(s) 5 – 6. It appears that it should be "determine a second amount of time when a second transistor within the half bridge converter circuitry is powered on”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 19 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by US Pub. No. 2022/0247320; (hereinafter Stracquadaini).
Regarding claim 19, Stracquadaini [e.g. Figs. 1 – 2] discloses a non-transitory machine-readable storage medium comprising instructions to cause programmable circuitry to at least: determine [e.g. 144, 146, 148] a first transistor [e.g. 102] within half bridge converter circuitry [e.g. 102, 104] is powered on for a first amount of time during a switching cycle of the half bridge converter circuitry [e.g. Fig. 2 with respect to HO high level]; determine [e.g. 144, 146, 148] a second transistor [e.g. 104] within the half bridge converter circuitry is powered on for a second amount of time during the switching cycle [e.g. Fig. 2 with respect to LO high level]; and inject an amount of current into the half bridge converter circuitry to correct an error, the amount of the current based on a difference between the first amount of time and the second amount of time [e.g. paragraph 029 recites “The compensation ramp maintains the on time of the high-side switching transistor 102 and the low-side switching transistor 104 as equal as possible (i.e., maintains a 50% duty cycle in the half bridge formed by the high-side switching transistor 102 and the low-side switching transistor 104). The flip-flop 148 generates the signal Q based on HO and LO to trigger changes in the slope of the compensation ramp”].
Examiner's Note
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Allowable Subject Matter
Claims 1 – 12 are allowed.
Claims 20 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The primary reason for the indication of the allowability of claim 1 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “digital to analog converter (DAC) circuitry coupled to the monitor circuitry, the DAC circuitry configured to inject an amount of current into the half bridge converter circuitry to correct an error, the amount of the current based on a difference between the first amount of time and the second amount of time”.
The primary reason for the indication of the allowability of claim 20 is the inclusion therein, in combination as currently claimed as a whole, of the limitation of “wherein: the half bridge converter circuitry includes the first transistor, the second transistor, an inductor, a resonant capacitor, and control circuitry; the control circuitry is configured to operate the first transistor and the second transistor responsive to a voltage across the resonant capacitor; and the instructions cause the programmable circuitry to correct the error by injecting the amount of current such that an accuracy of a value used by the control circuitry to determine the voltage across the resonant capacitor is increased”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US Pub. No. 2023/0396177 discloses a controller applied to a primary side of an inductor-inductor-capacitor (LLC) resonant converter includes a common-mode voltage generation circuit and a control signal generation circuit. The common-mode voltage generation circuit is used for generating a common-mode voltage. The control signal generation circuit is used for generating an upper bridge switch control signal and a lower bridge switch control signal according to a compensation voltage corresponding to an output voltage of the LLC resonant converter, a sensing voltage corresponding to an input voltage of the LLC resonant converter, and the common-mode voltage, wherein the upper bridge switch control signal and the lower bridge switch control signal control an upper bridge switch and a lower bridge switch of the primary side of the LLC resonant converter, respectively.
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/ALEX TORRES-RIVERA/Primary Examiner, Art Unit 2838