DETAILED ACTION
The present application, filed on 4/27/2024 is being examined under the AIA first inventor to file provisions.
The following is a non-final First Office Action on the Merits. Claims 1-20 are pending and have been considered below.
Priority
This application is a CON of 15/176,910 06/08/2016, which claims benefit of 62/172,527 06/08/2015.
The priority is acknowledged.
Information Disclosure Statement (IDS)
The information disclosure statement (IDS) submitted on 6/7/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, such IDS is being considered by Examiner.
Claim Rejections - 35 USC § 101
35 USC 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 USC 101 because the claimed invention is not directed to patent eligible subject matter. The claimed matter is directed to a judicial exception, i.e. an abstract idea, not integrated into a practical application, and without significantly more.
Per Step 1 of the multi-step eligibility analysis, claims 1-12 are directed to a system and claims 13-20 are directed to a system.
Thus, on its face, each independent claim and the associated dependent claims are directed to a statutory category of invention.
[INDEPENDENT CLAIMS]
Per Step 2A.1. Independent claim 1 is rejected under 35 USC 101 because the independent claim is directed to an abstract idea, a judicial exception, without reciting additional elements that integrate the judicial exception into a practical application.
The limitations of the independent claim 1 recite an abstract idea, shown in bold below:
[A] A sparse coding system:
[B] a neural network including a plurality of physical neurons each having a respective feature associated therewith and each being configured to
[C] be electrically connected to every other physical neuron in the network and to a portion of an input dataset,
[D] wherein the plurality of physical neurons are arranged in a plurality of neuron clusters each comprising a different subset of two or more of the plurality of physical neurons, and further
[E] wherein the two or more physical neurons in each cluster are electrically connected to one another in a bus structure via one or more electrical conductors, and the plurality of clusters are electrically connected together in a ring structure, and
[F] wherein the neural network is configured to
[G] perform a learning operation that includes, in response to one or more input images,
[H] recording in a memory spike counts for a first group of the plurality of physical neurons that spike in response to the input image(s) before any of the other of the plurality of physical neurons spike in response to the input image(s),
[I] wherein the first group of the plurality of physical neurons comprises a number of the physical neurons that is less than the total number of the physical neurons in the neural network that spike in response to the input image(s), and
[J] updating one or more learning parameters for one or more of the plurality of physical neurons based on stored spike counts from only the physical neurons in the first group of neurons.
Independent claim 1 recites: perform a learning operation ([G]); recording spike counts in the memory ([H]); and updating learning parameters ([J]), which, based on the claim language and in view of the application disclosure, represents a process aimed at: implementing a sparse coding algorithm.
This is a combination that, under its broadest reasonable interpretation, covers performance of limitations expressing following learning rules and/or instructions. These fall under the Certain Methods of Organizing Human Activity, i.e., Managing Personal Behavior or Relationships, or Interactions Between People grouping of abstract ideas (see MPEP 2106.04(a)(2)).
Accordingly, it is concluded that independent claim 1 recites an abstract idea that corresponds to a judicial exception.
[INDEPENDENT CLAIMS – Additional Elements]
Per Step 2A.2. The identified abstract idea is not integrated into a practical application because the additional elements in the independent claims only amount to instructions to apply the judicial exception to a computer, or are a general link to a technological environment (see MPEP 2106.05(f); MPEP 2106.05(h)).
For example, the added elements “a neural network,” and “physical neurons” recite computing elements at a high level of generality, generally linking the use of a judicial exception to a particular technological environment (see MPEP 2106.05(h)), or merely using a computer as a tool to perform an abstract idea (MPEP 2106.05(f)). Further, the additional elements “wherein the plurality of physical neurons are arranged in a plurality of neuron clusters each comprising a different subset of two or more of the plurality of physical neurons”; “wherein the two or more physical neurons in each cluster are electrically connected to one another in a bus structure via one or more electrical conductors, and the plurality of clusters are electrically connected together in a ring structure”; “wherein the first group of the plurality of physical neurons comprises a number of the physical neurons that is less than the total number of the physical neurons in the neural network that spike in response to the input image(s),” as applied to the physical neurons, the two or more physical neurons, and the first group of neurons, are nothing more than (a) descriptive limitations of claim elements, such as describing the nature, structure and/or content of other claim elements, or (b) general links to the computing environment, which amount to instructions to “apply it,” or equivalent (MPEP 2106.05(f)).
These additional elements of the independent claims do not preclude from carrying out the identified abstract idea implementing a sparse coding algorithm, and do not serve to integrate the identified abstract idea into a practical application.
The additional elements in the independent claims, shown not bolded above, recite: being electrically connected ([C]). When considered individually, they amount to nothing more than receiving or transmitting data/signals that serves merely to implement the abstract idea using computing components for performing computer functions (corresponding to the words “apply it” or an equivalent), or merely uses a computer as a tool to perform the identified abstract idea. Thus, it is concluded that these claim elements do not integrate the identified abstract idea (implementing a sparse coding algorithm) into a practical application (see MPEP 2106.05(f)(2)).
Therefore, the additional claim elements of independent claim 1 evaluated individually, as well as a whole, as an ordered combination, do not integrate the identified abstract idea into a practical application and the claims are directed to the recited judicial exception.
Per Step 2B. Independent claim 1 does not include additional elements that are sufficient to amount to significantly more than the judicial exception because, when the independent claim is reevaluated as a whole, as an ordered combination under the considerations of Step 2B, the outcome is the same like under Step 2A.2.
Overall, it is concluded that independent claims 1 are deemed ineligible.
Per Step 2A.1. Independent claim 13 is rejected under 35 USC 101 because the independent claim is directed to an abstract idea, a judicial exception, without reciting additional elements that integrate the judicial exception into a practical application.
The limitations of the independent claim 13 recite an abstract idea, shown in bold below:
[A] A sparse coding system comprising: a sparse feature extractor inference module:
[B] extract features from one or more input images, each containing at least one object,
[C] wherein the inference module comprises an implementation of a sparse coding algorithm;
and an event-driven object classifier configured to
[D] classify the object in the input image(s) based on the extracted features,
[E] wherein the sparse feature extractor inference module and event-driven object classifier are integrated on a single chip, and further
[F] wherein the inference module comprises at least one neural network comprising a plurality of physical neurons each having a respective feature associated therewith and each being configured to
[G] be connected to every other physical neuron in the network and to at least a portion of the input image(s) when received;
[H] the neural network being configured to
[I] perform a learning operation that includes, in response to the input image(s),
[J] recording in a memory spike counts for a first group of the plurality of physical neurons that spike in response to the input image(s) before any of the other of the plurality of physical neurons spike in response to the input image(s),
[K] wherein the first group of the plurality of physical neurons comprises a number of the physical neurons that is less than the total number of the physical neurons in the neural network that spike in response to the input image(s), and
[L] updating one or more learning parameters for one or more of the plurality of physical neurons based on stored spike counts from only the physical neurons in the first group of neurons.
Independent claim 1 recites: perform a learning operation ([I]); recording spike counts in the memory ([J]); and updating learning parameters ([L]), which, based on the claim language and in view of the application disclosure, represents a process aimed at: implementing a sparse coding algorithm.
This is a combination that, under its broadest reasonable interpretation, covers performance of limitations expressing following learning rules and/or instructions. These fall under the Certain Methods of Organizing Human Activity, i.e., Managing Personal Behavior or Relationships, or Interactions Between People grouping of abstract ideas (see MPEP 2106.04(a)(2)).
Accordingly, it is concluded that independent claim 13 recites an abstract idea that corresponds to a judicial exception.
[INDEPENDENT CLAIMS – Additional Elements]
For example, the added elements “processor”, “memory” recite computing elements at a high level of generality, generally linking the use of a judicial exception to a particular technological environment (see MPEP 2106.05(h)), or merely using a computer as a tool to perform an abstract idea (MPEP 2106.05(f)). Further, the additional elements “wherein the inference module comprises an implementation of a sparse coding algorithm; and an event-driven object classifier”; “wherein the sparse feature extractor inference module and event-driven object classifier are integrated on a single chip”; “wherein the inference module comprises at least one neural network comprising a plurality of physical neurons each having a respective feature associated therewith”; “wherein the first group of the plurality of physical neurons comprises a number of the physical neurons that is less than the total number of the physical neurons in the neural network that spike in response to the input image(s) as applied to the inference module, wherein the sparse feature extractor inference module, the event-driven object classifier, the inference module and the group of physical neurons, are nothing more than (a) descriptive limitations of claim elements, such as describing the nature, structure and/or content of other claim elements, or (b) general links to the computing environment, which amount to instructions to “apply it,” or equivalent (MPEP 2106.05(f)).
These additional elements of the independent claims do not preclude from carrying out the identified abstract idea implementing a sparse coding algorithm, and do not serve to integrate the identified abstract idea into a practical application.
The additional elements in the independent claims, shown not bolded above, recite: extract features from images ([B]), classify objects ([D]), be connected ([G]). When considered individually, they amount to nothing more than receiving data, processing data, storing results or transmitting data that serves merely to implement the abstract idea using computing components for performing computer functions (corresponding to the words “apply it” or an equivalent), or merely uses a computer as a tool to perform the identified abstract idea. Thus, it is concluded that these claim elements do not integrate the identified abstract idea (implementing a sparse coding algorithm) into a practical application (see MPEP 2106.05(f)(2)).
Therefore, the additional claim elements of independent claim 13 evaluated individually, as well as a whole, as an ordered combination, do not integrate the identified abstract idea into a practical application and the claims are directed to the recited judicial exception.
Per Step 2B. Independent claim 13 does not include additional elements that are sufficient to amount to significantly more than the judicial exception because, when the independent claim is reevaluated as a whole, as an ordered combination under the considerations of Step 2B, the outcome is the same like under Step 2A.2.
Overall, it is concluded that independent claims 13 are deemed ineligible.
[DEPENDENT CLAIMS]
Dependent claim 9 recites:
generate a binary spike output.
The elements in these dependent claims are comparable to receiving/transmitting data, processing data, storing results or transmitting data that serves merely to implement the abstract idea using computing components for performing computer functions (corresponding to the words “apply it” or an equivalent), or merely uses a computer as a tool to perform the identified abstract idea. Thus, it is concluded that these claim elements do not integrate the identified abstract idea (implementing a sparse coding algorithm) into a practical application (see MPEP 2106.05(f)(2)). When considered individually, these added claim elements further elaborate on the abstract idea identified in the independent claims, because the dependent claims continue to recite the identified abstract idea.
The dependent claims elements have the same relationship to the underlying abstract idea as outlined in the independent claims analysis above. It is readily clear that the dependent claim elements are not directed to any specific improvements of the independent claims and do not practically or significantly alter how the identified abstract idea would be performed. When considered as a whole, as an ordered combination, the dependent claims further elaborate on the previously identified abstract idea (implementing a sparse coding algorithm).
Therefore, dependent claim 9 is deemed ineligible. As a result, it is concluded that the dependent claim elements do not integrate the identified abstract idea into a practical application (see MPEP 2106.05(f)(2)).
Dependent claim 10 recites:
extract features from an image represented by the input dataset, wherein the image contains an object.
The elements in these dependent claims are comparable to receiving/transmitting data, processing data, storing results or transmitting data that serves merely to implement the abstract idea using computing components for performing computer functions (corresponding to the words “apply it” or an equivalent), or merely uses a computer as a tool to perform the identified abstract idea. Thus, it is concluded that these claim elements do not integrate the identified abstract idea (implementing a sparse coding algorithm) into a practical application (see MPEP 2106.05(f)(2)). When considered individually, these added claim elements further elaborate on the abstract idea identified in the independent claims, because the dependent claims continue to recite the identified abstract idea.
The dependent claims elements have the same relationship to the underlying abstract idea as outlined in the independent claims analysis above. It is readily clear that the dependent claim elements are not directed to any specific improvements of the independent claims and do not practically or significantly alter how the identified abstract idea would be performed. When considered as a whole, as an ordered combination, the dependent claims further elaborate on the previously identified abstract idea (implementing a sparse coding algorithm).
Therefore, dependent claim 10 is deemed ineligible. As a result, it is concluded that the dependent claim elements do not integrate the identified abstract idea into a practical application (see MPEP 2106.05(f)(2)).
Dependent claim 11 recites:
classify the object in the input image based on the extracted features.
The elements in these dependent claims are comparable to receiving/transmitting data, processing data, storing results or transmitting data that serves merely to implement the abstract idea using computing components for performing computer functions (corresponding to the words “apply it” or an equivalent), or merely uses a computer as a tool to perform the identified abstract idea. Thus, it is concluded that these claim elements do not integrate the identified abstract idea (implementing a sparse coding algorithm) into a practical application (see MPEP 2106.05(f)(2)). When considered individually, these added claim elements further elaborate on the abstract idea identified in the independent claims, because the dependent claims continue to recite the identified abstract idea.
The dependent claims elements have the same relationship to the underlying abstract idea as outlined in the independent claims analysis above. It is readily clear that the dependent claim elements are not directed to any specific improvements of the independent claims and do not practically or significantly alter how the identified abstract idea would be performed. When considered as a whole, as an ordered combination, the dependent claims further elaborate on the previously identified abstract idea (implementing a sparse coding algorithm).
Therefore, dependent claim 11 is deemed ineligible. As a result, it is concluded that the dependent claim elements do not integrate the identified abstract idea into a practical application (see MPEP 2106.05(f)(2)).
Dependent claims 2-8, 12, 14-20 recite:
wherein the bus structure is a multi-dimensional bus structure comprising a plurality of rows, a plurality of columns, and a plurality of logic OR gates,
wherein each OR gate is associated with a respective row or column and electrically connects the neurons in that row or column to one another.
wherein the bus structure is a multi-dimensional bus structure having A rows and B columns of neurons, and further
wherein the bus structure comprises A horizontal buses each connecting B neurons in a respective row of the bus structure, and B vertical buses each connecting A neurons in a respective column of the bus structure.
wherein each connection between two neurons has a respective weight W associated therewith and each connection between a neuron and at least a portion of the input dataset has a respective weight Q associated therewith, and further
wherein each weight Q and W is stored in the memory of the system.
wherein the weights Q and W are quantized to a fixed-point number to reduce memory storage.
wherein the memory is partitioned into a first portion and a second portion, and further
wherein both the first and second portions are used during a learning operation performed by the system, and only one of the first and second portions is used during an inference operation performed by the system.
wherein the first portion of the memory comprises the most significant bits (MSBs) of the Q and W weights, and the second portion of the memory comprises the least significant bits (LSBs) of the Q and W weights.
wherein parameter updates during the learning operation are passed to one or more neurons using a message passing approach.
wherein a supply voltage supplied by the power supply to the neural network is scaled to take advantage of the error resilience of the sparse coding system.
wherein the at least one neural network has a scalable multi-layer architecture.
wherein the at least one neural network comprises a plurality of neuron clusters each comprising a respective subset of two or more of the plurality of physical neurons, and further
wherein the two or more physical neurons in each cluster are electrically connected to one another in a bus structure via one or more electrical conductors, and the plurality of clusters are electrically connected together in a ring structure.
wherein the bus structure is a multi-dimensional bus structure comprising a plurality of rows, a plurality of columns, and a plurality of logic OR gates,
wherein each OR gate is associated with a respective row or column and electrically connects the neurons in that row or column to one another.
wherein the inference module further comprises a memory, and
wherein each connection between two neurons in the neural network has a respective weight W associated therewith and each connection between a neuron in the neural network and at least a portion of the input image has a respective weight Q associated therewith, and further
wherein each weight W and Q is stored in the memory.
wherein the memory is partitioned into a first portion and a second portion, and further
wherein both the first and second portions are used during a learning operation performed by the inference module and only one of the first and second portions is used during an inference operation performed by the inference module.
wherein the classifier comprises one or more adders and does not comprise any multipliers.
wherein the inference module comprises a front-end of the object recognition system and the classifier comprises a back-end of the object recognition system.
These further elements in the dependent claims do not perform any claimed method steps. They describe the nature, structure and/or content of other claim elements (in this instance – the bus structure, the OR gate, the neuron connection, the weight Q and W, the memory, the first and second portions, the parameter updates, the supply voltage, the neural network, the physical neurons, the bus structure, the interface module, the inference module, the connection between neurons, the first and the second memory portions, the classifier) and as such, cannot change the nature of the identified abstract idea (see MPEP 2106.07). The nature, form or structure of the other claim elements themselves do not practically or significantly alter how the identified abstract idea would be performed and do not provide more than a general link to a technological environment.
Therefore, dependent claims 2-8, 12, 14-20 are deemed ineligible.
When the dependent claims are considered as a whole, as an ordered combination, the claim elements noted above appear to merely apply the abstract concept to a technical environment in a very general sense. The most significant elements, which form the abstract concept, are set forth in the independent claims. The fact that the computing devices and the dependent claims are facilitating the abstract concept is not enough to confer statutory subject matter eligibility, since their individual and combined significance do not transform the identified abstract concept at the core of the claimed invention into eligible subject matter. Therefore, it is concluded that the dependent claims of the instant application, considered individually, or as a as a whole, as an ordered combination, do not amount to significantly more (see MPEP 2106.07(a)II).
In sum, claims 1-20 are rejected under 35 USC 101 as being directed to non-statutory subject matter.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the difference between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
i. Determining the scope and contents of the prior art.
ii. Ascertaining the differences between the prior art and the claims at issue.
iii. Resolving the level of ordinary skill in the pertinent art.
iv. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 4-5, 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of Jump et al. ("A modular ring architecture for Large Scale Neural Network Implementations, NPL 1989).
Regarding Claim 1: Zylberberg discloses: A sparse coding system, comprising:
a neural network including a plurality of physical neurons each having a respective feature associated therewith and each being configured to be electrically connected to every other physical neuron in the network and to a portion of an input dataset, {see at least Pg. 2 Col. 2 "Towards this end, we implement a network of spiking, leaky integrate-and-fire units [30] as model neurons ... Other units in the network, and the inputs Xk, which are pixel intensities in an image, modify the internal variable ui(t) by injecting current into the model neuron." See also Figure 1.}
wherein the neural network is configured to
perform a learning operation that includes, in response to one or more input images, {see at least Pg. 10 Col. 2 "To train the network, batches [37] of 100 images with zero mean, and unit standard deviation pixel values, are presented, and the number of spikes from each neuron are counted separately for each image. After each batch, the average update for the network properties is computer (following our learning rules) over the 100-image batch. This batch-wise training lets us use matrix operations for computing the updates ... " The examiner notes, that during a batch only the neurons that fire are update (e.g. learned).}
recording in a memory spike counts for a first group of the plurality of physical neurons that spike in response to the input image(s) before any of the other of the plurality of physical neurons spike in response to the input image(s), {see at least Pg. 10 Col. 2 "To train the network, batches [37] of 100 images with zero mean, and unit standard deviation pixel values, are presented, and the number of spikes from each neuron are counted separately for each image. After each batch, the average update for the network properties is computer (following our learning rules) over the 100-image batch. This batch-wise training lets us use matrix operations for computing the updates ... "}
wherein the first group of the plurality of physical neurons comprises a number of the physical neurons that is less than the total number of the physical neurons in the neural network that spike in response to the input image(s), and {the limitation is implicit, because a part of the network cannot comprise more neurons than the entire network}
updating one or more learning parameters for one or more of the plurality of physical neurons based on stored spike counts from only the physical neurons in the first group of neurons. {see at least Pg. 10 Col. 2 "To train the network, batches [37] of 100 images with zero mean, and unit standard deviation pixel values, are presented, and the number of spikes from each neuron are counted separately for each image. After each batch, the average update for the network properties is computer (following our learning rules) over the 100-image batch. This batch-wise training lets us use matrix operations for computing the updates ... "}
Zylberberg does not disclose, however, Jump discloses:
wherein the plurality of physical neurons are arranged in a plurality of neuron clusters each comprising a different subset of two or more of the plurality of physical neurons, and further {see at least (Pg. 1129 "The neural ring ... is a function neural network component capable of implementing N neurons connected locally or globally. It consists of a synchronous
communication ring ... and of K processing elements (Pes) situated off the ring. The Pes operate synchronously and parallel on data delivered to them ... Each PE serves N/K virtual neurons ... " See Figure 2. Further See Figure 4 and/or 5 any or all of these implementations read on the claim language.}
wherein the two or more physical neurons in each cluster are electrically connected to one another in a bus structure via one or more electrical conductors, and the plurality of clusters are electrically connected together in a ring structure, and {see at least Pg. 1129 "The neural ring ... is a function neural network component capable of implementing N neurons connected locally or globally. It consists of a synchronous communication ring ... and of K processing elements (Pes) situated off the ring. The Pes operate synchronously and parallel on data delivered to them ... Each PE serves N/K virtual neurons ... " See Figure 2. Further See Figure 4 and/or 5 any or all of these implementations read on the claim language.}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg to include the elements of Jump. One would have been motivated to do so, in order to optimize the coding algorithm. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg evidently discloses implementing a sparse coding algorithm. Jump is merely relied upon to illustrate the functionality of the arrangement of the physical neurons in the same or similar context. Since both implementing a sparse coding algorithm, as well as arrangement of the physical neurons are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, as well as Jump would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg / Jump.
Regarding Claim 4: Zylberberg, Jump discloses the limitations of Claim 1. Zylberberg further discloses:
wherein each connection between two neurons has a respective weight W associated therewith and each connection between a neuron and at least a portion of the input dataset has a respective weight Q associated therewith, and further {see at least Figure 1. "Inputs Xk to the network (from image pixels) contact the neuron at connections (synapses) with strengths Qik, whereas inhibitory recurrent connections between neurons have strings Wim." Alternatively, Pg. 9 Col. 1 "The same is true for the feed-forward weights Qik and the lateral connection strengths Wim ... "}
Jump further discloses:
wherein each weight Q and W is stored in the memory of the system. {see at least Pg. 1130 Last paragraph "Figure 5 is a block diagram of the pRing used in the pRing-Bus. It contains a number of arithmetic processing elements (Pes) which are connected to for a processing string. Each PE is supported by a weight memory and an accumulator memory."}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Jump to include additional elements of Jump. One would have been motivated to do so, in order to utilize them later on. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Jump evidently discloses implementing a sparse coding algorithm. Jump is merely relied upon to illustrate the additional functionality of storing the values in memory in the same or similar context. Since the subject matter is merely a combination of old elements, and in the combination each element would have performed the same function it performed separately, one having ordinary skill in the art before the effective filing date would have recognized that the results of the combination were predictable.
Regarding Claim 5: Zylberberg, Jump discloses the limitations of Claim 4. Zylberberg further discloses:
wherein the weights Q and W are quantized to a fixed-point number to reduce memory storage. {see at least Pg. 9 Col. 1 "Since the thresholds Si are adapted slowly compared
to the time scale of inference, they are approximately constant during inference. This is
true for the feed-forward weights Qik and lateral connection strengths Wim." The
examiner notes that if a value is constant it does not change, therefore its value is fixed
as the claim language requires. Alternatively, See Pg. 10 Col. 2.. The claim element “to reduce memory storage” consists entirely of language disclosing at most a reason to have performed earlier method steps (intended use or field of use), but does not affect the functions in a manipulative sense (see MPEP 2103 I C) and imparts neither structure nor functionality to the claimed method (see MPEP 2111.05, MPEP 2114 and authorities cited therein), so it is considered but given no patentable weight. The reference is provided for the purpose of compact prosecution.}
Regarding Claim 8: Zylberberg, Jump discloses the limitations of Claim 1. Zylberberg further discloses:
wherein parameter updates during the learning operation {see at least Pg. 10 Col. 2 "To train the network, batches [37] of 100 images with zero mean, and unit standard deviation pixel values, are presented, and the number of spikes from each neuron are counted separately for each image. After each batch, the average update for the network properties is computer (following our learning rules) over the 100-image batch. This batch-wise training lets us use matrix operations for computing the updates ... " The examiner notes, that during a batch only the neurons that fire are updated (e.g. learned)} are passed to one or more neurons using a message passing approach. {see at least Col.9 Lines 3-10 "With the switches in the I position, the activation signal uij passes along lines 22, through switch 96a to signal line 97 and then to the address bus of the LSB RAM 98 and the address bus for the MSB RAM 99. These RAMS are part of the same memory; the LSB RAM 98 being storage for the least significant bits and MSB RAM 99 being storage for the most significant bits of the same data word or value." Because the RAM of White is used to store some data word and during the update cycle (U) (See Col. 9) the value stored in the RAM is fed into the summer, the word stored in the RAMs must contain an address and value (e.g. an X-bit value). This combination of address and value read on the claimed "message". And since a "message" was used to update the values in the network, a message passing approach was used. Specifically White Col. 9 Lines 31-35 describe that an address and value are stored in the RAMs.}
Regarding Claim 9: Zylberberg, Jump discloses the limitations of Claim 1. Zylberberg further discloses:
generate a binary spike output. {see at least Figure 1. "Once that voltage exceeds threshold ... , the diode, which models neuronal voltage-gated into channels, opens, causing the cell to fire a punctate action potential, or spike, of activity." Alternatively, Pg. 2 Col. 2 "The neuronal output at time t, yi(t), is binary-valued: it is either 1 (spike) or O (no spike) ... "}
Regarding Claim 10: Zylberberg, Jump discloses the limitations of Claim 1. Zylberberg further discloses:
the neural network comprises a feature extractor inference module configured to extract features from an image represented by the input dataset, {see at least Pg. 8 Col. 2 " ... our network alternates between brief periods of inference (the representation of the input by a specific population activity pattern in the network) and learning (the modification of synaptic strengths) See also Figure. 3}
wherein the image contains an object. {see at least Figure 2. The image of a marina contains the object of a boat.}
Claims 2, 12 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of Jump et al. ("A modular ring architecture for Large Scale Neural Network Implementations, NPL 1989), in further view of Culurciello et al. ("CMOS image sensors for sensor networks", NPL 2006).
Regarding Claim 2: Zylberberg, Jump discloses the limitations of Claim 1. Zylberberg, Jump does not disclose, however Culurciello discloses:
wherein the bus structure is a multi-dimensional bus structure comprising a plurality of rows, a plurality of columns, and a plurality of logic OR gates, wherein each OR gate is associated with a respective row or column and electrically connects the neurons in that row or column to one another. {see at least (Pg. 41 Col. 1 Referring to Fig. 2, the pixels readout initiates with a request (Req) from the image sensor array to the receiver circuity. This request occurs after a pixel has generated an event. The requesting pixel will activate the row and column ROM that output its address on the bus. The request signal enables the output or a OR gate for both the row and column of the generating pixel."; Pg. 41 Col. 1 Referring to Fig. 2, the pixels readout initiates with a request (Req) from the image sensor array to the receiver circuity. This request occurs after a pixel has generated an event. The requesting pixel will activate the row and column ROM that output its address on the bus. The request signal enables the output or a OR gate for both the row and column of the generating pixel."}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Jump to include the elements of Culurciello. One would have been motivated to do so, in order to optimize the coding algorithm. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Jump evidently discloses implementing a sparse coding algorithm. Culurciello is merely relied upon to illustrate the functionality of a multidimensional bus structure in the same or similar context. Since both implementing a sparse coding algorithm, as well as a multidimensional bus structure are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Jump, as well as Culurciello would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Jump / Culurciello.
Regarding Claim 12: Zylberberg, Jump discloses the limitations of Claim 1. Zylberberg, Jump does not disclose, however, Culurciello further discloses: further
comprising a power supply, and wherein a supply voltage supplied by the power supply to the neural network is scaled to take advantage of the error resilience of the sparse coding system. {see at least Pg. 41 Col. 2 "The image sensor uses three power supplies: analog
(Vdda) and digital (Vddd) supply plus a pixel rest supply (Vddr). The supplies can be
used independently or tied together.". The claim element “to take advantage of the error resilience of the sparse coding system” consists entirely of language disclosing at most a reason to have performed earlier method steps (intended use or field of use), but does not affect the functions in a manipulative sense (see MPEP 2103 I C) and imparts neither structure nor functionality to the claimed method (see MPEP 2111.05, MPEP 2114 and authorities cited therein), so it is considered but given no patentable weight. The reference is provided for the purpose of compact prosecution.}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Jump to include the elements of Culurciello. One would have been motivated to do so, in order to enable the structure to function. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Jump evidently discloses implementing a sparse coding algorithm. Culurciello is merely relied upon to illustrate the functionality of a power supply in the same or similar context. Since both implementing a sparse coding algorithm, as well as power supply are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Jump, as well as Culurciello would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Jump / Culurciello.
Claims 3 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of Jump et al. ("A modular ring architecture for Large Scale Neural Network Implementations, NPL 1989), in further view of Wang et al. ("An FPGA implementation of a polychronous spiking neural network with delay adaptation", NPL 2013).
Regarding Claim 3: Zylberberg, Jump discloses the limitations of Claim 1. Zylberberg, Jump does not disclose, however Wang discloses:
wherein the bus structure is a multi-dimensional bus structure having A rows and B columns of neurons, and further {see at least Pg. 4 Figure 4 note (a) which describes the neuron array}
wherein the bus structure comprises A horizontal buses each connecting B neurons in a respective row of the bus structure, and B vertical buses each connecting A neurons in a respective column of the bus structure. {see at least Pg. 4 Figure 4 note (a) which describes the neuron array}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Jump to include the elements of Wang. One would have been motivated to do so, in order to enhance the performance of the architecture. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Jump evidently discloses implementing a sparse coding algorithm. Wang is merely relied upon to illustrate the functionality of a particular bus structure in the same or similar context. Since both implementing a sparse coding algorithm, as well as a particular bus structure are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Jump, as well as Wang would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Jump / Wang.
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of Jump et al. ("A modular ring architecture for Large Scale Neural Network Implementations, NPL 1989), in further view of White (US 5,319,587).
Regarding Claim 6: Zylberberg, Jump discloses the limitations of Claim 4. Zylberberg, Jump does not disclose, however, White discloses:
wherein the memory is partitioned into a first portion and a second portion, and further {see at least Col.9 Lines 3-10 "With the switches in the I position, the activation signal uij passes along lines 22, through switch 96a to signal line 97 and then to the address bus of the LSB RAM 98 and the address bus for the MSB RAM 99. These RAMS are part of the same memory; the LSB RAM 98 being storage for the least significant bits and MSB RAM 99 being storage for the most significant bits of the same data word or value."}
wherein both the first and second portions are used during a learning operation performed by the system, and only one of the first and second portions is used during an inference operation performed by the system. {see at least Col. 9 describes the memory and how it is used in an input cycle (I) and an update cycle (U). Under the broadest reasonable interpretation (MPEP 2111) of the claim language, the input cycle of White (I) reads on the claimed "inference operation" and the update cycle (U) reads on the claimed "learning operation". During the "learning operation"/update cycle (U) both of White MSB RAM and LSB RAM are "used" (e.g. the values are updated). Specifically White Col. 9 Lines 31-35. During the "inference operation"/input cycle (I) only the MSB RAM is "used" (e.g. only MSB RAM operates on the summer and/or is the only value that is new). Specifically, White Col. 9 Lines 15-19.}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Jump to include the elements of White. One would have been motivated to do so, in order to in order to improve performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Jump evidently discloses implementing a sparse coding algorithm. White is merely relied upon to illustrate the functionality of a particular memory structure in the same or similar context. Since both implementing a sparse coding algorithm, as well as a particular memory structure are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Jump, as well as White would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Jump / White.
Regarding Claim 7: Zylberberg, Jump, White discloses the limitations of Claim 6. White further discloses:
wherein the first portion of the memory comprises the most significant bits (MSBs) of the Q and W weights, and the second portion of the memory comprises the least significant bits (LSBs) of the Q and W weights. {see at least Col.9 Lines 3-10 "With the switches in the I position, the activation signal uij passes along lines 22, through switch 96a to signal line 97 and then to the address bus of the LSB RAM 98 and the address bus for the MSB RAM 99. These RAMS are part of the same memory; the LSB RAM 98 being storage for the least significant bits and MSB RAM 99 being storage for the most significant bits of the same data word or value."}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Jump, White to include additional elements of White. One would have been motivated to do so, in order to improve performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Jump, White evidently discloses implementing a sparse coding algorithm. White is merely relied upon to illustrate the additional functionality of a particular memory structure in the same or similar context. Since the subject matter is merely a combination of old elements, and in the combination each element would have performed the same function it performed separately, one having ordinary skill in the art before the effective filing date would have recognized that the results of the combination were predictable.
Claims 11 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of Jump et al. ("A modular ring architecture for Large Scale Neural Network Implementations, NPL 1989), in further view of Khosla et al. ("A neuromorphic System for object detection and classification", NPL 2013)..
Regarding Claim 11: Zylberberg, Jump discloses the limitations of Claim 10. Zylberberg, Jump does not disclose, however, Khosla discloses: further comprising an object classifier configured to
classify the object in the input image based on the extracted features. {see at least Fig. 1, [abstract] "Our system is inspired by recent findings in visual neuroscience on feed-forward object detection and recognition pipeline and mirrors that via two main neuromorphic modules (1) a front-end detection module that combines for and motion based visual attention to search for and detect "integrated" object percepts as is hypnotized to occur in the human visual pathways; (2) a back-end recognition module that processes only the detect object percepts through a neuromorphic object classification algorithm based on multi-scale convolutional neural networks ... " The examiner notes that the referenced "object percepts" read on the
claimed "extracted features."}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Jump to include the elements of Khosla. One would have been motivated to do so, in order to optimize performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Jump evidently discloses implementing a sparse coding algorithm. Khosla is merely relied upon to illustrate the functionality of image classifying criteria in the same or similar context. Since both implementing a sparse coding algorithm, as well as image classifying criteria are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Jump, as well as Khosla would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Jump / Khosla.
Claims 13-14, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of Khosla et al. ("A neuromorphic System for object detection and classification", NPL 2013).
Regarding Claim 13: Zylberberg discloses: A sparse coding system, comprising: a sparse feature extractor inference module configured to
extract features from one or more input images, each containing at least one object, {see at least Pg. 8 Col. 2 " ... our network alternates between brief periods of inference (the representation of the input by a specific population activity pattern in the network) and learning (the modification of synaptic strengths) See also Figure. 3)}
wherein the inference module comprises an implementation of a sparse coding algorithm; and
wherein the sparse feature extractor inference module and event-driven object classifier are integrated on a single chip, and further {The claim element is given no patentable weight because it is not directed to the subject of the claim, i.e., “being integrated on a single chip”. The specification does not disclose that only integrated on a single chip can be used to achieve the desired results. In addition, the Supreme Court has supported that substituting one known element for another, to obtain predictable results, is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143 (B)). Therefore, it is concluded that any variation of the two elements could successfully perform the steps of the claims}
wherein the inference module comprises at least one neural network comprising a plurality of physical neurons each having a respective feature associated therewith and each being configured to be connected to every other physical neuron in the network and to at least a portion of the input image(s) when received; {see at least Pg. 2 Col. 2 "Towards this end, we implement a network of spiking, leaky integrate-and-fire units [30] as model neurons ... Other units in the network, and the inputs Xk, which are pixel intensities in an image, modify the internal variable ui(t) by injecting current into the model neuron." See also Figure 1.}
the neural network being configured to
perform a learning operation that includes, in response to the input image(s), {see at least Pg. 10 Col. 2 "To train the network, batches [37] of 100 images with zero mean, and unit standard deviation pixel values, are presented, and the number of spikes from each neuron are counted separately for each image. After each batch, the average update for the network properties is computer (following our learning rules) over the 100-image batch. This batch-wise training lets us use matrix operations for computing the updates ... " The examiner notes, that during a batch only the neurons that fire are update (e.g. learned).}
recording in a memory spike counts for a first group of the plurality of physical neurons that spike in response to the input image(s) before any of the other of the plurality of physical neurons spike in response to the input image(s), {see at least Pg. 10 Col. 2 "To train the network, batches [37] of 100 images with zero mean, and unit standard deviation pixel values, are presented, and the number of spikes from each neuron are counted separately for each image. After each batch, the average update for the network properties is computer (following our learning rules) over the 100-image batch. This batch-wise training lets us use matrix operations for computing the updates ... "}
wherein the first group of the plurality of physical neurons comprises a number of the physical neurons that is less than the total number of the physical neurons in the neural network that spike in response to the input image(s), and {the limitation is implicit, because a part of the network cannot comprise more neurons than the entire network}
updating one or more learning parameters for one or more of the plurality of physical neurons based on stored spike counts from only the physical neurons in the first group of neurons. {see at least Pg. 10 Col. 2 "To train the network, batches [37] of 100 images with zero mean, and unit standard deviation pixel values, are presented, and the number of spikes from each neuron are counted separately for each image. After each batch, the average update for the network properties is computer (following our learning rules) over the 100-image batch. This batch-wise training lets us use matrix operations for computing the updates ... "}
Zylberberg does not disclose, however Khosla discloses:
an event-driven object classifier configured to {see at least Fig. 1, [abstract] "Our system is inspired by recent findings in visual neuroscience on feed-forward object detection and recognition pipeline and mirrors that via two main neuromorphic modules (1) a front-end detection module that combines for and motion based visual attention to search for and detect "integrated" object percepts as is hypnotized to occur in the human visual pathways; (2) a back-end recognition module that processes only the detect object percepts through a neuromorphic object classification algorithm based on multi-scale convolutional neural networks ... " The examiner notes that the referenced "object percepts" read on the claimed "extracted features."}
classify the object in the input image(s) based on the extracted features, {see at least Fig. 1, [abstract] "Our system is inspired by recent findings in visual neuroscience on feed-forward object detection and recognition pipeline and mirrors that via two main neuromorphic modules (1) a front-end detection module that combines for and motion based visual attention to search for and detect "integrated" object percepts as is hypnotized to occur in the human visual pathways; (2) a back-end recognition module that processes only the detect object percepts through a neuromorphic object classification algorithm based on multi-scale convolutional neural networks ... " The examiner notes that the referenced "object percepts" read on the claimed "extracted features."}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg to include the elements of Khosla. One would have been motivated to do so, in order to improve performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg evidently discloses implementing a sparse coding algorithm. Khosla is merely relied upon to illustrate the functionality of classification criteria in the same or similar context. Since both implementing a sparse coding algorithm, as well as classification criteria are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, as well as Khosla would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg / Khosla.
Regarding Claim 14: Zylberberg, Khosla discloses the limitations of Claim 13. Zylberberg further discloses:
wherein the at least one neural network has a scalable multi-layer architecture. {see at least Pg. 2 Col. 2 "Towards this end, we implement a network of spiking, leaky integrate-and-fire units [30] as model neurons ... Other units in the network, and the inputs Xk, which are pixel intensities in an image, modify the internal variable ui(t) by injecting current into the model neuron." See also Figure 1.}
Regarding Claim 20: Zylberberg, Khosla discloses the limitations of Claim 13. Khosla further discloses:
wherein the inference module comprises a front-end of the object recognition system and the classifier comprises a back-end of the object recognition system. {see at least Fig. 1. Also Abstract "Our system is inspired by recent findings in visual neuroscience on feed-forward object detection and recognition pipeline and mirrors that via two main neuromorphic modules (1) a front-end detection module that combines for and motion based visual attention to search for and detect "integrated" object percepts as is hypnotized to occur in the human visual pathways; (2) a back-end recognition module that processes only the detect object percepts through a neuromorphic object classification algorithm based on multi-scale convolutional neural networks ... "}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Khosla to include additional elements of Khosla. One would have been motivated to do so, in order to enhance performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Khosla evidently discloses implementing a sparse coding algorithm. Khosla is merely relied upon to illustrate the additional functionality of the structure of the inference module in the same or similar context. Since the subject matter is merely a combination of old elements, and in the combination each element would have performed the same function it performed separately, one having ordinary skill in the art before the effective filing date would have recognized that the results of the combination were predictable.
Claims 15, 17 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of view of Khosla et al. ("A neuromorphic System for object detection and classification", NPL 2013), in further view of Jump et al. ("A modular ring architecture for Large Scale Neural Network Implementations, NPL 1989).
Regarding Claim 15: Zylberberg, Khosla discloses the limitations of Claim 14. Zylberberg, Khosla does not disclose, however, Jump discloses:
wherein the at least one neural network comprises a plurality of neuron clusters each comprising a respective subset of two or more of the plurality of physical neurons, and further {see at least Pg. 1129 "The neural ring ... is a function neural network component capable of implementing N neurons connected locally or globally. It consists of a synchronous communication ring ... and of K processing elements (Pes) situated off the ring. The Pes operate synchronously and parallel on data delivered to them ... Each PE serves N/K virtual neurons ... " See Figure 2. Further See Figure 4 and/or 5 any or all of these implementations read on the claim language.}
wherein the two or more physical neurons in each cluster are electrically connected to one another in a bus structure via one or more electrical conductors, and the plurality of clusters are electrically connected together in a ring structure. {see at least Pg. 1129 "The neural ring ... is a function neural network component capable of implementing N neurons connected locally or globally. It consists of a synchronous communication ring ... and of K processing elements (Pes) situated off the ring. The Pes operate synchronously and parallel on data delivered to them ... Each PE serves N/K virtual neurons ... " See Figure 2. Further See Figure 4 and/or 5 any or all of these implementations read on the claim language.}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Khosla to include the elements of Jump. One would have been motivated to do so, in order to improve performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Khosla evidently discloses implementing a sparse coding algorithm. Jump is merely relied upon to illustrate the functionality of the arrangement of the neurons in the same or similar context. Since both implementing a sparse coding algorithm, as well as the arrangement of the neurons are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Khosla, as well as Jump would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Khosla / Jump.
Regarding Claim 17: Zylberberg, Khosla discloses the limitations of Claim 13. Zylberberg further discloses:
wherein each connection between two neurons in the neural network has a respective weight W associated therewith and each connection between a neuron in the neural network and at least a portion of the input image has a respective weight Q associated therewith, and further {see at least Figure 1. "Inputs Xk to the network (from image pixels) contact the neuron at connections (synapses) with strengths Qik, whereas inhibitory recurrent connections between neurons have strings Wim." Alternatively, Pg. 9 Col. 1 "The same is true for the feed-forward weights Qik and the lateral connection strengths Wim ... "}
Zylberberg, Khosla does not disclose, however, Jump discloses:
wherein the inference module further comprises a memory, and {see at least Pg. 1130 Last paragraph "Figure 5 is a block diagram of the pRing used in the pRing-Bus. It contains a number of arithmetic processing elements (Pes) which are connect for a processing string. Each PE is supported by a weight memory and an accumulator memory."}
wherein each weight W and Q is stored in the memory. {see at least Pg. 1130 Last paragraph "Figure 5 is a block diagram of the pRing used in the pRing-Bus. It contains a number of arithmetic processing elements (Pes) which are connect for a processing string. Each PE is supported by a weight memory and an accumulator memory."}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Khosla to include the elements of Jump. One would have been motivated to do so, in order to enhance functionality. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Khosla evidently discloses implementing a sparse coding algorithm. Jump is merely relied upon to illustrate the functionality of a memory in the same or similar context. Since both implementing a sparse coding algorithm, as well as a memory are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Khosla, as well as Jump would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Khosla / Jump.
Claims 16 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of view of Khosla et al. ("A neuromorphic System for object detection and classification", NPL 2013), in further view of Jump et al. ("A modular ring architecture for Large Scale Neural Network Implementations, NPL 1989), in further view of Culurciello et al. ("CMOS image sensors for sensor networks", NPL 2006).
Regarding Claim 16: Zylberberg, Khosla, Jump discloses the limitations of Claim 15. Zylberberg, Khosla, Jump does not disclose, however Culurciello discloses:
wherein the bus structure is a multi-dimensional bus structure comprising a plurality of rows, a plurality of columns, and a plurality of logic OR gates, wherein each OR gate is associated with a respective row or column and electrically connects the neurons in that row or column to one another. {see at least (Pg. 41 Col. 1 Referring to Fig. 2, the pixels readout initiates with a request (Req) from the image sensor array to the receiver circuity. This request occurs after a pixel has generated an event. The requesting pixel will activate the row and column ROM that output its address on the bus. The request signal enables the output or a OR gate for both the row and column of the generating pixel."; Pg. 41 Col. 1 Referring to Fig. 2, the pixels readout initiates with a request (Req) from the image sensor array to the receiver circuity. This request occurs after a pixel has generated an event. The requesting pixel will activate the row and column ROM that output its address on the bus. The request signal enables the output or a OR gate for both the row and column of the generating pixel."}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Khosla, Jump to include the elements of Culurciello. One would have been motivated to do so, in order to improve performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Khosla, Jump evidently discloses implementing a sparse coding algorithm. Culurciello is merely relied upon to illustrate the functionality of a bus structure in the same or similar context. Since both implementing a sparse coding algorithm, as well as a bus structure are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Khosla, Jump, as well as Culurciello would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Khosla, Jump / Culurciello.
Claims 18 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of view of Khosla et al. ("A neuromorphic System for object detection and classification", NPL 2013), in further view of Jump et al. ("A modular ring architecture for Large Scale Neural Network Implementations, NPL 1989), in further view of White (US 5,319,587).
Regarding Claim 18: Zylberberg, Khosla discloses the limitations of Claim 17. Zylberberg, Khosla does not discsloe, however, White discloses:
wherein the memory is partitioned into a first portion and a second portion, and further {see at least Col.9 Lines 3-10 "With the switches in the I position, the activation signal uij passes along lines 22, through switch 96a to signal line 97 and then to the address bus of the LSB RAM 98 and the address bus for the MSB RAM 99. These RAMS are part of the same memory; the LSB RAM 98 being storage for the least significant bits and MSB RAM 99 being storage for the most significant bits of the same data word or value."}
wherein both the first and second portions are used during a learning operation performed by the inference module and only one of the first and second portions is used during an inference operation performed by the inference module. {see at least Col. 9 describes the memory and how it is used in an input cycle (I) and an update cycle (U). Under the broadest reasonable interpretation (MPEP 2111) of the claim language, the input cycle of White (I) reads on the claimed "inference operation" and the update cycle (U) reads on the claimed "learning operation". During the "learning operation"/update cycle (U) both of White MSB RAM and LSB RAM are "used" (e.g. the values are updated). Specifically White Col. 9 Lines 31-35. During the "inference operation"/input cycle (I) only the MSB RAM is "used" (e.g. only MSB RAM operates on the summer and/or is the only value that is new). Specifically, White Col. 9 Lines 15-19.}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Khosla to include the elements of White. One would have been motivated to do so, in order to improve performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Khosla evidently discloses implementing a sparse coding algorithm. White is merely relied upon to illustrate the functionality of a memory structure in the same or similar context. Since both implementing a sparse coding algorithm, as well as a memory structure are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Khosla, as well as White would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Khosla / White.
Claims 19 are rejected under 35 U.S.C. 103 as being unpatentable over Zylberberg et al. ("A Sparse Coding Model with Synaptically local plasticity and Spiking Neurons can Account for the Diverse Shapes of V1 Simple Cell Receptive Fields", NPL 2011), in view of view of Khosla et al. ("A neuromorphic System for object detection and classification", NPL 2013), in further view of Aoyama et al. ("Learning Algorithms for a Neural Network in FPGA", NPL 2002).
Regarding Claim 19: Zylberberg, Khosla discloses the limitations of Claim 13. Zylberberg, Khosla does not disclose, however, Aoyama discloses:
wherein the classifier comprises one or more adders and does not comprise any multipliers. {see at least Pg. 1009 Col. 1 "Here, we got a result, the step/convex functions and 12 bits representations. They are got under the BP-learning; and the learning requires many multiply operations. A multiplier needs many gates by comparison with an adder. There is a problem to reduce hardware amounts .... " Pg. 1009 Col.2 Bottom of page "The connection weight in the "and/or" network are 1-bit signals. Thus, there is no multiplier, so this structure is the simplified network ultimately."}
It would have been obvious to one of ordinary skill in the art, at the time of filing, to modify Zylberberg, Khosla to include the elements of Aoyama. One would have been motivated to do so, in order to improve performance. Furthermore, the Supreme Court has supported that combining well known prior art elements, in a well-known manner, to obtain predictable results is sufficient to determine an invention obvious over such combination (see KSR International Co. v. Teleflex Inc. (KSR), 550 U.S.,82 USPQ2d 1385 (2007) & MPEP 2143). In the instant case, Zylberberg, Khosla evidently discloses implementing a sparse coding algorithm. Aoyama is merely relied upon to illustrate the functionality of classification criteria in the same or similar context. Since both implementing a sparse coding algorithm, as well as classification criteria are implemented through well-known computer technologies in the same or similar context, combining their features as outlined above using such well-known computer technologies (i.e., conventional software/hardware configurations), would be reasonable, according to one of ordinary skill in the art. Moreover, since the elements disclosed by Zylberberg, Khosla, as well as Aoyama would function in the same manner in combination as they do in their separate embodiments, it is concluded that their resulting combination would be predictable. Accordingly, the claimed subject matter is obvious over Zylberberg, Khosla / Aoyama.
The prior art made of record and not relied upon which, however, is considered pertinent to applicant's disclosure:
US 20110299789 A1 Lin; Yuanqing et al. SYSTEMS AND METHODS FOR DETERMINING IMAGE REPRESENTATIONS AT A PIXEL LEVEL Systems and methods process an image having a plurality of pixels includes an image sensor to capture an image; a first-layer to encode local patches on an image region; and a second layer to jointly encode patches from the same image region.
US 20180137393 A1 Nguyen; Hien et al. MEDICAL PATTERN CLASSIFICATION USING NON-LINEAR AND NONNEGATIVE SPARSE REPRESENTATIONS A method of classifying signals using non-linear sparse representations includes learning a plurality of non-linear dictionaries based on a plurality of training signals, each respective nonlinear dictionary corresponding to one of a plurality of class labels. A non-linear sparse coding process is performed on a test signal for each of the plurality of non-linear dictionaries, thereby associating each of the plurality of non-linear dictionaries with a distinct sparse coding of the test signal. For each respective non-linear dictionary included in the plurality of non-linear dictionaries, a reconstruction error is measured using the test signal and the distinct sparse coding corresponding to the respective non-linear dictionary. A particular nonlinear dictionary corresponding to a smallest value for the reconstruction error among the plurality of non-linear dictionaries is identified and a class label corresponding to the particular non-linear dictionary is assigned to the test signal.
US 20150006443 A1 Rose; Geordie et al. SYSTEMS AND METHODS FOR QUANTUM PROCESSING OF DATA Systems, methods and aspects, and embodiments thereof relate to unsupervised or semi-supervised features learning using a quantum processor. To achieve unsupervised or semi-supervised features learning, the quantum processor is programmed to achieve Hierarchal Deep Learning (referred to as HDL) over one or more data sets. Systems and methods search for, parse, and detect maximally repeating patterns in one or more data sets or across data or data sets. Embodiments and aspects regard using sparse coding to detect maximally repeating patterns in or across data. Examples of sparse coding include L0 and L1 sparse coding. Some implementations may involve appending, incorporating or attaching labels to dictionary elements, or constituent elements of one or more dictionaries. There may be a logical association between label and the element labeled such that the process of unsupervised or semi-supervised feature learning spans both the elements and the incorporated, attached or appended label.
US 20140313303 A1 Davis; Bruce L. et al. LONGITUDINAL DERMOSCOPIC STUDY EMPLOYING SMARTPHONE-BASED IMAGE REGISTRATION The evolution of a skin condition over time can be useful in its assessment. In an illustrative arrangement, a user captures skin images at different times, using a smartphone. The images are co-registered, color-corrected, and presented to the user (or a clinician) for review, e.g., in a temporal sequence, or as one image presented as a ghosted overlay atop another. Image registration can employ nevi, hair follicles, wrinkles, pores, and pigmented regions as keypoints. With some imaging spectra, keypoints from below the outermost layer of skin can be used. Hair may be removed for image registration, and restored for image review. Transformations in addition to rotation and affine transforms can be employed. Diagnostic correlations with reference image sequences can be made, employing machine learning in some instances. A great variety of other features and arrangements are also detailed.
US 20120219213 A1 Wang; Jinjun et al. Embedded Optical Flow Features Aspects of the present invention include systems and methods for generating an optical flow-based feature. In embodiments, to extract an optical flow feature, the optical flow at sparse interest points is obtained, and Locality-constrained Linear Coding (LLC) is applied to the sparse interest points to embed each flow into a higher-dimensional code. In embodiments, for an image frame, the multiple codes are combined together using a weighted pooling that is related to the distribution of the optical flows in the image frame. In embodiments, the feature may be used in training models to detect actions, in trained models for action detection, or both.
US 20160321559 A1 Rose; Geordie et al. SYSTEMS AND METHODS FOR QUANTUM PROCESSING OF DATA Systems, methods and aspects, and embodiments thereof relate to unsupervised or semi-supervised features learning using a quantum processor. To achieve unsupervised or semi-supervised features learning, the quantum processor is programmed to achieve Hierarchal Deep Learning (referred to as HDL) over one or more data sets. Systems and methods search for, parse, and detect maximally repeating patterns in one or more data sets or across data or data sets. Embodiments and aspects regard using sparse coding to detect maximally repeating patterns in or across data. Examples of sparse coding include L0 and L1 sparse coding. Some implementations may involve appending, incorporating or attaching labels to dictionary elements, or constituent elements of one or more dictionaries. There may be a logical association between label and the element labeled such that the process of unsupervised or semi-supervised feature learning spans both the elements and the incorporated, attached or appended label.
US 10268368 B2 Varanasi; Kiran et al. Method and systems for touch input Various systems and methods for determining a set of gesture components of touch input are provided. Touch data can be obtained (301), and a number of gesture components to be generated can be selected (302). A set of gesture components can be generated (303) based on the touch data and the number. For example, a sparse matrix decomposition can be used to generate the set of gesture components. The set of gesture components can be stored (304) in a non-transitory computer-readable medium.
US 9167274 B1 Gu; Qunshan et al. Generating synchronized dictionaries for sparse coding Techniques for generating synchronized dictionaries for sparse coding to facilitate encoding of video content are presented. An encoder can generate a dictionary that can be synchronized with a corresponding dictionary maintained by a decoder. The encoder can use the dictionary to facilitate encoding video content, based on sparse coding, for transmission to the decoder. During a video session, the encoder and decoder can signal each other to identify common dictionaries between the encoder and decoder, wherein desired common dictionaries can be used for coding content. During a session, the decoder can dynamically select visual images that can be used to dynamically add new elements to the corresponding dictionary. The decoder can provide identifying information regarding these visual images to the encoder. The encoder can select corresponding visual images to add to its dictionary to maintain the synchronization of these common dictionaries.
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