DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 7/24/24, 10/10/24 and 10/06/25. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claims 66 and 79 objected to because of the following informalities: Claims 66 and 79 recite “between the first slot assembly ant the second slot assembly”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 57, 62, 70, 75 recites the limitation " the respective cartridge ". There is insufficient antecedent basis for this limitation in the claim.
“cartridge” should change to “wafer pack”.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 54 and 67 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 ,10 of U.S. Patent No. 10466292. Although the claims at issue are not identical, they are not patentably distinct from each other because:
Claim 1 of US 10466292 had all limitations of claim 54 of pending application.
Claim 10 of US 10466292 had all limitations of claim 67 of pending application.
Claim 8 of US 10466292 had all limitations of claim 57 of pending application
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 54-55 and 67-68 is/are rejected under 35 U.S.C. 102(a1) as being anticipated by Richmond et al. (US 20020048826, provided by applicant, hereinafter Richmond).
Regarding to claim 54, Richmond discloses a testing apparatus (abstract) comprising:
a frame (fig.1 shows block diagram of burn-in system 20 and fig. 2-4 show a burn-in structure with zone 22, 25 and 24);
a plurality of slot assemblies inserted into the frame (fig.1- 3 with slot assembly (combination of 26, 107, 109, 119)), each slot assembly including:
a slot assembly body (fig.3 shows slot assembly mounted on the frame (zone 25)); and
a first slot assembly interface located on the slot assembly body (fig.3 shows slot assembly interface 109 mounted on the frame (zone 25));
a plurality of wafer packs (fig.2 shows a plurality of wafer pack 26), each wafer pack including:
a wafer pack body for holding a respective wafer (fig. 10-11 show a wafer pack body for holding wafer);
a plurality of wafer pack contacts held by the wafer pack body for making contact with contacts on the wafer (paragraph 0048 discloses probe 150 a plurality of tiles 152 that contain a multiplicity of contacts (not shown) for contacting each of the integrated circuits in a semiconductor wafer);
a wafer pack interface connected to the wafer pack contacts (fig. 10-11 show wafer pack 26 with interface 154), each wafer pack being insertable with a respective wafer into the frame and a respective wafer pack interface connecting with a respective first slot assembly interface (fig. 2-4 show each wafer pack 26 insert to the frame by interface 154 connected to 109);
and
a tester (zone 24) connected through the first slot assembly interfaces (fig. 2-3[109]), the wafer pack interfaces (fig. 10-11[154]) and the wafer pack contacts to the wafer pack contacts of the wafers in the testing stations to test the microelectronic devices by providing at least power to each microelectronic device and measuring a performance of the microelectronic device (fig. 1-3 show 26 contact with the tester via 154 and 109 and the tester includes signal driver … and fault analysis for provide power to the microelectronic devices on the wafer).
Regarding to claim 55, Richmond discloses the testing apparatus of claim 54, wherein each wafer pack is horizontally insertable with a respective wafer into the frame and a respective wafer pack interface connects vertically with a respective first slot assembly interface (fig. 2-3 show wafer packs 26 horizontally insertable with a respective wafer into the frame and a respective wafer pack interface connects vertically with a respective first slot assembly interface).
Regarding to claim 67, Richmond discloses a method of testing microelectronic devices (wafer under test) comprising inserting a plurality of slot assemblies (fig.1- 3 with slot assembly (combination of 26, 107, 109, 119)) into a frame (fig.1 shows block diagram of burn-in system 20 and fig. 2-4 show a burn-in structure with zone 22, 25 and 24);
making contact between a plurality of wafer pack contacts held by a wafer pack body of a plurality of respective wafer packs and contacts on each of a plurality of respective wafers (paragraph 0048 discloses probe 150 a plurality of tiles 152 that contain a multiplicity of contacts (not shown) for contacting each of the integrated circuits in a semiconductor wafer);
inserting each wafer pack with a respective wafer into a respective slot assembly inserted into the frame (fig. 2-4 show each wafer pack 26 insert to the slot assembly by interface 154 connected to 109);
connecting respective wafer pack interfaces on the respective wafer packs (fig. 10-11 show wafer pack 26 with interface 154) with respective first slot assembly interfaces on respective slot assembly bodies of the respective slot assemblies (fig. 2-4 show each wafer pack 26 insert to the frame by interface 154 connected to 109); and
testing microelectronic devices on the wafers with a tester connected through the respective first slot assembly interfaces, the wafer pack interfaces, and the wafer pack contacts to the contacts of the wafers by providing at least power to each microelectronic device and measuring a performance of the microelectronic device (fig. 1-3 show 26 contact with the tester via 154 and 109 and the tester includes signal driver … and fault analysis for provide power to the microelectronic devices on the wafer).
Regarding to claim 68, Richmond discloses the method of claim 67, wherein each wafer pack is horizontally inserted with a respective wafer into the frame (fig. 2-3 show wafer pack interface 154 horizontally inserting into the frame interface 109) and a respective wafer pack interface connects vertically with a respective first slot assembly interface (fig. 2 Richmond shows cartridge 26 plug into the interface horizontally).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 56 and 69 is/are rejected under 35 U.S.C. 103 as being unpatentable over Richmond.
Regarding to claim 56, Richmond discloses the testing apparatus of claim 55, wherein the respective wafer pack interface (fig. 2-3 show wafer pack interface 154) connects with the respective first slot assembly interface (fig. 2-3 show first slot assembly interface 109) when the respective wafer pack moves vertically downward (fig. 2 Richmond shows cartridge 26 plug into the interface horizontally).
Richmond does not disclose wafer pack interface connects with the respective first slot assembly interface when the respective wafer pack moves vertically downward.
However, this is a matter of design choice. Since the orientation of the interface arranged in the horizontal direction, it would has necessitated that the wafer pack moves in the horizontal direction to mate with the interface.
Therefore, at the time before the effective filing date, it would be obvious to a POSITA to have the wafer pack interface connects with the respective first slot assembly interface when the respective wafer pack moves vertically downward as matter of design choice.
Regarding to claim 69, Richmond discloses the method of claim 68, wherein the respective wafer pack interface (fig. 2-3 show wafer pack interface 154) connects with the respective first slot assembly interface (fig. 2-3 show first slot assembly interface 109) when the respective wafer pack moves vertically downward (fig. 2 Richmond shows cartridge 26 plug into the interface horizontally).
Richmond does not disclose wafer pack interface connects with the respective first slot assembly interface when the respective wafer pack moves vertically downward.
However, this is a matter of design choice. Since the orientation of the interface arranged in the horizontal direction, it would has necessitated that the wafer pack moves in the horizontal direction to mate with the interface.
Therefore, at the time before the effective filing date, it would be obvious to a POSITA to have the wafer pack interface connects with the respective first slot assembly interface when the respective wafer pack moves vertically downward as matter of design choice.
Claim(s) 57-58, 60-65, 70-71 and 73-78 is/are rejected under 35 U.S.C. 103 as being unpatentable over Richmond as applied to claim 55 above, and further in view of Uher et al. (US 20020030502, provided by applicant, hereinafter Uher).
Regarding to claim 57, Richmond discloses the testing apparatus of claims 55.
However, Richmond does not disclose wherein each wafer pack includes a respective backing board and a respective thin chuck with the respective wafer between the respective thin chuck and respective backing board and the respective cartridge interface is on the respective backing board.
Fig. 14 of Uher shows the same wafer pack of Richmond and fig. 1 and 5 of Usher shows a detail structure of wafer pack 26 comprising: a respective backing board (fig. 1 and 5[14]) and a respective thin chuck (fig. 1 and 5[12]) with the respective wafer (fig. 5[74]) between the respective thin chuck (fig. 5[12]) and respective backing board (fig. 5[14]) and the respective cartridge interface is on the respective backing board (fig. 1 shows [14] with interface 46).
Richmond and Uher are similar subject matter. At the time before the effective filing date of the claimed invention, it would have been obvious to a person having an ordinary skill in the art to incorporate the wafer pack of Uher into the system of Richmond in order to provide accurate temperature to the wafer under test.
Regarding to claim 58 Richmond in view of Uher discloses the testing apparatus of claims 57, wherein the respective backing board is above the respective wafer (fig. 1 and 5 of Uher show 14 above wafer 74).
Regarding to claim 60, Richmond in view of Uher discloses the testing apparatus of claims 54, further comprising: a plurality vacuum interfaces on the frame for providing vacuum air pressure, wherein each slot assembly includes: a vacuum interface, on each slot assembly body, that engages with a respective vacuum interface on the frame when the slot assembly is inserted into the frame (Uher shows a wafer pack with backing board 14 including vacuum path travel through nipples 31 and a chuck including vacuum grooves for wafer restraint. This indicates that would has necessitate plurality of vacuum interface on the frame to provide vacuum air pressure to the slot assembly then to the wafer pack when insert to the frame).
Regarding to claim 61, Richmond in view of Uher discloses the testing apparatus of claim 60, wherein the vacuum air pressure is applied to a respective space within each respective wafer pack to ensure proper contact between the respective wafer pack contacts and the respective contacts on the wafer (Uher discloses chuck including vacuum grooves for wafer restraint).
Regarding to claim 62, Richmond in view of Uher discloses the testing apparatus of claim 60, wherein each slot assembly includes a respective thermal chuck (Uher discloses thermal chuck 12 with heater 21), each wafer pack (fig. 1[10] of Uher) includes a respective backing board (fig. 5[14] of Uher) and a respective thin chuck (fig. 5[12] of Uher) with the respective wafer (fig. 5[74] of Uher) between the respective thin chuck (fig. 1[12] of Uher) and respective backing board (fig. 1[14] of Uher) and the respective cartridge interface (fig. 1[46] of Uher) is on the respective backing board (fig. 1[14] of Uher), and the vacuum air pressure (fig. 1[19] of Uher) is applied to a respective space between the respective thermal chuck a respective thin chuck (fig. 1[12] of Uher).
Regarding to claim 63, Richmond in view of Uher discloses the testing apparatus of claim 54, wherein the slot assemblies are inserted into the frame by sliding the respective slot assemblies separately from one another into the frame (fig. 1-4 of Richmond shows each wafer pack with correspond slot assembly and fig 4 of Richmond shows slot assembly inserted by sliding to the frame).
Regarding to claim 64, Richmond discloses the testing apparatus of claim 54, except further comprising: a front seal between a first of the slot assemblies and a second of the slot assemblies.
Fig. 14 of Uher shows the same wafer pack of Richmond and fig. 1 and 5 of Usher shows a detail structure of wafer pack 26 and paragraph 0042 discloses a seal member and paragraph 0054 discloses an O-ring served as a seal.
Therefore, at the time before the effective filing date, it would be obvious to incorporate the seal as taught by Uher into Richmond in order to isolate the wafer under test from the environment.
Richmond in view of Uher teach sealing but do not teach a front seal between a first of the slot assemblies and a second of the slot assemblies.
However, at the time before the effective filing date, it would be obvious to a POSITA to incorporate the seal between the slot assemblies in order to control and keep the temperature of wafer under test in each cartridge independent and isolate to each other.
Regarding to claim 65, Richmond in view of Uher discloses the testing apparatus of claim 64, except further comprising: a front seal between a first of the slot assemblies and the frame.
However, at the time before the effective filing date, it would be obvious to a POSITA to incorporate a front seal between a first of the slot assemblies and the frame in order to control and keep the temperature of wafer under test in each cartridge independent and isolate to each other.
Regarding to claim 70, Richmond discloses the method of claim 68.
However, Richmond does not disclose, wherein each wafer pack includes a respective backing board and a respective thin chuck with the respective wafer between the respective thin chuck and respective backing board and the respective cartridge interface is on the respective backing board.
Fig. 14 of Uher shows the same wafer pack of Richmond and fig. 1 and 5 of Usher shows a detail structure of wafer pack 26 comprising: a respective backing board (fig. 1 and 5[14]) and a respective thin chuck (fig. 1 and 5[12]) with the respective wafer (fig. 5[74]) between the respective thin chuck (fig. 5[12]) and respective backing board (fig. 5[14]) and the respective cartridge interface is on the respective backing board (fig. 1 shows [14] with interface 46).
Richmond and Uher are similar subject matter. At the time before the effective filing date of the claimed invention, it would have been obvious to a person having an ordinary skill in the art to incorporate the wafer pack of Uher into the system of Richmond in order to provide accurate temperature to the wafer under test.
Regarding to claim 71, Richmond discloses the method of claim 70, wherein the respective backing board is above the respective wafer (fig. 1 and 5 of Uher show 14 above wafer 74).
Regarding to claim 73, Richmond in view of Uher discloses the method of claim 67, further comprising: engaging a vacuum interface on each slot assembly body with a respective vacuum interface on the frame when the slot assembly is inserted into the frame; and providing vacuum air pressure to the slot assemblies through the respective vacuum interfaces (Uher shows a wafer pack with backing board 14 including vacuum path travel through nipples 31 and a chuck including vacuum grooves for wafer restraint. This indicates that would has necessitate plurality of vacuum interface on the frame to provide vacuum air pressure to the slot assembly then to the wafer pack when insert to the frame).
Regarding to claim 74, Richmond in view of Uher discloses the method of claim 73, wherein the vacuum air pressure is applied to a respective space within each respective wafer pack to ensure proper contact between the respective wafer pack contacts and the respective contacts on the wafer (Uher discloses chuck including vacuum grooves for wafer restraint).
Regarding to claim 75, Richmond in view of Uher discloses the method of claim 73, wherein each slot assembly includes a respective thermal chuck (Uher discloses thermal chuck 12 with heater 21), each wafer pack (fig. 1[10] of Uher) includes a respective backing board (fig. 5[14] of Uher) and a respective thin chuck (fig. 5[12] of Uher) with the respective wafer (fig. 5[74] of Uher) between the respective thin chuck (fig. 5[12] of Uher) and respective backing board (fig. 5[14] of Uher) and the respective cartridge interface (fig. 5[46] of Uher) is on the respective backing board (fig. 5[14] of Uher), and the vacuum air pressure (fig. 5[19] of Uher) is applied to a respective space between the respective thermal chuck a respective thin chuck (fig. 512] of Uher).
Regarding to claim 76, Richmond in view of Uher discloses the method of claim 67, further comprising: inserting the slot assemblies into the frame by sliding the respective slot assemblies separately from one another into the frame (fig. 1-4 of Richmond shows each wafer pack with correspond slot assembly and fig 4 of Richmond shows slot assembly inserted by sliding to the frame).
Regarding to claim 77, Richmond discloses the method of claim 67, except further comprising: locating a front seal between a first of the slot assemblies and a second of the slot assemblies.
Fig. 14 of Uher shows the same wafer pack of Richmond and fig. 1 and 5 of Usher shows a detail structure of wafer pack 26 and paragraph 0042 discloses a seal member and paragraph 0054 discloses an O-ring served as a seal.
Therefore, at the time before the effective filing date, it would be obvious to incorporate the seal as taught by Uher into Richmond in order to isolate the wafer under test from the environment.
Richmond in view of Uher teach sealing but do not teach a front seal between a first of the slot assemblies and a second of the slot assemblies.
However, at the time before the effective filing date, it would be obvious to a POSITA to incorporate the seal between the slot assemblies in order to control and keep the temperature of wafer under test in each cartridge independent and isolate to each other.
Regarding to claim 78, Richmond in view of Uher discloses the method of claim 77, except further comprising: locating a front seal between a first of the slot assemblies and the frame.
However, at the time before the effective filing date, it would be obvious to a POSITA to incorporate a front seal between a first of the slot assemblies and the frame in order to control and keep the temperature of wafer under test in each cartridge independent and isolate to each other.
Allowable Subject Matter
Claims 59, 66, 72 and 79 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding to claim 59, the prior arts of record disclose a wafer cartridge to hold the wafer under test then the wafer cartridge being placed into a tester. However, the prior arts of record, alone or in combination, do not fairly teach or suggest the slot assembly that hold the wafer cartridge to hold the wafer “wherein the respective slot assembly includes: a hinge attached to the slot assembly body; and a door attached to the slot assembly body by the hinge, the door being movable between an open position wherein the respective wafer pack is insertable into the slot assembly and a closed position wherein the door forms part of a sealed wall”.
Regarding to claim 66, the prior arts of record disclose a wafer cartridge to hold the wafer under test then the wafer cartridge being placed into a tester. However, the prior arts of record, alone or in combination, do not fairly teach or suggest the slot assembly that hold the wafer cartridge to hold the wafer “wherein the respective slot assembly includes: a hinge attached to the slot assembly body; and a door attached to the slot assembly body by the hinge, the door being movable between an open position wherein the respective wafer pack is insertable into the slot assembly and a closed position wherein the door forms part of a sealed wall formed jointly by the door and the front seal between the first slot assembly ant the second slot assembly”.
Regarding to claim 72, the prior arts of record disclose a wafer cartridge to hold the wafer under test then the wafer cartridge being placed into a tester. However, the prior arts of record, alone or in combination, do not fairly teach or suggest the slot assembly that hold the wafer cartridge to hold the wafer “moving a door attached to the slot assembly body by a hinge into an open position wherein the respective wafer pack is inserted into the slot assembly and a closed position wherein the door forms part of a sealed wall; and moving the door into a closed position wherein the door forms part of a sealed wall”.
Regarding to claim 79, the prior arts of record disclose a wafer cartridge to hold the wafer under test then the wafer cartridge being placed into a tester. However, the prior arts of record, alone or in combination, do not fairly teach or suggest the slot assembly that hold the wafer cartridge to hold the wafer “moving a door attached to the slot assembly body by a hinge into an open position wherein the respective wafer pack is inserted into the slot assembly and a closed position wherein the door forms part of a sealed wall; and moving the door into a closed position wherein the door forms part of a sealed wall formed jointly by the door and the front seal between the first slot assembly ant the second slot assembly”.
Conclusion
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/SON T LE/ Primary Examiner, Art Unit 2863