Prosecution Insights
Last updated: October 02, 2026
Application No. 18/649,291

SYSTEMS AND METHODS FOR LOW DENSITY PARITY CHECK (LDPC) ENCODING AND RATE MATCHING

Final Rejection §102§103
Filed
Apr 29, 2024
Priority
Jan 11, 2024 — provisional 63/619,958
Examiner
KAVLESKI, RYAN C
Art Unit
2412
Tech Center
2400 — Computer Networks
Assignee
Avago Technologies International Sales Pte. Limited
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
529 granted / 622 resolved
+27.0% vs TC avg
Strong +16% interview lift
Without
With
+16.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
20 currently pending
Career history
645
Total Applications
across all art units

Statute-Specific Performance

§101
8.1%
-31.9% vs TC avg
§103
48.6%
+8.6% vs TC avg
§102
16.9%
-23.1% vs TC avg
§112
17.1%
-22.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 622 resolved cases

Office Action

§102 §103
DETAILED ACTION In response to communication filed on 7/16/2026. Claims 1-20 are pending. Claims 1-20 are rejected. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendments This communication is in response to Applicant’s reply filed under 3 CFR 1.111 on 7/16/2026. Claims 1,7 and 13 were amended and claims 1-20 remain pending. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1,2,6-8,12-14, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Blanksby et al. (US Pub. 2016/0227437)(B1 hereafter) in view of Chen et al. (WO 2025/059388)(C2 hereafter). Regarding claims 1,7 and 13, B1 teaches a system [refer Fig. 14][paragraph 0104], comprising: a transmitter [refer Fig. 14; 1402][paragraph 0104]; and one or more processors [refer Fig. 14; 1408] configured to: identify a number of additional symbols (i.e. extra symbols) to be added to existing symbols corresponding to payload data to be encoded (i.e. data payload)[paragraph 0056](if additional short symbol of parity bits are being sent, extra symbol bit accordingly based upon an equation)[paragraph 0097]; calculate, based on a length of the payload data (i.e. Npld)[paragraph 0090], a number of available bits (i.e. Navbits) for error correction [paragraph 0097]; encode, via an low-density parity-check (LDPC) encoder (PPDU packets are encoded using LDPC)[paragraph 0056], the payload data using an LDPC code to generate a codeword having a number of parity bits corresponding to the available bits (if the MU LDPC extra symbol condition is true, then each LDPC user requires an extra short symbol of parity bits)[paragraph 0125]; and transmit, via the transmitter, the encoded data [paragraph 0104]. However, B1 doesn’t expressly disclose calculating, based on a length of the payload data and the identified number of additional symbols, a number of available bits for error correction. C2 discloses that for LDPC encoding, if a particular condition is met, a number of available bits can be incremented by an extra symbol segment and recomputed accordingly based on the new available bits value [paragraph 0104], an LDPC codeword is based upon when an extra symbol segment is added and a number of payload bits [paragraph 0117]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of B1 for determining a number of available bits for LDPC encoding [refer B1; paragraph 0097] to incorporate the updating of a codeword length for LDPCP when an extra symbol segment is added as taught by C2. One would be motivated to do so to provide support for longer codeword lengths in certain situations in which devices can support it [refer C2; paragraph 0118]. Regarding claims 2,8 and 14, B1 teaches receive a plurality of information bits that contain the payload data and a set of bits having the calculated number of available bits [paragraph 0041], and encode the plurality of information bits to generate the codeword (when LDPC is used, number of codewords and codeword length is determined in accordance)[paragraph 0092]. Regarding claims 6,12 and 18, B1 teaches to identify the number of additional symbols to be added to the existing symbols [paragraph 0097], the one or more processors are configured to determine the number of additional symbols based on at least one of bandwidth (the number of resource units allocated are dependent upon the bandwidth at which the BS or AP transmit a packet)[paragraph 0055]. Claims 3-5,9-11 and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over B1 in view of C2, as applied to claims 1,7, and 13, in further view of Chen et al. (US Pub. 2025/0286655)(C1 hereafter). Regarding claims 3,9 and 15, B1 teaches determine a number of shortened bits [paragraph 0093]; and determine a number of punctured bits [paragraph 0095]. However, B1 fails to disclose determine, based on the number of shortened bits, a number of punctured bits and a percentage of punctured bits. C1 discloses that for the LDPC encoding process [paragraph 0097], punctured bits are computed using available bits and the number of shortened bits [paragraph 0111][Equation 9], allocation of extra symbol segment can be in response to a puncturing ratio exceeding a ratio (i.e. percentage), a puncturing ratio can exceed another threshold while at the same time the puncturing ratio is divided by the shortening ratio [paragraph 0053]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of B1 for LDPC encoding to incorporate specific LDPC encoding computations for punctuated bits and a puncturing ratio as taught by C1. One would be motivated to do so to provide better LDPC decoding performance [refer C1; paragraph 0056]. Regarding claims 4,10, and 16, B1 fails to disclose to identify the number of additional symbols to be added to the existing symbols, the one or more processors are configured to identify the number of additional symbols that reduces the percentage of punctured bits to a threshold percentage. C1 discloses that for the LDPC encoding allocation of extra symbol segment can be in response to a puncturing ratio exceeding a ratio (i.e. percentage), a puncturing ratio can exceed another threshold while at the same time the puncturing ratio is divided by the shortening ratio [paragraph 0053], a puncturing ratio can be reduced by adding one or more symbols or one or more symbol fractions to adjust the boundary of the packet [paragraph 0044]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of B1 for LDPC encoding to incorporate specific LDPC encoding computations for punctuated bits and a puncturing ratio as taught by C1. One would be motivated to do so to provide better LDPC decoding performance [refer C1; paragraph 0056]. Regarding claims 5,11 and 17, B1 fails to disclose the identified number of additional symbols is a minimum number of additional bits that reduces the percentage of punctured bits to the threshold percentage. C1 discloses that for the LDPC encoding allocation of extra symbol segment can be in response to a puncturing ratio exceeding a ratio (i.e. percentage), a puncturing ratio can exceed another threshold while at the same time the puncturing ratio is divided by the shortening ratio [paragraph 0053], a puncturing ratio can be reduced by adding one or more symbols or one or more symbol fractions to adjust the boundary of the packet [paragraph 0044]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of B1 for LDPC encoding to incorporate specific LDPC encoding computations for punctuated bits and a puncturing ratio as taught by C1. One would be motivated to do so to help provide increased reliability of data [refer C1; paragraph 0041]. Claims 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over B1 in view of C2, as applied to claims 1,7, and 13, in further view of Lin et al. (US Pub. 2025/0260512)(L1 hereafter). Regarding claim 19, B1 fails to disclose determining at least one of a number of codewords or a codeword length comprises: determining whether the calculated number of available bits is less than or equal to an integer multiple of a first value; and in response to determining that the calculated number of available bits is less than or equal to the integer multiple of the first value, determining the number of codewords based on the first value and the length of the payload data and setting the codeword length to the first value. L1 discloses that for LDPC encoding, a length of a to be encoded bit is determined and a length of a LDPC codeword is based upon the obtained length, when a length is greater than 0 and less than a first preset coding rate threshold, the length of the LDPC codeword is explicitly 648 bits, or 81 bytes [paragraph 0032]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of B1 to incorporate LDPC codeword encoding length based upon a coding rate threshold as taught by L1. One would be motivated to do so to provide a means of improving transmission efficiency and performance [refer L1; paragraph 0005]. Regarding claim 20, B1 fails to disclose determining at least one of a number of codewords or a codeword length further comprises: determining whether the calculated number of available bits is less than or equal to an integer multiple of a second value that is greater than the first value; and in response to determining that the calculated number of available bits is less than or equal to the integer multiple of the second value, determining the number of codewords based on the second value and the length of the payload data and setting the codeword length to the second value. L1 discloses that for LDPC encoding, a length of a to be encoded bit is determined and a length of a LDPC codeword is based upon the obtained length, when a length is greater than 0 and less than a first preset coding rate threshold, the length of the LDPC codeword is explicitly 648 bits, or 81 bytes, and when the length is greater than the first length and less than a second length, the LDPC codeword is 1296 bits [paragraph 0032]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of B1 to incorporate LDPC codeword encoding length based upon a coding rate threshold as taught by L1. One would be motivated to do so to provide a means of improving transmission efficiency and performance [refer L1; paragraph 0005]. Response to Arguments Applicant’s arguments, see pages 6-7, filed 7/16/2026, with respect to the rejection of claims 1,2,6-8,12-14 and 18 under 35 U.S.C. 102(a)(1) have been fully considered and are persuasive in view of the amendments. Therefore, the rejection has been withdrawn. However, upon further consideration, a new grounds of rejection is made in view of the teachings of Chen et al. (WO 2025/059388)(C2 hereafter), as noted in the above rejection. Notably, Chen (C2 hereafter) discloses that for LDPC encoding, if a particular condition is met, a number of available bits can be incremented by an extra symbol segment and recomputed accordingly based on the new available bits value [paragraph 0104], C2 further disclosing that an LDPC codeword is based upon when an extra symbol segment is added and a number of payload bits [paragraph 0117]. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN C KAVLESKI whose telephone number is (571)270-3619. The examiner can normally be reached M-F 6:30am-3pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Charles C Jiang can be reached on 571-270-7191. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Ryan Kavleski /R.C.K./ Examiner, Art Unit 2412 /CHARLES C JIANG/Supervisory Patent Examiner, Art Unit 2412
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Prosecution Timeline

Apr 29, 2024
Application Filed
Apr 16, 2026
Non-Final Rejection mailed — §102, §103
Jul 08, 2026
Applicant Interview (Telephonic)
Jul 08, 2026
Examiner Interview Summary
Jul 16, 2026
Response Filed
Sep 14, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+16.5%)
3y 0m (~7m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 622 resolved cases by this examiner. Grant probability derived from career allowance rate.

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