DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Election/Restrictions
1. Applicant’s election without traverse of Species I, claims 1-7, in the reply filed on 9/8/2026 is acknowledged.
Specification
2. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
3. Claims 1-3, 6 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Endoh et al. (US 2013/0119452).
Re claim 1, Endoh teaches, under BRI, Figs. 1-2, [0166, 0178-0179], a cell structure, comprising:
-a first material forming a bit line (BL);
-a second material forming a storage region (floating gate 5) that is coupled to (via adjacent elements/layers) a first portion of the bit line (BL);
-a third material forming a channel (pillar 2) that is connected (via adjacent elements/layers) to the storage region (5) and to second and third portions of the bit line (BL);
-a fourth material forming a source line (SL) that is connected to the channel (2);
-a fifth material forming a front gate (USG 12) coupled (via adjacent elements/layers) to a first portion of the channel (2) and a first portion of the source line (SL); and
-a sixth material forming a back gate (LSG 11) coupled to a second portion of the channel (2) and a second portion of the source line (SL).
Note: connect/couple # directly/physically connect/couple.
PNG
media_image1.png
535
457
media_image1.png
Greyscale
PNG
media_image2.png
376
369
media_image2.png
Greyscale
Re claim 2, Endoh teaches, Figs. 1-2, [0166], a first dielectric layer (7, 8) connected between (horizontal & vertical directions) the front gate (12) and the first portion of the channel (2) and the first portion of the source line (SL).
Re claim 3, Endoh teaches, Figs. 1-2, a second dielectric layer (7, 8) connected between the back gate (11) and the second portion of the channel (2) and the second portion of the source line (SL).
Re claim 6, Endoh teaches, Figs. 1-2, insulator material (7, 8 around 5) connected between (in vertical direction) the storage region (5) and a first portion of the bit line (BL).
Re claim 7, Endoh teaches, [0166], Figs. 1-2, a dielectric layer (6) connected between the storage region (5) and the channel (2).
4. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Katsumata et al. (US 2010/0118610).
Re claim 1, Katsumata teaches, under BRI, Figs. 1-2, [0032, 0040-0042], a cell structure, comprising:
-a first material forming a bit line (BL);
-a second material forming a storage region (of charge storage layer 26) that is coupled to (via adjacent elements/layers) a first portion of the bit line (BL);
-a third material forming a channel (31, 34) that is connected (via adjacent elements/layers) to the storage region (26) and to second and third portions of the bit line (BL);
-a fourth material forming a source line (SL) that is connected to the channel (31, 34);
-a fifth material forming a front gate (SG) coupled to a first portion of the channel (31, 34) and a first portion of the source line (SL); and
-a sixth material forming a back gate (BG 12) coupled (via adjacent elements/layers) to a second portion of the channel (31, 34) and a second portion of the source line (SL).
Note: connect/couple # directly/physically connect/couple.
PNG
media_image3.png
668
458
media_image3.png
Greyscale
PNG
media_image4.png
754
546
media_image4.png
Greyscale
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claims 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Endoh in view of Chang et al. (US 2015/0103603).
The teachings of Endoh have been discussed above.
Re claims 4 & 5, Endoh teaches wherein the third material (2) has an N+ doping type [0168].
Endoh does not explicitly teach the second material has opposing doping type and has a P-doping type.
Chang teaches “floating gate is N-type or P-type doped polysilicon” [0006].
As taught by Chang, one of ordinary skill in the art would utilize & modify the above teaching to obtain the second material has opposing doping type and has a P-doping type as claimed, because it aids in increasing threshold voltage of control gate transistor & improving the reliability of the product.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chang in combination with Endoh due to above reason.
Conclusion
6. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kito et al. (US 2007/0252201, Figs. 1-4) discloses a semiconductor memory device including a plurality of memory strings, pillar shaped semiconductor between SL and BL.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 9/17/26
