Prosecution Insights
Last updated: May 29, 2026
Application No. 18/650,228

ELECTRONIC COMPONENT

Final Rejection §102
Filed
Apr 30, 2024
Priority
Nov 11, 2021 — JP 2021-184315 +1 more
Examiner
PATEL, RAKESH BHASKARBHAI
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co. Ltd.
OA Round
2 (Final)
92%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
874 granted / 954 resolved
+23.6% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
16 currently pending
Career history
976
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
55.4%
+15.4% vs TC avg
§102
20.5%
-19.5% vs TC avg
§112
21.7%
-18.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 954 resolved cases

Office Action

§102
DETAILED ACTION Response to Amendment Notice to Applicant The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. In the amendment dated 1/21/2026, claim 1 has been amended. Claims 1-17 are pending. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim Rejections - 35 USC § 102 Claims 1 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by WO 2013/005483 (of record). As per claims 1 and 6, WO2013/005483 discloses in Figs. 1-3 an electronic component (e.g. electronic component 10) comprising: as per claim 1, a body (e.g. laminate 12) having a first surface (e.g. lower surface S1) that is entirely of a dielectric material (Figs. 2-3; Lower surface S1 corresponds to a back side of dielectric layer 16l which is entirely made of a dielectric material. Electrode 40c is a separate element that is disposed on top of the first surface, however the surface itself is made entirely of the dielectric layer 16l as required by the claim.); and a plurality of electrodes (e.g. electrodes 34a-34c) disposed on the first surface, wherein each of a plurality of electrodes includes a base electrode (e.g. plating layers 42a-42c respectively) and a plating film (e.g. plating layers 46a-46c respectively) covering the base electrode, the plurality of electrodes include first-class electrodes (e.g. plated electrodes 34a and 34b) individually disposed on the first surface and connected to each other by a wiring line (e.g. coil conductors 18a-18e, electrode 26a, and coil conductors 20a-20e which collectively form “a wiring line”) passing through an inside of the body (Fig. 2, inside of laminate 12), and a second-class electrode (e.g. plated electrode 34c) individually disposed on the first surface and not connected to other electrodes of the plurality of electrodes (The plated electrode 34c is a ground electrode and is not directly connected to the electrodes 34a and 34b.), and the first surface includes a first region (e.g. region comprising layers 40a and 40b) on which each of the first-class electrodes are disposed (Electrode 34a is disposed on the region comprising layer 40a. Electrode 34b is disposed on the region comprising layer 40b.), and a second region (e.g. region comprising layer 40c) on which the second-class electrode is disposed (Electrode 34c is disposed on the region comprising layer 40c.), and the second region is more protruded than the first region (As stated in the Abstract, a thickness of T2 (which corresponds to a thickness of the region comprising layer 40c) is larger than a thickness of T1 (which corresponds to a thickness of the region comprising layers 40a and 40b.); and as per claim 6, wherein when viewed from a direction perpendicular to the first surface, the base electrode included in each of the first-class electrodes includes a corner portion having a pointed shape (Figs. 1-2; The laminate 12 is a rectangular shape and the electrodes 42a-42b each have a pointed shape at a bottom corner thereof when viewing the component in a vertical direction perpendicular to a horizontal direction of the lower surface S1). Allowable Subject Matter Claims 2-5 and 7-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant's arguments filed 1/21/2026 have been fully considered but they are not persuasive. Applicant states on page 6 of Applicant’s Remarks filed 1/21/2026 that WO ‘483 does not teach “a body having a first surface that is entirely of a dielectric material” as cited in amended claim 1. Lower surface S1 of laminate 12 is not entirely of a dielectric material, rather a conductive layer 40c is formed on the bottom of laminate 12. Thus, WO ‘483 describes lower surface S1 that includes a printed conductor which is not a dielectric material thus WO’ 483 fails to teach a body having a first surface that is entirely of a dielectric material, as recited by amended claim 1. The Examiner respectfully disagrees with the Applicant. The lower surface S1 indeed has a conductive layer 40c disposed on the bottom of laminate 12, however the layer 40c is not a part of the “first surface”. The first surface is constituted by a bottom side of dielectric layer 16l which is separate from the conductive layer 40c that is disposed thereon. Further in claim 1, the Applicant recites on line 3 “a plurality of electrodes disposed on the first surface”, which is contradictory to Applicant’s arguments as to why “the first surface” is not “entirely of a dielectric material”. Lastly, the Applicant even discloses in Fig. 13 of the Applicant’s instant specification lower surface 1 having electrodes T1 and T2 disposed thereon, thus for all of these reasons, Applicant’s arguments are not persuasive. The rejection to claims 1 and 6 has been sustained and repeated above, and this action has been made final. Conclusion THIS ACTION IS MADE FINAL Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAKESH PATEL whose telephone number is (571)272-0961. The examiner can normally be reached 9AM-5PM EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren-Baltzell can be reached at 571-272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RAKESH B PATEL/Primary Examiner, Art Unit 2843
Read full office action

Prosecution Timeline

Apr 30, 2024
Application Filed
Oct 21, 2025
Non-Final Rejection mailed — §102
Jan 21, 2026
Response Filed
Mar 31, 2026
Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
92%
Grant Probability
99%
With Interview (+13.3%)
2y 1m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 954 resolved cases by this examiner. Grant probability derived from career allowance rate.

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