DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The references listed in the Information Disclosure Statement(s) filed on 6/10/2024 have been considered by the examiner (see attached PTO-1449 form or PTO/SB/08A and 08B forms).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2003/0227968, hereinafter “Kim”).
Regarding claims 1 and 13, Kim discloses a system for determining a setting of an equalizer to be set, the system (Fig. 3) comprises:
the equalizer to be set (filtering unit 300, including FFF 310, Fig. 3, para. 0077);
a signal input connected with an input of the equalizer (input x[k] to FFF 310, Fig. 3);
a signal line connected with an output of the equalizer (output of FFF, Fig. 3);
a decision module connected with the signal line (detector 320, connected to output of FFF 310, Fig. 3); and
a setting module connected with the decision module (updater in main filtering unit 300 performs updating tap coefficients based on the error signals and the FFF input signal, para. 0085, Fig. 3),
wherein the equalizer is preset with pre-defined settings (initialize tap-coefficients, step 411, Fig. 4),
wherein the equalizer is configured to equalize an input signal with symbols received via the signal input so as to output an equalized signal via the signal line (calculate outputs of kth equalizer and detector y[k] and d[k], step S413, Fig. 4, para. 0090, and see FFF 310 of Fig. 3),
wherein the decision module includes circuitry configured to detect symbols (calculate output of detector d[k], step S413, Fig. 4, para. 0090),
wherein the setting module includes circuitry configured to set the equalizer based on the detected symbols (updater, para. 0077, and step S417, para. 0094), and
wherein the system is configured to detect the symbols and to set the equalizer based on the detected symbols (main filtering unit 300 updates tap coefficients according to error signals and input signals of the FFF, para. 0094, Figs. 3 and 4); and
repeating at least once the step of filtering the input signal, step of detecting symbols and the step of setting the equalizer (repeating equalization, para. 0095, see loop in Fig. 4).
Regarding claims 3 and 15, Kim further discloses the setting module is connected with the signal input and the decision module so as to set the equalizer based on the detected symbols and the input signal (updater updates the tap coefficients based on error signals (i.e. output of the detector) and input signals of the FFF, para. 0094).
Regarding claim 4, Kim further discloses the equalizer parameters are determined by processing the detected symbols, and wherein the equalizer is set by adjusting at least on equalizer parameter (updater updates tap coefficients based on error signals derived from the output of detector 320, see Fig. 3, para. 0094).
Regarding claim 5, Kim further discloses the input signal is an unknown signal (blind equalization with no training sequence, para. 0021, 0065).
Regarding claim 6, Kim further discloses the input signal is filtered by the equalizer without de-embedding the input signal previously (blind equalization does not use a training sequence, para. 0021, and input signal x[k] is directly input into filter 310, Fig. 3).
Regarding claim 7, Kim further discloses the equalizer is set without de-embedding the input signal (equalizer tap coefficients updated according to FFF input and error signals based on detector output, para. 0094, which do not require de-embedding the input signal).
Regarding claim 16, Kim further discloses the decision module includes circuitry configured to directly process the equalized signal in order to detect the symbols from the equalized signal (detector 320 directly receives output of main filtering 300, which is an “equalized signal”, see Fig. 3).
Allowable Subject Matter
Claims 2, 8-12, 14, 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID S HUANG whose telephone number is (571)270-1798. The examiner can normally be reached Monday - Friday, 9:00 a.m. - 5:00 p.m., EST.
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/David S Huang/Primary Examiner, Art Unit 2631 5/30/2026
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