DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 4/17/2026 with respect to claim 1 have been fully considered but they are not persuasive. Applicant argues it cannot be said that any node of switch SWB is electrically connected to TO1 because of intervening series switch SWA. Examiner respectfully disagrees since the source of SWB is electrically connected to node TO1 through switch SWA. When switch SWA is on, or when the voltage of TO1 is a diode voltage drop higher than the source of SWB, SWB is electrically connected to TO1. The rejection of claim 1 has been maintained below.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 are rejected under 35 U.S.C. 102a1 as being anticipated by Yeh (US 2021/0223838).
With respect to claim 1, Yeh discloses a power converter comprising, an AC/DC converter (Fig. 5 211) configured to generate a first secondary side output voltage (Fig. 5 voltage CT1) based on an AC input voltage (Fig. 1 voltage from 102) , the first secondary side output voltage being a first DC voltage (Fig. 5 voltage TO1); and a multi-port DC output circuit (Fig. 5 P1,P2,130) configured to receive the first secondary side output voltage from a first output node (Fig. 5 TO1) of the AC/DC converter and to provide respective DC output voltages (Fig. 5 voltages CT1,CT2) to a first DC output port (Fig. 5 C1) and a second DC output port (Fig. 5 C2), the multi-port DC output circuit comprising a first intermediate rail voltage switch (Fig. 5 SWA), a second intermediate rail voltage switch (Fig. 5 SWB), and a plurality of bus switches (Fig. 5 SW1,SW2), a body diode of the first intermediate rail voltage switch being forward biased (Fig. 5 body diode of SWA forward biased from TO1 to TO2 when 231 powers C2) with respect to the first secondary side output voltage, and a body diode of the second intermediate rail voltage switch (Fig. 5 body diode SWB reversed biased from TO1 to TO2 when 120 off) being reverse biased with respect to the first secondary side output voltage; wherein: a first node (Fig. 5 source SWA) of the first intermediate rail voltage switch is electrically connected to the first output node (Fig. 5 TO1) of the AC/DC converter; a first node (Fig. 5 drain SWB) of the second intermediate rail voltage switch is electrically connected (Fig. 5 drain SWB electrically connected to TO1 through SWA) to the first output node (Fig. 5 TO1) of the AC/DC converter; the plurality of bus switches are configured to control a routing (Fig. 5 SW1 routes PO1 to C1, SW2 routes PO1 to C2 from 120,SW2 routes PO2 to C1 through 120, SW2 routes PO2 to C2) of a first intermediate rail voltage and a second intermediate rail voltage (Fig. 5 voltage TO2) of the multi-port DC output circuit to the first DC output port and the second DC output port in response to a plurality of gate control signals (Fig. 5 gate signals from 131 and 132).
With respect to claim 2, Yeh discloses the power converter of claim 1, wherein: the plurality of bus switches are configured to control the routing of the first intermediate rail voltage and a second intermediate rail voltage of the multi-port DC output circuit to the first DC output port and the second DC output port based on respective desired output voltages (Fig 5 voltages at C1 and C2) of each of the first DC output port and the second DC output port.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 is rejected under 35 U.S.C. 103 as being unpatentable over Yeh (US 2021/0223838) in view of Shah (US 2021/0058005).
With respect to claim 3, Yeh discloses the power converter of claim 1 as set forth above, and remains silent as to the details of the gate drive which were well known before the effective filing date of the invention.
Shah discloses wherein a gate control signal of the plurality of gate control signals is generated using a charge pump circuit (Fig. 1 139) to control a first voltage switch (Fig. 1 138); and a voltage level of the gate control signal (Fig. 2 Vbus_ctrl) is configured to reduce an RDS (on) of the first voltage switch as compared to an RDS (on) of the first intermediate rail voltage switch when controlled by a lower voltage level of the gate control signal (Fig. 2 238 lower gate source voltage results in higher drain source resistance). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement a gate control signal of the plurality of gate control signals is generated using a charge pump circuit to control the first intermediate rail voltage switch; and a voltage level of the gate control signal is configured to reduce an RDS (on) of the first intermediate rail voltage switch as compared to an RDS (on) of the first intermediate rail voltage switch when controlled by a lower voltage level of the gate control signal, in order to drive the first intermediate rail voltage switch with a gate voltage higher than the source voltage to turn the switch fully on.
Claim(s) 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Yeh (US 2021/0223838) in view of Liu (US 2021/0021199).
With respect to claim 18, Yeh discloses the power converter of claim 1, further comprising: a transformer (Fig. 5 TX1) having a primary winding and a secondary winding, a first winding node of the primary winding being configured to be coupled to a voltage source (Fig. 5 voltage from 221) to receive an input voltage, the secondary winding being configured to provide the first secondary side output voltage (Fig. 5 voltage CT1); and a switching stage (Fig. 5 241) on the primary side, and a synchronous rectifier switch (Fig. 5 M1) electrically connected to the secondary winding. Yeh remains silent as to the details of the primary side switching which were well known before the effective filing date of the claimed invention.
Liu discloses a main switch (Fig. 1 114) coupled to a second winding node (Fig. 1 131) of the primary winding (Fig. 1 108) to control a current (Fig. 1 IQL) through the primary winding and an active clamp circuit (Fig. 1 116) electrically connected to the primary winding. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement a main switch coupled to a second winding node of the primary winding to control a current through the primary winding; an active clamp circuit electrically connected to the primary winding. In order to recirculate the primary current as turn off of the main switch in order to prevent inductive voltage spikes.
With respect to claim 19, Yeh in view of Liu make obvious the power converter of claim 18, wherein: the plurality of bus switches are configured to control (Fig. 5 130) a routing of the first intermediate rail voltage and the second intermediate rail voltage of the multi-port DC output circuit to the first DC output port (Fig. 5 C1) and the second DC output port (Fig. 5 C2) based on a respective desired output voltage (Fig. 5 desired output voltage at C1,C2) at each of the first DC output port and the second DC output port and in response to a portion of a switching cycle of the main switch.
Allowable Subject Matter
Claims 11-12 are allowed, while Claims 4-10 and 13-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. See the action dated 1/21/2026 for the reasons for the indication of allowable subject matter.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HARRY RAYMOND BEHM whose telephone number is (571)272-8929. The examiner can normally be reached M-F: 8-5 EST.
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/HARRY R BEHM/Primary Examiner, Art Unit 2838
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