DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The office acknowledges receipt of the following items(s) from the applicant: Information Disclosure Statement(s) (IDS) filed on 02/25/2025 and 04/30/2024. The references have been considered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 8, 10-14, 17, and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by CAO(US20230039854A1).
Regarding claim 1, CAO discloses
A phased array antenna unit (“A shared-aperture dual-band dual-polarized antenna array” [0009]), comprising: a first dielectric substrate (“a first dielectric substrate” [0052]); a radiator (“a low-frequency antenna element “ [0052]); and a plurality of decoupling metal patches (“the low-frequency antenna element is loaded with a filtering structure, which may […] reduce the coupling between different-frequency elements [0052]), wherein the plurality of decoupling metal patches and the radiator are arranged on a same surface of the first dielectric substrate (FIG.5, Part.15), and a side-by-side direction of the plurality of decoupling metal patches is perpendicular to a direction of an electric field intensity when the radiator is operating, and the radiator is arranged between any two adjacent decoupling metal patches (“two pairs of open-circuited coupling microstrip lines 31 are symmetrically arranged on the front and rear horizontal parts of the cross-shaped radiation slot. “ [0057]).
Regarding claim 2, CAO discloses
The phased array antenna unit according to claim 1, wherein the direction of the electric field intensity when the radiator is operating comprises a first electric field direction and a second electric field direction, and the first electric field direction is perpendicular to the second electric field direction (“the metasurface can be used as an artificial magnetic conductor reflector and used to make the antenna realize a unidirectional radiation pattern in a low profile” [0067]); the plurality of decoupling metal patches comprises a plurality of first decoupling metal patches arranged side by side along the first electric field direction (FIG.5, Part.15 & “ full-wavelength loop microstrip line 15 is respectively placed between the left and back sides of the first stacked patch 11, the right and back sides of the second stacked patch 12” [0061]), and a plurality of second decoupling metal patches arranged side by side along the second electric field direction (“Wherein two pairs of the open-circuited coupling microstrip lines are symmetrically arranged at front and back horizontal parts of the cross-shaped radiation slot,” [0012]); and the radiator is located between two adjacent first decoupling metal patches, and the radiator is also located between two adjacent second decoupling metal patches (“ the other two pairs of the coupling microstrip lines are symmetrically arranged at the front and rear horizontal parts of the cross-shaped radiation slot.”[0012])
Regarding claim 3, CAO discloses
The phased array antenna unit according to claim 1, wherein a decoupling metal patch comprises a strip patch (“ open-circuited coupling microstrip lines” [0022]), and a length direction of the strip patch are perpendicular to a side-by-side direction of a plurality of strip patches (FIG.5, Part.15), and a difference between length and width of the strip patch is greater than or equal to a set threshold (“a full-wavelength loop microstrip line 15” [0061] & FIG.5, Part.15, The examiner notes that the fixed circumference of the loop microstrip line necessitates that the difference between length and width of the strip patch must be greater than or equal to a set threshold with respect to the height of the radiator patch.)
Regarding claim 4, CAO discloses
The phased array antenna unit according to claim 3, wherein one or more strip patches are provided on a same side of the radiator (“ Each periodic patch unit is etched with four first square loop slots 71 that are symmetrical to each other” [0065]).
Regarding claim 5, CAO discloses
The phased array antenna unit according to claim 4, wherein lengths of the plurality of strip patches are equal (“ there are twelve full-wavelength loop microstrip lines 15 in total” [0061]), or the lengths of the plurality of strips are in an arithmetic sequence, and a strip patch with smallest length is placed close to the radiator among a plurality of strip patches provided on the same side of the radiator (FIG.5, Part.15).
Regarding claim 8, CAO discloses
The phased array antenna unit according to claim 1, further comprising a second dielectric substrate (“a second dielectric substrate 2” [0052]), a feed layer (“a third dielectric substrate 3,” [0052]), a via layer (“a metal via” [0062]), a first feed probe (“a second feeding pad“[0016]) and a second feed probe (“ first feeding pad“ [0011]); wherein the second dielectric substrate is disposed below the first dielectric substrate (FIG.1, Parts.1&2), the first feed probe is disposed on a surface of the second dielectric substrate facing the first dielectric substrate (“each high-frequency feeding line is connected to a second feeding pad on the upper surface of the second dielectric substrate 2 “ [0062]), and the first feed probe is coupled to the radiator for power feeding (“The second feeding pad is connected to the inner conductor pin of the second coaxial line.” [0062]); and the feed layer is disposed below the second dielectric substrate (FIG.1, Parts.2&3), the via layer is disposed between the second dielectric substrate and the feed layer, and the second feed probe passes through the via layer and is electrically connected to the feed layer(“the second ground pad is connected to a first ground plane on an upper surface of the third dielectric substrate through a metal via.”[0016]), and the second feed probe also passes through the second dielectric substrate and is electrically connected to the first feed probe (“ The second coaxial outer conductor is connected to the second ground pad 37” [0062])
Regarding claim 10, CAO discloses
A phased array antenna (“A shared-aperture dual-band dual-polarized antenna array” [0009]), comprising a plurality of phased array antenna units (FIG.1, Part.1), wherein each of the plurality of the phased array antenna units comprises: a first dielectric substrate (“a first dielectric substrate” [0052]); a radiator (“a low-frequency antenna element “ [0052]); and a plurality of decoupling metal patches (“the low-frequency antenna element is loaded with a filtering structure, which may […] reduce the coupling between different-frequency elements [0052]), wherein the plurality of decoupling metal patches and the radiator are arranged on a same surface of the first dielectric substrate (FIG.5, Part.15), and a side-by-side direction of the plurality of decoupling metal patches is perpendicular to a direction of an electric field intensity when the radiator is operating, and the radiator is arranged between any two adjacent decoupling metal patches; and wherein adjacent radiators share a same decoupling patch (“two pairs of open-circuited coupling microstrip lines 31 are symmetrically arranged on the front and rear horizontal parts of the cross-shaped radiation slot. “ [0057]).
Regarding claim 11, CAO discloses
The phased array antenna according to claim 10, wherein the direction of the electric field intensity when the radiator is operating comprises a first electric field direction and a second electric field direction, and the first electric field direction is perpendicular to the second electric field direction (“the metasurface can be used as an artificial magnetic conductor reflector and used to make the antenna realize a unidirectional radiation pattern in a low profile” [0067]); the plurality of decoupling metal patches comprises a plurality of first decoupling metal patches arranged side by side along the first electric field direction (FIG.5, Part.15 & “ full-wavelength loop microstrip line 15 is respectively placed between the left and back sides of the first stacked patch 11, the right and back sides of the second stacked patch 12” [0061]), and a plurality of second decoupling metal patches arranged side by side along the second electric field direction (“Wherein two pairs of the open-circuited coupling microstrip lines are symmetrically arranged at front and back horizontal parts of the cross-shaped radiation slot,” [0012]); and the radiator is located between two adjacent first decoupling metal patches, and the radiator is also located between two adjacent second decoupling metal patches (“ the other two pairs of the coupling microstrip lines are symmetrically arranged at the front and rear horizontal parts of the cross-shaped radiation slot.”[0012]).
Regarding claim 12, CAO discloses
The phased array antenna according to claim 10, wherein a decoupling metal patch comprises a strip patch (“ open-circuited coupling microstrip lines” [0022]), and a length direction of the strip patch are perpendicular to a side-by-side direction of a plurality of strip patches (FIG.5, Part.15), and a difference between length and width of the strip patch is greater than or equal to a set threshold (“a full-wavelength loop microstrip line 15” [0061] & FIG.5, Part.15, The examiner notes that the fixed circumference of the loop microstrip line necessitates that the difference between length and width of the strip patch must be greater than or equal to a set threshold with respect to the height of the radiator patch).
Regarding claim 13, CAO discloses
The phased array antenna according to claim 12, wherein one or more strip patches are provided on a same side of the radiator (“ Each periodic patch unit is etched with four first square loop slots 71 that are symmetrical to each other” [0065]).
Regarding claim 14, CAO discloses
The phased array antenna according to claim 13, wherein lengths of the plurality of strip patches are equal (“ there are twelve full-wavelength loop microstrip lines 15 in total” [0061]), or the lengths of the plurality of strips are in an arithmetic sequence, and a strip patch with smallest length is placed close to the radiator among a plurality of strip patches provided on the same side of the radiator (FIG.5, Part.15).
Regarding claim 17, CAO discloses
The phased array antenna according to claim 10, further comprising a second dielectric substrate (“a second dielectric substrate 2” [0052]), a feed layer (“a third dielectric substrate 3,” [0052]), a via layer (“a metal via” [0062]), a first feed probe (“a second feeding pad“[0016]) and a second feed probe (“ first feeding pad“ [0011]); wherein the second dielectric substrate is disposed below the first dielectric substrate (FIG.1, Parts.1&2), the first feed probe is disposed on a surface of the second dielectric substrate facing the first dielectric substrate (“each high-frequency feeding line is connected to a second feeding pad on the upper surface of the second dielectric substrate 2 “ [0062]), and the first feed probe is coupled to the radiator for power feeding (“The second feeding pad is connected to the inner conductor pin of the second coaxial line.” [0062]); and the feed layer is disposed below the second dielectric substrate (FIG.1, Parts.2&3), the via layer is disposed between the second dielectric substrate and the feed layer, and the second feed probe passes through the via layer and is electrically connected to the feed layer (“the second ground pad is connected to a first ground plane on an upper surface of the third dielectric substrate through a metal via.”[0016]), and the second feed probe also passes through the second dielectric substrate and is electrically connected to the first feed probe (“ The second coaxial outer conductor is connected to the second ground pad 37” [0062])
Regarding claim 19, CAO discloses
A radar system, comprising a phased array antenna (“A shared-aperture dual-band dual-polarized antenna array” [0009]), wherein the phased array antenna comprises a plurality of phased array antenna unit (FIG.1, Part.1), and each of the plurality of the phased array antenna comprises: a first dielectric substrate (“a first dielectric substrate” [0052]); a radiator (“a low-frequency antenna element “ [0052]); and a plurality of decoupling metal patches (“The low-frequency antenna element is loaded with a filtering structure, which may […] reduce the coupling between different-frequency elements [0052]), wherein the plurality of decoupling metal patches and the radiator are arranged on a same surface of the first dielectric substrate (FIG.5, Part.15), and a side-by-side direction of the plurality of decoupling metal patches is perpendicular to a direction of an electric field intensity when the radiator is operating, and the radiator is arranged between any two adjacent decoupling metal patches (“two pairs of open-circuited coupling microstrip lines 31 are symmetrically arranged on the front and rear horizontal parts of the cross-shaped radiation slot. “ [0057]); and wherein adjacent radiators share a same decoupling patch (“a full-wavelength loop microstrip line 15 is respectively placed between the left and back sides of the first stacked patch 11” [0061]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 6-7, 9, 15-16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over CAO(US20230039854A1) in view of DING(CN112072294B)
Regarding claim 6, CAO discloses all the limitations of claim 1. CAO does not appear to explicitly disclose wherein the decupling patches comprise isosceles trapezoidal patches. DING discloses wherein, the decoupling metal patch comprises an isosceles trapezoidal patch (“our isosceles trapezoidal metal patches of the same size 22-01-2026 - Page 8 disposed on the four sides of the square metal patch” [n0013]).
DING teaches in the same field of endeavor of phased array design. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify CAO with the teachings of DING to incorporate the features of isosceles trapezoidal patches so as to gain the advantage of improving bandwidth [n0015, DING]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 7, CAO as modified by DING discloses all the limitations of claim 6. CAO does not appear to explicitly disclose wherein the decupling patches comprise isosceles trapezoidal patches. DING discloses wherein, an upper bottom of the isosceles trapezoidal patch is set toward the radiator (FIG.2, Part.4).
DING teaches in the same field of endeavor of phased array design. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify CAO with the teachings of DING to incorporate the feature wherein the upper bottom of the isosceles trapezoidal patch is set toward the radiator so as to gain the advantage of improving gain [n0005, DING]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 9, CAO discloses all the limitations of claim 1. CAO discloses wherein, a decoupling metal patch is provided on each side of the […] radiator (“ach stacked patch is surrounded by four symmetric full-wavelength loop microstrip lines 15” [0061]).
CAO does not appear to explicitly disclose wherein radiator is rectangular. DING discloses wherein, the radiator is a rectangular radiator (“The radiator includes a square metal patch” [n0013]).
DING teaches in the same field of endeavor of phased array design. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify CAO with the teachings of DING to incorporate the feature wherein the radiator is a rectangular radiator so as to gain the advantage of improving gain [n0005, DING]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 15, CAO discloses all the limitations of claim 10. CAO does not appear to explicitly disclose wherein the decupling patches comprise isosceles trapezoidal patches. DING discloses wherein, the decoupling metal patch comprises an isosceles trapezoidal patch (“our isosceles trapezoidal metal patches of the same size 22-01-2026 - Page 8 disposed on the four sides of the square metal patch” [n0013]).
DING teaches in the same field of endeavor of phased array design. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify CAO with the teachings of DING to incorporate the features of isosceles trapezoidal patches so as to gain the advantage of improving bandwidth [n0015, DING]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way
Regarding claim 16, CAO as modified by DING discloses all the limitations of claim 15. CAO does not appear to explicitly disclose wherein the decupling patches comprise isosceles trapezoidal patches. DING discloses wherein, an upper bottom of the isosceles trapezoidal patch is set toward the radiator (FIG.2, Part.4).
DING teaches in the same field of endeavor of phased array design. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify CAO with the teachings of DING to incorporate the feature wherein the upper bottom of the isosceles trapezoidal patch is set toward the radiator so as to gain the advantage of improving gain [n0005, DING]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Regarding claim 18, CAO discloses all the limitations of claim 10. CAO discloses wherein, a decoupling metal patch is provided on each side of the […] radiator.
CAO does not appear to explicitly disclose wherein radiator is rectangular. DING discloses wherein, the radiator is a rectangular radiator (“The radiator includes a square metal patch” [n0013]).
DING teaches in the same field of endeavor of phased array design. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify CAO with the teachings of DING to incorporate the feature wherein the radiator is a rectangular radiator so as to gain the advantage of improving gain [n0005, DING]. Also, since it has been held that if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill (MPEP 2143).
Documents Considered but not Relied Upon
The prior art made of record and not relied upon is considered pertinent to the applicant’s Disclosure.
Che(US11600927B2) is considered analogous art to the instant application as it discloses in [Col.3, ll.23-25] “the coupling-offset path branch is placed between the radiating stacked microstrip patch elements which need decoupling.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CLAYTON PAUL RIDDER whose telephone number is (571)272-2771. The examiner can normally be reached Monday thru Friday ET.
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/C.P.R./Examiner, Art Unit 3646
/JACK W KEITH/Supervisory Patent Examiner, Art Unit 3646