Prosecution Insights
Last updated: October 02, 2026
Application No. 18/652,449

POWER SUPPLY CONFIGURATION BASED POWER CAPPING

Final Rejection §103
Filed
May 01, 2024
Examiner
CLEARY, THOMAS J
Art Unit
2175
Tech Center
2100 — Computer Architecture & Software
Assignee
International Business Machines Corporation
OA Round
4 (Final)
73%
Grant Probability
Favorable
5-6
OA Rounds
2m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
549 granted / 755 resolved
+17.7% vs TC avg
Strong +16% interview lift
Without
With
+15.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
23 currently pending
Career history
779
Total Applications
across all art units

Statute-Specific Performance

§101
3.8%
-36.2% vs TC avg
§103
35.0%
-5.0% vs TC avg
§102
22.7%
-17.3% vs TC avg
§112
27.1%
-12.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 755 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim Interpretation The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. The broadest reasonable interpretation of a system (or apparatus or product) claim having structure that performs a function, which only needs to occur if a condition precedent is met, requires structure for performing the function should the condition occur. The system claim interpretation differs from a method claim interpretation because the claimed structure must be present in the system regardless of whether the condition is met and the function is actually performed. See MPEP 2111.04(II). "[i]f the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed" (quotation omitted). Ex parte Schulhauser, Appeal 2013-007847 (PTAB April 28, 2016). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-25 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application Publication Number 2008/0320322 to Green et al. (“Green”), and US Patent on Number 9,722,422 to Jagota et al. (“Jagota”). In reference to Claim 1, Green discloses a method for power supply configuration based power capping (See Abstract and Paragraphs 43-44 and 49), the method comprising: determining, by a power management controller (See Figure 2 Numbers 220 and 230a-230d and Paragraph 28) of a computing system (See Figure 2 Number 200 and Paragraph 25) that includes one or more power supply units (See Figure 2 Numbers 202a-202d and Paragraph 25), power supply configuration information for the computing system, wherein the power supply configuration information identifies a total number of the power supply units (See Paragraphs 47 and 60), a power supply type for each of the power supply units (See Paragraph 48 [power supply capacity value]), and a power supply input voltage for each of the power supply units (See Paragraphs 29-30), wherein the computing system comprises processing circuitry (See Paragraphs 6, 25-26, 34, and 43); and wherein the one or more power supply units comprise circuitry (See Paragraphs 25 and 48); determining, by the power management controller based on the power supply configuration information, a system power cap for the computing system (See Paragraphs 47-52), wherein the system power cap is determined using: a system level power supply type determined for mixed power supply types (See Figure 3 and Paragraphs 17 and 48), and a system level power supply input voltage determined for mixed power supply input voltages (See Paragraphs 29-30); and controlling, by the power management controller, power consumption of the computing system based on the system power cap (See Paragraphs 50-51). However, Green does not explicitly disclose the system level power supply type determined, for mixed power supply types, using a priority list of power supply types, and the system level power supply input voltage determined, for mixed power supply input voltages, using a priority list of power supply input voltages. Jagota discloses a plurality of power supplies (See Figure 1 Numbers 140, 150, and 160) for a computer system (See Column 3 Lines 51-56), and determining a system power cap (See Column 6 Lines 49-63) using a system level power supply type determined, for mixed power supply types (See Column 1 Lines 47-53, [rectifier type and DC-DC converter type]), using a priority list of power supply types (See Column 5 Line 14 – Column 6 Line 6), and a system level power supply input voltage determined, for mixed power supply input voltages (See Column 1 Lines 47-53 and Column 4 Line 52 – Column 5 Line 13 [AC mains voltage, AC generator voltage, fixed DC battery voltage, variable DC solar voltage, variable DC wind voltage; AC and DC are, by definition, different voltages, and fixed and variable voltages are different]), using a priority list of power supply input voltages (See Column 5 Line 14 – Column 6 Line 6). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Green using the power supply priority lists of Jagota, resulting in the invention of Claim 1, in order to yield the predictable result of making the system able to operate using power sources that differ fundamentally in type and allow selection of power sources based on overall operating efficiency, reliability, or environmental desirability (See Column 2 Line 58 – Column 3 Line 16 of Jagota). In reference to Claim 2, Green and Jagota disclose the limitations as applied to Claim 1 above. Green further discloses determining, by the power management controller based on the power supply type for each of the power supply units, a system level power supply type, wherein the system power cap for the computing system is determined based on the system level power supply type (See Paragraphs 48-49). In reference to Claim 3, Green and Jagota disclose the limitations as applied to Claim 1 above. Green further discloses determining, by the power management controller based on the power supply input voltage for each of the power supply units, a system level power supply input voltage, wherein the system power cap for the computing system is determined based on the system power supply input voltage (See Paragraphs 29-30 and 49-50). In reference to Claim 4, Green and Jagota disclose the limitations as applied to Claim 1 above. Green further discloses that the system power cap comprises a redundant power limit when the computing system includes one or more redundant power supply units (See Paragraphs 48 and 55-57). In reference to Claim 5, Green and Jagota disclose the limitations as applied to Claim 1 above. Green further discloses that the system power cap comprises a non-redundant power limit when the computing system does not include a redundant power supply unit (See Paragraphs 47-49 and 55 [system can operate with only a single power supply unit and no redundancy when there are two power supply units and one is turned off or fails]). In reference to Claim 6, Green and Jagota disclose the limitations as applied to Claim 1 above. Green further discloses that further comprising: determining, by the power management controller after a power supply unit has been added to or removed from the computing system, an updated version of the power supply configuration information (See Paragraphs 50-53 and 60). In reference to Claim 7, Green and Jagota disclose the limitations as applied to Claim 6 above. Green further discloses that determining, by the power management controller based on the updated version of the power supply configuration information, an updated system power cap for the computing system (See Paragraphs 49, 51, and 55); and controlling, by the power management controller, power consumption of the computing system based on the updated system power cap (See Paragraphs 50-52). In reference to Claim 8, Green and Jagota disclose the limitations as applied to Claim 1 above. Green further discloses that determining whether a combination of the total number of power supply units, the system level power supply type, and the power supply input voltage for each of the power supply units indicates a valid power supply configuration (See Paragraphs 29-30, 47-50, and 60); and generating a warning indicating an invalid power supply configuration (See Paragraphs 60-61 [claims do not provide any limitations on how an invalid configuration is determined]). In reference to Claim 9, Green discloses an apparatus comprising: a processing device comprising processing circuitry (See Paragraphs 37-40); and memory operatively coupled to the processing device, wherein the memory stores computer program instructions that, when executed, cause the processing device to (See Paragraphs 37-40): determine power supply configuration information for a computing system (See Figure 2 Number 200 and Paragraph 25), the power supply configuration information identifying a total number of power supply units (See Figure 2 Numbers 202a-202d and Paragraphs 25, 47, and 60), a power supply type for each of the power supply units (See Paragraph 48 [power supply capacity value]), and a power supply input voltage for each of the power supply units (See Paragraphs 29-30), wherein the power supply units comprise circuitry (See Paragraphs 25 and 48); determine, based on the power supply configuration information, a system power cap for the computing system (See Paragraphs 47-52), wherein the system power cap is determined, using a rules-based framework (See Figure 4 and Paragraphs 47-52 [flowchart process is a rules-based framework]), for the computer system operating in a redundant mode (See Paragraphs 18, 48, and 55 [more than one converter is available]) and operating in a non-redundant mode (See Paragraphs 18, 48, and 55 [more than one converter is not available]), wherein the rules-based framework includes: determine, for mixed power supply types, a system level power supply type (See Figure 3 and Paragraphs 17 and 48), and determine, for mixed power supply input voltages, a system level power supply input voltage for the computing system (See Paragraphs 29-30); and controlling, by the power management controller, power consumption of the computing system based on the system power cap (See Paragraphs 50-51). However, Green does not explicitly disclose that the rules-based framework includes: a priority list of power supply types used to determine, for mixed power supply types, a system level power supply type (See Figure 3 and Paragraphs 17 and 48), and a priority list of power supply input voltages used to determine, for mixed power supply input voltages, a system level power supply input voltage for the computing system. Jagota discloses a plurality of power supplies (See Figure 1 Numbers 140, 150, and 160) for a computer system (See Column 3 Lines 51-56), and determining a system power cap (See Column 6 Lines 49-63) using a system level power supply type determined, for mixed power supply types (See Column 1 Lines 47-53, [rectifier type and DC-DC converter type]), using a priority list of power supply types (See Column 5 Line 14 – Column 6 Line 6), and a system level power supply input voltage determined, for mixed power supply input voltages (See Column 1 Lines 47-53 and Column 4 Line 52 – Column 5 Line 13 [AC mains voltage, AC generator voltage, fixed DC battery voltage, variable DC solar voltage, variable DC wind voltage; AC and DC are, by definition, different voltages, and fixed and variable voltages are different]), using a priority list of power supply input voltages (See Column 5 Line 14 – Column 6 Line 6). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Green using the power supply priority lists of Jagota, resulting in the invention of Claim 9, in order to yield the predictable result of making the system able to operate using power sources that differ fundamentally in type and allow selection of power sources based on overall operating efficiency, reliability, or environmental desirability (See Column 2 Line 58 – Column 3 Line 16 of Jagota). In reference to Claim 10, Green and Jagota disclose the limitations as applied to Claim 9 above. Green further discloses that the memory further stores computer program instructions that, when executed, cause the processing device to: determine, based on the power supply type for each of the power supply units, a system level power supply type, wherein the system power cap for the computing system is determined based on the system level power supply type (See Paragraphs 48-49). Jagota further discloses that the system level power supply type is determined from the priority list of power supply types when the power supply types are mixed (See Column 5 Line 14 – Column 6 Line 6). In reference to Claim 11, Green and Jagota disclose the limitations as applied to Claim 9 above. Green further discloses the memory further stores computer program instructions that, when executed, cause the processing device to: determine, based on the power supply input voltage for each of the power supply units, a system level power supply input voltage, wherein the system power cap for the computing system is determined based on the system power supply input voltage (See Paragraphs 29-30 and 49-50). Jagota further discloses that the system level power supply input voltage is determined from the priority list of power supply input voltages when the power supply input voltages are mixed (See Column 1 Lines 47-53 and Column 4 Line 52 – Column 5 Line 13). In reference to Claim 12, Green and Jagota disclose the limitations as applied to Claim 9 above. Green further discloses that the system power cap comprises a redundant power limit when the computing system includes one or more redundant power supply units (See Paragraphs 48 and 55-57). In reference to Claim 13, Green and Jagota disclose the limitations as applied to Claim 9 above. Green further discloses that the system power cap comprises a non-redundant power limit when the computing system does not include a redundant power supply unit (See Paragraphs 47-49 and 55 [system can operate with only a single power supply unit and no redundancy when there are two power supply units and one is turned off or fails]). In reference to Claim 14, Green and Jagota disclose the limitations as applied to Claim 1 above. Green further discloses that the memory further stores computer program instructions that, when executed, cause the processing device to: determine, after a power supply unit has been added to or removed from the computing system, an updated version of the power supply configuration information (See Paragraphs 50-53 and 60). In reference to Claim 15, Green and Jagota disclose the limitations as applied to Claim 14 above. Green further discloses that the memory further stores computer program instructions that, when executed, cause the processing device to: determine, based on the updated version of the power supply configuration information, an updated system power cap for the computing system (See Paragraphs 49, 51, and 55); and control power consumption of the computing system based on the updated system power cap (See Paragraphs 50-52). Claims 16 and 21 recite limitations which are substantially equivalent to those of Claim 1 and are rejected under similar reasoning. Green further discloses a computer program product comprising a computer readable storage medium (See Paragraphs 37-40), as in Claim 16; and one or more power consuming components comprising processing circuitry (See Paragraphs 2-4, 19, and 21), as in Claim 21. It is noted that Claims 16 and 21 are broader than Claim 1, in that they only require that the system power cap is determined using at least one of, but not necessarily both of, the priority list of power supply types or the priority list of power supply input voltages. Claims 17 and 22 recite limitations which are substantially equivalent to those of Claim 2 and are rejected under similar reasoning. Claims 18 and 23 recite limitations which are substantially equivalent to those of Claim 3 and are rejected under similar reasoning. Claim 19 recites limitations which are substantially equivalent to those of Claim 4 and are rejected under similar reasoning. Claim 20 recites limitations which are substantially equivalent to those of Claim 5 and are rejected under similar reasoning. In reference to Claim 24, Green discloses a method for power supply configuration based power capping (See Abstract and Paragraphs 43-44 and 49), the method comprising: determining, by a power management controller (See Figure 2 Numbers 220 and 230a-230d and Paragraph 28) of a computing system (See Figure 2 Number 200 and Paragraph 25) that includes one or more power supply units (See Figure 2 Numbers 202a-202d and Paragraph 25), power supply configuration information for the computing system, including a total number of the power supply units (See Paragraphs 47 and 60), a power supply type for each of the power supply units (See Paragraph 48 [power supply capacity value]), and a power supply input voltage for each of the power supply units (See Paragraphs 29-30), wherein the computing system comprises processing circuitry (See Paragraphs 6, 25-26, 34, and 43); and wherein the one or more power supply units comprise circuitry (See Paragraphs 25 and 48); determining, by the power management controller based on the power supply configuration information, a system power cap for the computing system (See Paragraphs 47-52), wherein the system power cap is determined, using a rules-based framework (See Figure 4 and Paragraphs 47-52 [flowchart process is a rules-based framework]), and wherein the rules-based framework includes: determine, for mixed power supply types, a system level power supply type (See Figure 3 and Paragraphs 17 and 48), and determine, for mixed power supply input voltages, a system level power supply input voltage for the computing system (See Paragraphs 29-30); controlling, by the power management controller, power consumption of the computing system based on the system power cap (See Paragraphs 50-51); and updating, by the power management controller in response to a power supply unit being added to or removed from the computing system, the system power cap (See Paragraphs 50-53 and 60);. However, Green does not explicitly disclose that the rules-based framework includes: a priority list of power supply types used to determine, for mixed power supply types, a system level power supply type (See Figure 3 and Paragraphs 17 and 48), and a priority list of power supply input voltages used to determine, for mixed power supply input voltages, a system level power supply input voltage for the computing system. Jagota discloses a plurality of power supplies (See Figure 1 Numbers 140, 150, and 160) for a computer system (See Column 3 Lines 51-56), and determining a system power cap (See Column 6 Lines 49-63) using a system level power supply type determined, for mixed power supply types (See Column 1 Lines 47-53, [rectifier type and DC-DC converter type]), using a priority list of power supply types (See Column 5 Line 14 – Column 6 Line 6), and a system level power supply input voltage determined, for mixed power supply input voltages (See Column 1 Lines 47-53 and Column 4 Line 52 – Column 5 Line 13 [AC mains voltage, AC generator voltage, fixed DC battery voltage, variable DC solar voltage, variable DC wind voltage; AC and DC are, by definition, different voltages, and fixed and variable voltages are different]), using a priority list of power supply input voltages (See Column 5 Line 14 – Column 6 Line 6 of Jagota). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Green using the power supply priority lists of Jagota, resulting in the invention of Claim 24, in order to yield the predictable result of making the system able to operate using power sources that differ fundamentally in type and allow selection of power sources based on overall operating efficiency, reliability, or environmental desirability (See Column 2 Line 58 – Column 3 Line 16).It is noted that Claim 24 is a method claim reciting the contingent limitation “in response to…”. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed by the prior art. In reference to Claim 25, Green and Jagota disclose the limitations as applied to Claim 24 above. Green further discloses determining, by the power management controller based on the power supply type for each of the power supply units, a system level power supply type, wherein the system power cap for the computing system is determined based on the system level power supply type (See Paragraphs 48-49). Claim(s) 16-23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Green, and US Patent Application Publication Number 2017/0222434 to Yoshikoshi et al. (“Yoshikoshi”). In reference to Claim 16, Green discloses a computer program product comprising a computer readable storage medium (See Paragraphs 37-40), wherein the computer readable storage medium comprises computer program instructions that, when executed by a processing device comprising processing circuitry: determine power supply configuration information for a computing system (See Figure 2 Number 200 and Paragraph 25) including a total number of power supply units (See Figure 2 Numbers 202a-202d and Paragraphs 25, 47, and 60), a power supply type for each of the power supply units (See Paragraph 48 [power supply capacity value]), and a power supply input voltage for each of the power supply units (See Paragraphs 29-30), wherein the power supply units comprise circuitry (See Paragraphs 25 and 48); determine, based on the power supply configuration information, a system power cap for the computing system (See Paragraphs 47-52), wherein the system power cap is determined using at least one of: a system level power supply type determined for mixed power supply types (See Figure 3 and Paragraphs 17 and 48), or a system level power supply input voltage determined for mixed power supply input voltages (See Paragraphs 29-30); and control power consumption of the computing system based on the system power cap (See Paragraphs 50-51). However, Green does not explicitly disclose the system level power supply type determined, for mixed power supply types, using a priority list of power supply types, or the system level power supply input voltage determined, for mixed power supply input voltages, using a priority list of power supply input voltages. Yoshikoshi discloses a plurality of power supplies (See Figure 2 Numbers 12a-12c) for a computer system (See Paragraphs 13-14), and using a system level power supply type determined, for mixed power supply types (See Paragraphs 23, 31, and 41), using a priority list of power supply types (See Figure 3 and Paragraphs 38-41). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Green using the power supply priority list of power supply types of Yoshikoshi, resulting in the invention of Claim 16, in order to allow the user to determine which power supply type should be used when multiple are available (See Paragraph 33 of Yoshikoshi). In reference to Claim 17, Green and Yoshikoshi disclose the limitations as applied to Claim 16 above. Green further discloses determine, based on the power supply type for each of the power supply units, a system level power supply type, wherein the system power cap for the computing system is determined based on the system level power supply type (See Paragraphs 48-49). In reference to Claim 18, Green and Yoshikoshi disclose the limitations as applied to Claim 16 above. Green further discloses determine, based on the power supply input voltage for each of the power supply units, a system level power supply input voltage, wherein the system power cap for the computing system is determined based on the system power supply input voltage (See Paragraphs 29-30 and 49-50). In reference to Claim 19, Green and Yoshikoshi disclose the limitations as applied to Claim 16 above. Green further discloses that the system power cap comprises a redundant power limit when the computing system includes one or more redundant power supply units (See Paragraphs 48 and 55-57). In reference to Claim 20, Green and Yoshikoshi disclose the limitations as applied to Claim 16 above. Green further discloses that the system power cap comprises a non-redundant power limit when the computing system does not include a redundant power supply unit (See Paragraphs 47-49 and 55 [system can operate with only a single power supply unit and no redundancy when there are two power supply units and one is turned off or fails]). Claim 21 recites limitations which are substantially equivalent to those of Claim 16 and is rejected under similar reasoning. Green further discloses one or more power consuming components comprising processing circuitry (See Paragraphs 2-4, 19, and 21). Claim 22 recites limitations which are substantially equivalent to those of Claim 17 and is rejected under similar reasoning. Claim 23 recites limitations which are substantially equivalent to those of Claim 18 and is rejected under similar reasoning. Response to Arguments Applicant’s arguments, filed 14 and 21 July 2026, with respect to Claims 1-25 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to THOMAS J CLEARY whose telephone number is (571)272-3624. The examiner can normally be reached Monday-Friday 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Jung can be reached at 571-270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THOMAS J. CLEARY/Primary Examiner, Art Unit 2175
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Prosecution Timeline

Show 9 earlier events
Feb 25, 2026
Examiner Interview Summary
Mar 23, 2026
Request for Continued Examination
Mar 26, 2026
Response after Non-Final Action
Apr 14, 2026
Non-Final Rejection mailed — §103
Jul 14, 2026
Response Filed
Jul 15, 2026
Examiner Interview Summary
Jul 15, 2026
Applicant Interview (Telephonic)
Sep 08, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
73%
Grant Probability
88%
With Interview (+15.7%)
2y 7m (~2m remaining)
Median Time to Grant
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