Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 10 recites “a fourth die” however does not recite a third die. It is unclear if a third die is required or if in fact only three dies are required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-11, 14-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kaeriyama (US 20130055052).
With respect to claim 1 Kaeriyama teaches a system comprising: a first gate driver (GD1) comprising: a first die (CHP 1) including a first controller (CT1, DT1) for controlling a gate (see for example Fig. 52) of a first power switch; a second die (CHP0/2) arranged with the first die and galvanically isolated (see ISO1-4) from the first die, the second die comprising communication circuity (see Tx/Rx elements); wherein the first die includes a first connection element (see windings coils see for example Fig. 52 RX elements) and the second die includes a second connection element (see windings coils Tx1/3), wherein the first and second connection elements are configured to provide a communication channel (paragraph 0107) between the galvanically isolated first die and second die; and wherein the second die is coupled to at least one communication terminal (see terminals inputting into Tx 3) for coupling to a second gate driver (GD2) comprising a second controller (CT2 DT2), the second controller for controlling a gate of a second power switch (PTr2); and wherein the communication channel provides for communication between the first controller and the second controller (see paragraph 0235-236: Fig. 46).
With respect to claim 2 Kaeriyama teaches the second die is stacked (see paragraph 0191-192) with the first die and a galvanic isolation layer (see isolation layer see for example Fig. 34) therebetween provides said galvanic isolation, and wherein the first connection element comprises a first coil (L11) and the second connection element comprises a second coil (L12), wherein the communication channel is provided by the first and second coils being configured to provide an inductive communication channel (paragraph 0099) through the galvanic isolation layer.
With respect to claim 3 Kaeriyama teaches the second die is arranged adjacent the first die, and wherein the first connection element and the second connection element comprise corresponding parts and further teaches the known use of optical isolation (see Fig. 39
With respect to claim 4 Kaeriyama teaches the second die is arranged adjacent the first die, and wherein one of the first connection element comprises a first capacitor arrangement (paragraph 0099-100), wherein the communication channel comprises a capacitive communication channel further provided by one or more bondwires extending between the first capacitor arrangement and the second capacitor arrangement.
With respect to claim 5 Kaeriyama teaches the first die includes a first supply voltage (VDD1) terminal for receiving a first supply voltage (VDD) and a first reference terminal for receiving a first reference voltage; and the second die (DTX associated with each die) includes a second supply voltage terminal (paragraph 0173-174) for receiving a second supply voltage and a second reference terminal for receiving a second reference voltage, wherein one of the first reference voltage are different and the first supply voltage and the second supply voltage are different (see VDD and 4VDC).
With respect to claim 6 Kaeriyama teaches the second die is configured to receive at least a fault signal (ER2) from the second controller of the second gate driver via the communication terminal, wherein the second die is configured to communicate (via ISO3 and ISO4 see Fig. 51) the occurrence of a fault indicated by receipt of the fault signal to the first controller via the communication channel.
With respect to claim 7 Kaeriyama teaches the first gate driver comprises a package including a third die (CHP2), wherein the third die is galvanically isolated (see for example Fig. 51) from the first die and the second die and is communicatively coupled to the first die, wherein the third die includes interface circuitry to provide an interface to a microcontroller.
With respect to claim 8 Kaeriyama teaches the first controller of the first die is configured to operate in a first high voltage domain (see VIN1: Fig. 57) comprising the voltage domain of the first power switch; and the communication circuitry of the second die is configured to operate in a second high voltage domain (see VIN2, paragraph 0272), different to the first high voltage domain, and comprising the voltage domain of the second power switch; and the interface circuitry of the third die is configured to operate in a low voltage domain.
With respect to claim 9 Kaeriyama teaches the first controller is configured to communicate (for example receiving communication from CT2) with the second controller selectively via the communication channel and the second die or via the third die and the microcontroller.
With respect to claim 10 Kaeriyama teaches the second gate driver comprising a fourth die (CHP2) including the second controller, wherein the second controller includes a high-voltage communication terminal coupled to the communication terminal of the second die.
With respect to claim 11 Kaeriyama teaches the fourth die includes a fourth supply voltage terminal (voltage supply to GD2) for receiving the second supply voltage and a second reference terminal for receiving the second reference voltage.
With respect to claim 14 Kaeriyama teaches the first gate driver (GD1) and the first power switch (PTr1), wherein the first gate driver is coupled to a gate terminal of the first power switch; and the second gate driver (GD2) and the second power switch (PTr2), wherein the second gate driver is coupled to a gate terminal of the second power switch.
With respect to claim 15 Kaeriyama teaches an electric vehicle including an electric motor, wherein the electric motor is powered at least in part by the first power switch and the second power switch, wherein the electric motor provides motive power for the electric vehicle (paragraph 0279).
With respect to claim 16 Kaeriyama teaches the first gate driver comprises a package including a third die (see Fig. 56 see die with GD1), wherein the third die is galvanically isolated from the first die and the second die and is communicatively coupled to the first die, wherein the third die includes interface circuitry to provide an interface to a microcontroller (MCU).
With respect to claim 17 Kaeriyama teaches the second gate driver (DC2) comprising a fourth die (see Fig. 56) including the second controller (see GD circuitry), wherein the second controller includes a high-voltage communication terminal coupled to the communication terminal of the second die.
With respect to claim 18 Kaeriyama teaches the first die includes a first supply voltage (VDD1) terminal for receiving a first supply voltage (VDD) and a first reference terminal for receiving a first reference voltage; and the second die (DTX associated with each die) includes a second supply voltage terminal (paragraph 0173-174) for receiving a second supply voltage and a second reference terminal for receiving a second reference voltage, wherein one of the first reference voltage are different and the first supply voltage and the second supply voltage are different (see VDD and 4VDC).
With respect to claim 19 Kaeriyama teaches the first power switch and the second power switch comprise part of a respective limb of an inverter (see for example Fig. 62-63).
With respect to claim 20 Kaeriyama teaches the inverter is configured to convert DC power to AC power for application to an electric motor (see for example paragraph 0279).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michael Fin whose telephone number is (571)272-5921. The examiner can normally be reached Monday-Friday 9am-5:30.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rexford Barnie can be reached at 571-272-7429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
MICHAEL FIN
Primary Examiner
Art Unit 2836
/MICHAEL R. FIN/Primary Examiner, Art Unit 2836