DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 7 is objected to because of the following informalities:
Claim 7, line 1: replace “a second chip” with -- an additional chip -- (per specification, [0048]) because there are no “first chip” in claim 1, which claim 7 depends on.
Appropriate correction is required.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claim 1 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 11 of copending Application No. 18059089 in view of Bunandar et al. (US 20240353614 A1).
Re claim 1, although the claims are not identical, claim 11 of copending Application No. 18059089 recites all the limitations of claim 1 except the PIC having a plurality of through-silicon vias (TSVs) that are coupled with the TGVs.
Bunandar et al. discloses the PIC (120) having a plurality of through-silicon vias (TSVs) 126 that are coupled with the TGVs 103 (fig. 2A).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use both TSVs and TGVs in the device to achieve superior electrical and thermal performance.
Claims 4 and 5 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 5 and 9, respectively, of copending Application No. 18653498 in view of Bunandar et al. (US 20240353614 A1).
Re claims 4 and 5, although the claims are not identical, claims 5 and 9 of copending Application No. 18653498 claim the same subject matters of claims 4 and 5, respectively, except the PIC having a plurality of through-silicon vias (TSVs) that are coupled with the TGVs.
Bunandar et al. discloses the PIC (120) having a plurality of through-silicon vias (TSVs) 126 that are coupled with the TGVs 103 (fig. 2A).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use both TSVs and TGVs in the device to achieve superior electrical and thermal performance.
This is a provisional nonstatutory double patenting rejection.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2, 4-9, 12-13, 15, and 20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Bunandar et al. (US 20240353614 A1).
Re claim 1, Bunandar et al. discloses a device (fig. 2), comprising: a glass substrate (102; fig. 2A; [0054]) having a plurality of through-glass vias (TGVs) (103); a photonic integrated circuit (PIC) (120) hybrid bonded to the glass substrate by way of a metal-to-metal, oxide-to-oxide hybrid bond ([0075]), the PIC having a plurality of through-silicon vias (TSVs) (126) that are coupled with the TGVs (103); and an electronic integrated circuit (EIC) coupled with the PIC (120) [0054]. It is also noted that Applicant is claiming the product including the process of bonding the PIC to the glass substrate, and therefore are of "product-by-process" nature. The courts have been holding for quite some time that: the determination of the patentability of product-by-process claim is based on the product itself rather than on the process by which the product is made. In re Thrope, 777 F. 2d 695, 227 USPQ 964 (Fed. Cir. 1985). Patentability of claim to a product does not rest merely on a difference in the method by which that product is made; rather, it is the product itself which must be new and unobvious. Applicant has chosen to claim the invention in the product form. Thus, a prior art product which possesses the claimed product characteristics can anticipate or render obvious the claim subject matter regardless of the manner in which it is fabricated. A rejection based on 35 U.S.C. section 102 or alternatively on 35 U.S.C. section 103 of the status is eminently fair and acceptable. In re Brown and Saffer, 173 USPQ 685 and 688; In re Pilkington, 162 USPQ 147.
Re claim 2, Bunandar et al. discloses the device of claim 1, wherein an edge of the PIC that provides an optical coupling interface is coplanar with a side edge of the glass substrate (fig. 2E; [0021] and [0075]).
Re claim 4, Bunandar et al. discloses the device of claim 1, wherein the EIC is coupled with the PIC by way of a metal-to-metal, oxide-to-oxide hybrid bond, a thermocompression bond, a copper pillar flip chip process, or a microbump flip chip process ([0054] and [0075]). It is also noted that Applicant is claiming the product including the process of coupling/bonding the EIC with the PIC, and therefore are of "product-by-process" nature. The courts have been holding for quite some time that: the determination of the patentability of product-by-process claim is based on the product itself rather than on the process by which the product is made. In re Thrope, 777 F. 2d 695, 227 USPQ 964 (Fed. Cir. 1985). Patentability of claim to a product does not rest merely on a difference in the method by which that product is made; rather, it is the product itself which must be new and unobvious. Applicant has chosen to claim the invention in the product form. Thus, a prior art product which possesses the claimed product characteristics can anticipate or render obvious the claim subject matter regardless of the manner in which it is fabricated. A rejection based on 35 U.S.C. section 102 or alternatively on 35 U.S.C. section 103 of the status is eminently fair and acceptable. In re Brown and Saffer, 173 USPQ 685 and 688; In re Pilkington, 162 USPQ 147.
Re claim 5, Bunandar et al. discloses the device of claim 4, wherein the PIC (120) has a substrate-interface surface and a stackable-interface surface defining a thickness of the PIC (fig. 2A), and wherein the PIC has a metal via connected to a metal pad at the stackable-interface surface ([0083] and [0093]).
Re claim 6, Bunandar et al. discloses the device of claim 5, wherein a contact surface of the metal pad is flush with the stackable-interface surface of the PIC ([0083] where “the metal layer in the PIC”).
Re claim 7, Bunandar et al. discloses the device of claim 1, further comprising: a second chip hybrid bonded or flip chipped attached to the glass substrate (fig. 2A; [0083]).
Re claim 8, Bunandar et al. discloses the device of claim 1, wherein the PIC and the EIC form an optical engine that is one of a plurality of optical engines coupled with the glass substrate (Electronic integrated circuits are disposed on top of the PICs [0054]), and wherein one or more integrated circuits are coupled with the glass substrate and with the plurality of optical engines (at least two shown in fig. 2A).
Re claim 9, Bunandar et al. discloses the device of claim 1, further comprising: a fiber (112) coupled with the glass substrate, wherein the glass substrate defines a platform pocket in which the PIC is arranged, and wherein the glass substrate (102) has a waveguide (106) arranged to match with the fiber coupled with the glass substrate, the waveguide couples the fiber with a spot size convertor of the PIC (fig. 2A; [0002] and [0058] as waveguide of a PIC served as a spot size convertor).
Re claim 12, Bunandar et al. discloses the device of claim 1, further comprising: a fiber (112) coupled with the glass substrate (102), wherein the glass substrate includes a multiplexing device embedded therein [0055], and wherein the multiplexing device is coupled with the fiber by way of a waveguide of the glass substrate [0055].
Re claim 13, Bunandar et al. discloses the device of claim 1, further comprising: a fiber (112) coupled with the glass substrate (102), wherein the glass substrate has a first side edge and a second side edge defining a length of the glass substrate (fig. 2A), and wherein the glass substrate has a first section and a second section, the first section extends from the first side edge to an optical edge (108) defining, at least in part, a platform pocket in which the PIC (120) is arranged, and the second section extends between the optical edge (108) and the second side edge (fig. 2A), and wherein the TGVs (103) are arranged in the first section and a waveguide (106) embedded within the glass substrate extends from the optical edge to the fiber (112) (fig. 2A).
Re claim 15, Bunandar et al. discloses the device of claim 1, wherein the PIC has a substrate-interface surface and a stackable-interface surface defining a thickness of the PIC (120), and wherein at least one TSV (126) of the plurality of TSVs extends through a silicon handle of the PIC and is flush with the substrate-interface surface (fig. 2A).
Re claim 20, Bunandar et al. discloses an apparatus (fig. 2C), comprising: a glass substrate (102) having a plurality of through-glass vias (TGVs) (103); an integrated circuit (IC) (130, 131, 133) connected to the glass substrate; and at least one device coupled with the IC, the device comprising: a photonic integrated circuit (PIC) (120) hybrid bonded to the glass substrate ([0075]) and having a plurality of through-silicon vias (TSVs) (126) coupled with the TGVs (103); and an EIC coupled with the PIC ([0054]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bunandar et al.
Re claim 3, Bunandar et al. discloses the device of claim 1 as discussed above, but fails to teach a thickness of the PIC is 120 microns or less.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have a PIC thickness of 120 microns or less since such modification would have been an obvious design variation, well within the ordinary skill in the art, for a compact device as the overall thickness of the device is reduced due to PIC’s small size. Further, such a modification would have involved a mere change in the size of a component, and it has been held that a change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Claim(s) 10-11 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bunandar et al. in view of Kim et al. (TW 202327114 A).
Re claims 10-11 and 14, Bunandar et al. discloses the device of claim 1 as discussed above, but fails to teach the glass substrate defines a pocket in which the fiber is arranged, the fiber is passively optically coupled with the waveguide, and wherein the fiber is actively optically coupled with the waveguide at a diced facet of the glass substrate by way of a fiber array unit, wherein the second section is thicker than the first section.
Kim et al. discloses a device (fig. 6C) comprises a glass substrate (114) having plurality of TGVs (107) (English Translation, p. 6, 2nd to last paragraph), the glass substrate defines a pocket (117) in which the fiber (138) is arranged, the fiber is passively optically coupled with the waveguide (118), and wherein the fiber is actively optically coupled with the waveguide at a diced facet of the glass substrate by way of a fiber array unit (138; English Translation, p. 7, 1st paragraph), wherein the second section (waveguide 118 through right edge of glass 114) is thicker than the first section (left edge of glass 114 through end of PIC 110) (fig. 6C).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Kim et al.’s fiber array unit into the device of Bunandar et al. to transmit multiple parallel signals simultaneously. Further, it would have been obvious to the glass thickness at the second section is thicker than the first section since such modification would have involved a mere change in the size of a component to reduce the overall thickness of the device, and it has been held that a change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Uyen-Chau N. Le whose telephone number is (571)272-2397. The examiner can normally be reached Monday-Friday, 9:00am-5:30pm.
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/UYEN CHAU N LE/ Supervisory Patent Examiner, Art Unit 2874
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