DETAILED ACTION
This office action is in response to an Amendment/Request for Reconsideration after Non-Final Rejection filed 5/29/2026 for application 18/655,214 which claims priority to provisional 62/680,434 filed 6/4/2018 and is a continuation of 16/029,253 filed 7/6/2018 which also claim priority to provisional 62/680,434 filed 6/4/2018.
Claims 1, 8, 13. and 14, have been amended. No claims have been cancelled. No claims are new. Thus, claims 1-20 have been examined.
The objections and rejections from the prior correspondence that are not restated herein are withdrawn.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 8-9, and 13-16 are rejected under 35 U.S.C. 103 as being unpatentable over
McCall (McCall et al., US 2016/0284386 A1) in view of Choi (CHOI et al., US 2018/0197599 A1).
Regarding claim 1, A memory device (McCall Fig. 1 and supporting para [0021] discloses system 100 containing memory devices 120 0 to N-1, thus is an example of a memory device.) comprising: a mode register; (McCall [0017] discloses the memory device records sensor data in a mode register.) and circuitry configured to cause the memory device to: (McCall [0087] discloses the components may be implemented as hardwired circuitry.) store information corresponding to a temperature of the memory device in the mode register; (McCall [0017] discloses when sensor data has changed more than a threshold, it sets a flag in a mode register for the host to monitor/check. McCall [0028] discloses the sensor may be within a DRAM that contains a thermal sensor and a flag that is a bit within a Mode Register of the DRAM, thus measures and records the temperature of the memory device and the information is stored in a mode register of the DRAM. McCall [0016] discloses the flag is set in response to detecting a change in temperature. Thus the flag of McCall is an example of a temperature update flag that corresponds to a temperature of the memory device) transmit, to a host device, a temperature update flag and the stored information corresponding to the temperature of the memory device, (McCall [0079] teaches the controller periodically checks a temperature update flag stored in the Memory 120, where the memory controller which per McCall [0022] may be integrated within the host processor. Examiner notes that the term ‘corresponding to’ may simply mean relating to, thus the update flag is information corresponding to (relating to) the temperature of the memory device and is stored is transmitted to the host device during the polling process.) the temperature update flag indicating a change in the information corresponding to the temperature of the memory device; (McCall [0028] discloses the DRAM may contain thermal sensor data (temperature data) and a flag. McCall [0016] discloses the flag is generated in response to detecting a change in temperature input from the temperature sensor.) the stored information corresponding to the temperature of the memory device indicating to update an operating parameter of an operating mode of the memory device (Examiner notes that consistent with para [0009] of the instant application an operating parameter of the memory device may be information corresponding to the deice temperature. McCall [0028] discloses the DRAM may contain thermal sensor data (temperature data) and a flag. McCall [0016] discloses the flag is generated in response to detecting a change in temperature input from the temperature sensor and thus is an example of both “information corresponding to the temperature of the memory device and an operating parameter of the memory device.)
and refresh the memory device at a refresh rate that is based at least in part on the transmitting temperature update flag and the stored information corresponding to the temperature of the memory device. (McCall [0016] discloses that the information such as the temperature and flag are traditionally used to adjust operation of self-refresh. Thus the update flag sent to the host and also stored at the memory device 120 is used to refresh the memory device. McCall [0035] discloses the memory controller controls the refresh for the memory. McCall [0022] discloses the Memory Controller may be integrated into the hardware of the host processor. Thus the refresh is performed based at least in part on the transmitting the temperature update flag to the memory controller within the host.)
McCall teaches that the sensor data and flag are used to adjust the operation of self-refresh, it does not explicitly teach the stored information corresponding to the temperature of the memory device indicating to update an operating parameter of an operating mode of the memory device … refresh the memory device at a refresh rate that is based at least in part on the temperature update flag and the stored information corresponding to the temperature of the memory device.
Choi, of a similar field of endeavor, further teaches the stored information corresponding to the temperature of the memory device indicating to update an operating parameter of an operating mode of the memory device (Choi [0036] teaches as the detected temperature increases, the value of the refresh rate is increased to shorten a refresh period. Thus the operating parameter that indicates the temperature increase in the solution of McCall in view of Choi is an operating parameter that indicates there should be a update to the operating mode (the refreshing rate) of the memory device , where a refresh rate is an operating mode of the memory device (per para [0009] of the instant application.)
and refresh the memory device at a refresh rate that is based at least in part on transmitting the temperature update flag and the stored information corresponding to the temperature of the memory device. (Choi [0036] teaches as the detected temperature increases, the value of the refresh rate is increased to shorten a refresh period. Thus McCall in view of Choi would use the temperature update flag to recognize the change in temperature and adjust the refresh rate.
McCall and Choi are in a similar field of endeavor as both relate to monitoring memory devices to control the device to improve throughput by eliminating unnecessary commands but safeguard memory contents by performing refresh operations only as needed. Thus it would have been obvious to a person of ordinary skill in the art before the effectively filed date of the claimed invention with the solutions of McCall and Choi before them to incorporate adjusting the refresh rate based on temperature as taught by Choi into the solution of McCall that adjusts refresh commands based on a change in temperature that is denoted in a flag. Thus combining prior art elements according to known methods (adjusting the refresh rate in response to a change in temperature as taught by Choi into the solution of McCall that monitors temperature and stores the temperature along with a flag that is set when the temperature changes) to yield predictable results; (enable the system to adjust refresh rates based on the environment, where higher memory temperatures require more frequent refreshes to reliably maintain the data in memory.)
The motivation for combining Choi into McCall for claims 2-3 are the same as those presented in claim 1 above.
Regarding claim 2, The combination of McCall and Choi teaches all of the limitations of claim 1 above. McCall further teaches wherein the circuitry is further configured to cause the memory device to: (McCall [0087] discloses the components may be implemented as hardwired circuitry.) update the information corresponding to the temperature of the memory device based at least in part on identifying that the temperature associated with the memory device has changed. (McCall [0050]-[0051] discloses the memory monitors the sensors (i.e. reads the sensors) and if the value exceeds a threshold it updates the sensor value and sets the flag to indicate that the sensor has changed above a threshold value. McCall [0028] discloses the DRAM may contain thermal sensor data (temperature data) and a flag. Thus setting the flag identifies that the temperature associated with the memory device has changed above the threshold.)
Regarding claim 3, The combination of McCall and Choi teaches all of the limitations of claim 1 above. McCall further teaches wherein the circuitry is further configured to cause the memory device to: (McCall [0087] discloses the components may be implemented as hardwired circuitry.) receive a mode register read command to read the information corresponding to the temperature of the memory device (McCall [0087] discloses that the memory controller which may be within the host will read the register for the sensor data (i.e. the temperature flag), thus the Memory 120 will receive a mode register read command to read the temperature flag (i.e. information corresponding to the temperature of the memory device). ) based at least in part on the temperature update flag; (McCall [0017], [0028] and [0041] teaches that controller within the host will periodically read the mode register flag set within the Memory 120, thus the read command to read the temperature update flag is received from the host at the Memory 120 based at least in part on the existence of the temperature update flag in the memory device.) wherein the stored information corresponding to the temperature of the memory device is transmitted based at least in part on the mode register read command. (McCall [0079] teaches that the temperature flag in a Mode Register of the memory device is periodically checked by the memory controller that is a component of the host. Thus the temperature flag (stored information corresponding to the temperature of the memory device) is transmitted to the host based at least in part on the host polling the data by reading the register on the Memory 120 (based on a mode register read command). See also McCall Claim 15 that the data is read across the I/O 112 I/O 122 interface.)
Regarding claim 8, McCall teaches A host device, comprising: circuitry operable to cause the host device to: (McCall [0022]-[0023] discloses host processor, memory controller and memory may be on a single system on a chip (SOC) thus is an example of a host device made up of circuitry that causes the device to perform the actions.) receive a temperature update flag and information corresponding to a temperature of a memory device, (McCall [0028] discloses the sensor may be within a DRAM that contains a thermal sensor and a flag. McCall [0016] discloses the flag is generated in response to detecting a change in temperature input from the temperature sensor. McCall [0079] teaches the controller periodically checks a temperature update flag stored in the Memory 120, where the memory controller which per McCall [0022] may be integrated within the host processor. Thus the host receives a temperature update flag that is information corresponding to a temperature of a memory device and the host receives both an update flag and information corresponding to a temperature of the memory device.)
the information corresponding to the temperature of the memory device being stored in a mode register of the memory device, (McCall [0041]-[0042] discloses a mode register 224 in the memory 220 stores the temperature flag)
wherein the temperature update flag indicates a change in the information corresponding to the temperature of the memory device; (McCall [0028] discloses the sensor may be within a DRAM that contains a thermal sensor and a flag that is a bit within a Mode Register of the DRAM. McCall [0016] discloses the flag is set in response to detecting a change in temperature.)
wherein the stored information corresponding to the temperature of the memory device indicates to update an operating parameter of an operating mode of the memory device (Examiner notes that consistent with para [0009] of the instant application an operating parameter of the memory device may be information corresponding to the deice temperature. McCall [0028] discloses the DRAM may contain thermal sensor data (temperature data) and a flag. McCall [0016] discloses the flag is generated in response to detecting a change in temperature input from the temperature sensor and thus is an example of both “information corresponding to the temperature of the memory device and an operating parameter of the memory device.)
McCall [0016] teaches that the information such as the temperature and flag are traditionally used to adjust the operation of self-refresh, but does not explicitly disclose an operating mode wherein the stored information corresponding to the temperature of the memory device indicates to update an operating parameter of an operating mode of the memory device; and update an operating parameter of the operating mode associated with the memory device based at least in part on receiving the temperature update flag and the information corresponding to the temperature of the memory device.
Choi, of a similar field of endeavor, further teaches the temperature of the memory device indicates to update an operating parameter of an operating mode of the memory device; (Choi [0036] teaches as the detected temperature increases, the value of the refresh rate is increased to shorten a refresh period. Thus the operating parameter that indicates the temperature increase in the solution of McCall in view of Choi is an operating parameter that indicates there should be a update to the operating mode (the refreshing rate) of the memory device , where a refresh rate is an operating mode of the memory device (per para [0009] of the instant application.)
and update an operating parameter of an operating mode of the memory device based at least in part on receiving the temperature update flag and the information corresponding to the temperature of the memory device. (Choi [0036] teaches as the detected temperature increases, the value of the refresh rate is increased to shorten a refresh period. Choi [0086] teaches the refresh period is an operating parameter sent by the controller to the device. Thus McCall [0017] that teaches the memory devices provides the sensor data periodically to the memory controller, which per par McCall [0022] is a component of the host, in view of Choi would update a refresh rate operating parameter controlled by the host and received at the host (i.e. is transmitted to the host) based on the temperature update flag that is information corresponding to the temperature of the memory device.)
McCall and Choi are in a similar field of endeavor as both relate to monitoring memory devices to control the device to improve throughput by eliminating unnecessary commands but safeguard memory contents by performing refresh operations only as needed. Thus it would have been obvious to a person of ordinary skill in the art before the effectively filed date of the claimed invention with the solutions of McCall and Choi before them to incorporate adjusting the refresh rate parameter based on temperature and its associated flag as taught by Choi into the solution of McCall that adjusts refresh commands based on a change in temperature that is denoted in a flag. Thus combining prior art elements according to known methods (adjusting the refresh rate in response to a change in temperature as taught by Choi into the solution of McCall that monitors temperature and stores the temperature along with a flag that is set when the temperature changes) to yield predictable results; (enable the system to adjust refresh rates based on the environment, where higher memory temperatures require more frequent refreshes to reliably maintain the data in memory.)
The motivation for combining Choi into McCall for claims 9 through 13 are the same as those presented in claim 8 above.
Regarding claim 9, McCall and Choi teaches all of the limitations of claim 8 above. McCall further teaches wherein the circuitry is further operable to cause the host device to: (McCall [0087] discloses the components may be implemented as hardwired circuitry.) transmit a mode register read command to read the information corresponding to the temperature of the memory device is received (McCall [0087] discloses that the memory controller which may be on the host will read the register for the sensor data (i.e. the temperature flag), thus the Memory 120 will receive a mode register read command transmitted by the host to read the temperature flag (i.e. information corresponding to the temperature of the memory device). ) based at least in part on the temperature update flag; (McCall [0017], [0028] and [0041] teaches that controller within the host will periodically read the mode register flag set within the Memory 120, thus the read command to read the temperature update flag is received based at least in part on the existence of the temperature update flag in the memory device.)
wherein the information corresponding to the temperature of the memory device is received based at least in part on the mode register read command. (McCall [0079] teaches that the temperature flag in a Mode Register of the memory device is periodically checked by the memory controller that is a component of the host. Thus the temperature flag (stored information corresponding to the temperature of the memory device) is transmitted to the host based at least in part on the host polling the data by reading the register on the Memory 120 (based on a mode register read command from the host based on the existence of the flag in the memory device). See also McCall Claim 15 that the data is read across the I/O 112 I/O 122 interface.)
Regarding claim 13, McCall and Choi teaches all of the limitations of claim 8 above.
Choi further teaches wherein the operating parameter of the operating mode associated with the memory device comprises a refresh rate associated with the memory device. (Choi [0036] teaches as the detected temperature increases, the value of the refresh rate is increased to shorten a refresh period. Choi [0086] teaches the refresh period is an mode associated with the memory device and the temperature is an operating parameter of the operating mode.)
The motivation to combine Choi into McCall is the same as set forth in claim 8 above.
Regarding claim 14, McCall teaches A method by a memory device, comprising: (McCall [0083] discloses that the apparatus can implement the method described.) McCall [0022]-[0023] discloses host processor, memory controller and memory may be on a single system on a chip (SOC) thus is an example of a memory device)
The remainder of claim 14 recites limitations described in claim 1 above and thus is rejected based on the teachings and rationale of claim 1 above.
Regarding claim 15, the combination of McCall and Choi teaches all of the limitations of claim 14 above.
The remainder of claim 15 recites limitations described in claim 2 above and thus is rejected based on the teachings and rationale of claim 2 above.
Regarding claim 16, the combination of McCall and Choi teaches all of the limitations of claim 14 above.
The remainder of claim 16 recites limitations described in claim 3 above and thus is rejected based on the teachings and rationale of claim 3 above.
Claims 4-7, 10-12, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over McCall (McCall et al., US 2016/0284386 A1) in view of Choi (CHOI et al., US 2018/0197599 A1) as detailed in claims 1-3, 8-9, and 13-16 above and further in view of Ross (Ross US 2019/0369893 A1).
Regarding claim 4, the combination of McCall and Choi teaches all of the limitations of claim 1 above. However, the combination does not explicitly teach wherein the temperature update flag comprises a voltage at an external terminal of the memory device that persists for a predetermined duration or until a predetermined response is received from a connected host device.
Ross, of a similar field of endeavor, further teaches wherein the temperature update flag comprises a voltage at an external terminal of the memory device that persists for a predetermined 0duration or until a predetermined response is received from a connected host device. (This limitation is met when one of the two options is disclosed. Examiner discloses a voltage that persists for a predetermined duration. Ross [0022] discloses that one approach to polling may be a dedicated command to the memory device to perform a mode register read operation and to output the value on the data bus of the memory device. Ross [0025] discloses in response to a temperature update the memory device can send a temperature update flag “TUF” that can last a predetermined number of cycles of the memory clock 410. See also Ross claims 1-5 that discloses information relating to temperature may be held as a voltage for a predetermined duration. )
McCall, Choi, and Ross are all in a similar field of endeavor as all relate to managing memory device temperatures. Thus it would have been obvious to a person of ordinary skill in the art before the effectively filed date of the claimed invention to incorporate the predetermined duration of the temperature as taught by Ross into the solution of McCall and Choi that monitors the temperature of a device, thus combining prior art elements according to known techniques to yield predictable results (to notify the system monitoring the device asynchronously, where asynchronous notifications occur immediately and polling methods involve a delay due to the fact the values are only checked every polling interval.).
Regarding claim 5, the combination of McCall, Choi, and Ross teaches all of the limitations of claim 4 above.
Ross further teaches wherein the circuitry is further configured to cause the memory device to: terminate the voltage at the external terminal of the memory device based at least in part on the predetermined duration or the predetermined response being satisfied. (Ross Fig. 4 and paras [0022] and [0025] that discloses the voltage for the TUF signal 415 is terminated after the predetermined period of time )
The motivation to combine Ross into the existing solution is the same as set forth in claim 4 above.
Regarding claim 6, , the combination of McCall, Choi, and Ross teaches all of the limitations of claim 4 above.
Ross further teaches wherein the predetermined response comprises a mode register read command to read the information corresponding to the temperature of the memory device. (Ross Fig. 4 and [0025] discloses that in response to the temperature update flag being set the host may send a mode register read command comprising a first MRR1 portion 421 and a second MRR2 portion 422 that corresponds to the temperature of the memory device.)
The motivation to combine Ross into the existing solution is the same as set forth in claim 4 above.
Regarding claim 7, , the combination of McCall, Choi and Ross teaches all of the limitations of claim 4 above.
Ross further teaches wherein the predetermined duration comprises a predetermined quantity of clock cycles. (Ross [0025] discloses in response to updating a temperature flag the memory device can send a temperature update flag “TUF” that can last a predetermined number of cycles of the memory clock 410. See also Ross claims 1-5 that discloses information relating to temperature may be held as a voltage for a predetermined duration. )
The motivation to combine Ross into the existing combination is the same as set forth in claim 4 above.
Regarding claim 10, the combination of McCall and Choi teaches all of the limitations of claim 14 above.
The remainder of claim 10 recites limitations described in claim 4 above and thus is rejected based on the teachings and rationale of claim 4 above.
Regarding claim 11, the combination of McCall, Choi and Ross teaches all of the limitations of claim 10 above.
The remainder of claim 11 recites limitations described in claim 6 above and thus is rejected based on the teachings and rationale of claim 6 above.
Regarding claim 12, the combination of McCall, Choi and Ross teaches all of the limitations of claim 10 above.
The remainder of claim 12 recites limitations described in claim 7 above and thus is rejected based on the teachings and rationale of claim 7 above.
Regarding claim 17, the combination of McCall and Choi teaches all of the limitations of claim 14 above.
The remainder of claim 17 recites limitations described in claim 4 above and thus is rejected based on the teachings and rationale of claim 4 above.
Regarding claim 18, the combination of McCall, Choi, and Ross teaches all of the limitations of claim 17 above.
The remainder of claim 18 recites limitations described in claim 5 above and thus is rejected based on the teachings and rationale of claim 5 above.
Regarding claim 19, the combination of McCall, Choi, an Ross teaches all of the limitations of claim 17 above.
The remainder of claim 19 recites limitations described in claim 6 above and thus is rejected based on the teachings and rationale of claim 6 above.
Regarding claim 20, the combination of McCall, Choi, and Ross teaches all of the limitations of claim 17 above.
The remainder of claim 20 recites limitations described in claim 7 above and thus is rejected based on the teachings and rationale of claim 7 above.
Relevant Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is:
A definition of corresponding from the Cambridge dictionary that indicates a corresponding may be interpreted as happening as a result of something that you just mentioned, such as pressures lead to employee exhausting with corresponding declines in productivity. Thus a temperature update flag is an example of information corresponding to the temperature of the memory device.
Response to Remarks
Examiner thanks applicant for their claim amendments and remarks of 5/29/2026. They have been fully considered. However they are not persuasive in light of the claim rejections detailed above and remarks detailed below.
35 U.S.C 112(A)
The claim amendments of 5/29/2026 have resolved the 112 rejection as it clarifies that the temperature is an parameter that causes the system to update an operating mode of the memory device.
35 U.S.C 103
Applicant argues on page 9 of their remarks that McCall does not teach transmitting the temperature update flag. ‘McCall states that "the DRAM utilizes its existing on-die thermal sensor to notify memory controller 110 when an adjustment to a ZQ comp setting is required," where a "memory controller 110 monitors the Mode Register bit represented by 126 (e.g., reading the bit periodically to determine its state)." Id. 1 [0028] (emphasis added). According to McCall, "triggering the compensation flag signal comprises setting a value in a Mode Register of the memory device to be checked periodically by the memory controller." Id. 1 [0079]. That is, McCall describes generating a one-bit flag when a temperature of a memory device changes, and the one-bit flag is periodically read by a memory controller to indicate an adjustment to a ZQ comp setting.
McCall, however, does not teach or suggest "transmit[ting], to a host device, a temperature update flag and the stored information corresponding to the temperature of the memory device," the "stored information corresponding to the temperature of the memory device indicating an operating parameter of an operating mode of the memory device" as recited in amended independent claim 1. Rather, the cited portions of McCall describe the memory controller 110 periodically reading only the flag 126 from the mode register. Therefore, McCall does not teach or suggest "transmit[ting], to a host device, a temperature update flag and the stored information corresponding to the temperature of the memory device," as recited in amended independent claim 1.’
Examiner respectfully disagrees. McCall [0017] discloses “a controller on the memory device itself determines when the sensor data has changed more than a threshold, and sets a flag in a Mode Register…. the memory controller periodically monitors or checks the Mode Register to determine if a flag has been set indicating the need for impedance compensation adjustment.” McCall [0021] discloses the memory controller that manages the impedance may be within the host processor. Thus the solution of McCall discloses transmitting the flag to the memory controller within the host device from the memory device.
Applicant argues page 10 of their remarks ‘McCall, however, does not teach or suggest "transmit[ting], to a host device, a temperature update flag and the stored information corresponding to the temperature of the memory device," the "stored information corresponding to the temperature of the memory device indicating an operating parameter of an operating mode of the memory device" as recited in amended independent claim 1. Rather, the cited portions of McCall describe the memory controller 110 periodically reading only the flag 126 from the mode register. Therefore, McCall does not teach or suggest "transmit[ting], to a host device, a temperature update flag and the stored information corresponding to the temperature of the memory device," as recited in amended independent claim 1.’
Examiner agrees that McCall alone does not teach ‘the temperature of the memory device indicating to update an operating parameter of the operating mode of the memory device. However, McCall in view of Choi teaches the newly amended limitation. McCall teaches transmitting a temperature flag to the host device to adjust a refresh rate. McCall in view of Choi teaches that the update flag is a parameter for setting a mode of the memory device wherein the mode is a refresh rate.
Applicant further argues on page 9 of their remarks ‘That is, McCall does not describe any transmitting, let alone both "the temperature update flag indicating a change in the information corresponding to the temperature of the memory device" and "the stored information corresponding to the temperature of the memory device," as recited in amended independent claim 1. Put another way, McCall's periodic retrieval of a one-bit flag performed by a memory controller is not the same as, and fails to teach or suggest "transmit[ting], to a host device, a temperature update flag and the stored information corresponding to the temperature of the memory device, the temperature update flag indicating a change in the information corresponding to the temperature of the memory device, the stored information corresponding to the temperature of the memory device indicating an operating parameter of the memory device" as recited in amended independent claim 1. Thus, McCall does not teach or suggest at least the aforementioned features of amended independent claim 1.’
Examiner respectfully notes that McCall teaches transmitting an update flag to the host, where the update flag is information corresponding to the temperature of the memory device. McCall in view of Choi teaches that the system uses the update flag to adjust the refresh rate of the memory device, thus the update flag is an operating parameter of an operating mode (the refresh rate in the solution of McCall in view of Choi).
Applicant further argues on page 10 of their remarks ‘For similar reasons, McCall does not teach or suggest "refresh[ing] the memory device at a refresh rate that is based at least in part on transmitting the temperature update flag and the stored information corresponding to the temperature of the memory device," as recited in amended independent claim 1.’
Examiner respectfully notes that McCall in view of Choi teaches the claimed limitations.
Applicant further argues on page 10 of their remarks ‘The Office Action has not shown that Choi and Ross overcome the deficiencies of McCall, nor does the Office Action suggest otherwise.’
Examiner respectfully disagrees. Paragraph [0050] of the instant application states “Turning to FIG. 4 … As can be seen with reference to FIG. 4 , the memory device can, in response to updating information in a mode register thereof, send to a connected host a notification, such as notification 416, on an external terminal of the device, such as the temperature update flag “TUF” terminal 415.” The system is sending a single value labeled TUF, or TUF_1 or TUF_2. See also paras [0026]-[0029] of the instant application. The “information corresponding to a temperature of the memory device” may be the “temperature update flag” and there may be only one value sent to the host. Thus when the memory device of McCall [0017] sets flag in a Mode Register when the temperature sensor data changes beyond a threshold value it is sends a temperature update flag to aid in managing refreshes. McCall teaches the memory device provides the sensor data to the controller, which per McCall [0022] is a component of the host. Thus McCall teaches the newly amended transmitting claims. Choi teaches that the refresh flag is an operating parameter of an operating mode, where the operating parameter is a temperature update that is used to trigger a new mode for the memory device, where the new mode is an updated refresh rate. See Choi [0009] and [0036] as detailed in the rejection above.
Applicant further argues on page 11 of their remarks ‘Dependent clams 2-7, 9-13, and 15-20 also recite allowable features that the Office Action has not shown to be taught or suggested by McCall, Choi, and Ross.
Examiner respectfully notes that applicant is making a conclusory statement without providing any details or facts. Applicant makes no specific argument with respect to what features that re not taught or suggest by McCall, Choi, and Ross.
Applicants arguments with respect to independent claims 8 and 14 all rely on arguments similar to those presented in independent claim 1 and thus are rejected based on similar rationale as those presented in claim 1 above.
Applicants further arguments with respect to dependent claims 2-7, 9-13, and 14-2 rely upon perceived errors in their respective base claims and thus have been addressed in the arguments to the base claims above.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JANICE M. GIROUARD whose telephone number is (469)295-9131. The examiner can normally be reached M-F 9:30 - 7:30.
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/JANICE M. GIROUARD/Primary Examiner, Art Unit 2138
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