DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Objections
2. Claims 19 and 24-25 are objected to because of the following informalities:
Claim 19 recites: “data transfer wires, in the active area” which should be changed to “data transfer wires in the active area” for readability.
Claim 24 recites: “the data wires pass” which lacks an antecedent basis and which should be changed to “the data transfer wires”.
Claim 25 recites: “the data wires” which lacks an antecedent basis and which should be changed to “the data transfer wires”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
3. Claims 1-5, 11-12, 16, 22-23, 25 and 27 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhang Dian CN 116314208 A (the ‘208 reference), Display Panel And Display Device, Published June 23, 2023, the following rejections are based on an English translation by USPTO-PE2E.
The reference discloses in Figs. 1-15, particularly Fig. 10, and related text a display panel as claimed.
Referring to claim 1, the ‘208 reference discloses a display panel, comprising:
an active area (display area AA, page 5, 2nd paragraph); and
a border area (outside of active area and comprising multiplexers (“muti-path distributors”) 220 (page 5, 4th paragraph), NA1 (best seen in Fig. 8) and NA2 (Fig. 10), hereinafter the border area is referred to as ~220/NA1/NA2), wherein
the border area (~220/NA1/NA2) comprises a chip binding area (NA2, page 5, 2nd paragraph) arranged on a first side of the active area in a first direction (Y direction), and a plurality of data pins (bonding pads 21 (21a, 21b), page 5, 3rd paragraph) are arranged in the chip binding area (NA2);
the active area (AA) comprises at least a curved edge (best seen in Fig. 10) at the first side of the active area along a second direction (X direction), wherein the first direction intersects with the second direction;
first multiplexers (220) among multiplexers are arranged along the curved edge of the active area; and
the first multiplexers (220) are electrically connected to the data pins (21b) through data transfer wires (connection lines L2, page 9), and the data transfer wires (L2) pass through the active area (AA).
Referring to claim 27 and using the same reference characters, interpretations, and citations as detailed above for claim 1 where applicable, the reference discloses a display device, comprising: a display panel, wherein the display panel comprises:
an active area (AA); and
a border area (~220/NA1/NA2), wherein
the border area comprises a chip binding area (NA2) arranged on a first side of the active area in a first direction, and a plurality of data pins (21) are arranged in the chip binding area;
the active area (AA) comprises at least a curved edge at the first side of the active area along a second direction, wherein the first direction intersects with the second direction;
first multiplexers (220) among multiplexers are arranged along the curved edge of the active area; and
the first multiplexers (220) are electrically connected to the data pins (21b) through data transfer wires (L2), and the data transfer wires (L2) pass through the active area (AA).
Referring to claim 2, Fig. 10 depicts that the first multiplexers (220) are arranged in succession along the curved edge of the active area.
Referring to claim 3, the reference further discloses that
the active area (AA) comprises at least an R corner at the first side in the second direction, and the R corner is the curved edge of the active area; and
at least some of the multiplexers (220), from a 1st multiplexer at an end of the multiplexers at the R corner, are the first multiplexers.
Referring to claim 4, the reference further discloses that
the active area (AA) comprises at least a circular arc at the first side in the second direction, and the circular arc is the curved edge of the active area; and
at least some of the multiplexers (220), from a 1st multiplexer at an end of the multiplexers at the circular arc, are the first multiplexers.
Referring to claim 5, the reference further discloses that
the active area (AA) comprises at least a first circular arc and a second circular arc that are opposite at the first side in the second direction; and
the first circular arc and the second circular share an endpoint, and the first multiplexers accounts for a half of the multiplexers (220) corresponding to one of the first circular arc and the second circular arc at most (the first multiplexers accounts for about four of the multiplexers, see Fig. 10).
Referring to claim 11, the reference further discloses that pixel circuits (PX, see Fig. 8, page 5, 7th paragraph) are arranged in the active area (AA), and the data transfer wires (L2, Fig. 9) are arranged between adjacent pixel circuits (not labeled in Fig. 9) in the active area.
Referring to claim 12, Fig. 10 depicts that at least some of the data transfer wires (L2) each comprise a winding transfer wire extending to a side of the data pin (21b) away from the active area; and
the winding transfer wire (L2) is electrically connected to the data pin (21b) at the side of the data pin away from the active area.
Referring to claim 16, the reference further discloses that
data transmission wires (F1, Fig. 10) are arranged in the border area, and second multiplexers (220) among the multiplexers are electrically connected to the data pins (21a) through the data transmission wires (F1).
Referring to claim 22, the reference further discloses that margin signal wires (CK1, CK2, Figs. 7, 9, page 8, 3rd paragraph) are arranged between the multiplexers (220) and the data pins (21) in the border area and extend along an edge of the active area; and the data transmission wires (F1) and the data transfer wires (L2) interest with the margin signal wires (CK1, CK2) between the multiplexers (220) and the data pins (21), in the direction perpendicular to the plane where the display panel is arranged, and the data transmission wires and the data transfer wires are (inherently) insulated from the margin signal wires; meeting the claim limitation “the data transfer wires do not intersect with the margin signal wires at the curved edge in the direction perpendicular to a plane where the display panel is arranged; and/or the data transmission wires and the data transfer wires interest with the margin signal wires between the multiplexers and the data pins, in the direction perpendicular to the plane where the display panel is arranged, and the data transmission wires and the data transfer wires are insulated from the margin signal wires”.
Referring to claim 23, the reference further discloses that the margin signal wires (CK1, CK2) each are a clock signal wire (page 8, 3rd paragraph), meeting the claim limitation “a clock signal wire or a control signal wire”.
Referring to claim 25, the reference further discloses that the multiplexers are sequentially arranged along an edge of the active area toward the chip binding area, and an opening is formed between two adjacent second multiplexers (220), wherein one data transfer wire (L2, Fig. 10), meeting the claim limitation “at least one of the data transfer wires”, is electrically connected to the corresponding data pin (21b) through the opening.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. §103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claim 6 is rejected under 35 U.S.C. §103 as being unpatentable over Zhang Dian CN 116314208 A (the ‘208 reference) in view of Li et al. U.S. Patent Application Publication 20170317157.
Referring to claim 6, the ‘208 reference discloses the active area (AA) as detailed above for claim 5, but does not disclose that the active area is circular. Instead, the reference discloses that the active area is rectangular (see Fig. 2).
Li, in disclosing a display panel comprising an active area (51, 61, 71, Figs. 5, 6, 7, para [76, 80, 91] (paragraph(s) [0076], [0080], [0091])), discloses that the active area is circular or rectangular (see Figs. 5-7), thereby teaching that circular and rectangular is art-recognized equivalents.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the reference’s active area with a circular shape. One would have been motivated to make such a modification in view of the teachings in Li that circular and rectangular is art-recognized equivalent shapes.
5. Claim 7 and 9-10 are rejected under 35 U.S.C. §103 as being unpatentable over Zhang Dian CN 116314208 A (the ‘208 reference) in view of Xiao et al. U.S. Patent Application Publication 20250098450.
Referring to claim 7, the ‘208 reference discloses a display panel comprising data transfer wires L2 as detailed above for claim 1, but does not disclose a shielding wiring.
Xiao, in disclosing a display panel comprising data transfer wires (514, Figs. 10A, 10B, para [136]), teaches shielding wiring (61, Figs. 10A, 10B, 11C, para [136]) for improving display characteristic of the display panel (para [128]: “… the parasitic capacitance between the first data transfer line of the first data line and the adjacent first reset control line, it is easy to cause the difference of signal jump variables between the first data line and the second data line, thereby generating poor display…”, para [129]: “For the above poor display of the display substrate, the present embodiment provides a display substrate, including a substrate, a plurality of pixel circuits, a plurality of light emitting elements, at least one first reset control line, at least one first data line and at least one first shielding wire”, emphases added).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the reference’s display panel with shielding wiring. One would have been motivated to make such a modification in view of the teachings in Xiao for improving display characteristic of the display panel.
Thus, such a modification would have resulted in a display panel comprising or wherein:
referring to claim 7, shielding wiring (61, as taught by Xiao) would have been arranged in a layer different from a layer in which the data transfer wires (L2) are arranged; and
the data transfer wires (L2) would have partially intersected with the shielding wiring (61) in a direction perpendicular to a plane where the display panel is arranged, and the data transfer wires (L2) would have been insulated (by insulation layer 103, Xiao, para [144]) from the shielding wiring (61);
and
referring to claims 9-10, the shielding wiring (61) is constant-voltage wiring, the shielding wiring (61) is source voltage wiring, reference voltage wiring, level signal wiring or grounded wiring (Xiao, para [27], the shielding wire is electrically connected to a power supply line or an initial signal line).
6. Claims 17-18 and 20-21 are rejected under 35 U.S.C. §103 as being unpatentable over Zhang Dian CN 116314208 A (the ‘208 reference) in view of Li et al. U.S. Patent Application Publication 20170317157 or Yang et al. U.S. Patent Application Publication 20200381458.
Referring to claims 17-18 and 20-21, the ‘208 reference discloses a display panel comprising data transfer wires (L2) that run through the active area to the border area and data transmission wires (F1, Fig. 10) that run only in the border area as detailed above for claims 1 and 16, but does not take into consideration resistance that theses wires of different lengths possess.
Li, in disclosing a display panel comprising an active area (51, 61, 71, Figs. 5, 6, 7, para [76, 80, 91]), a border region and wires 24, teaches that width of each wire 24 may be appropriately increased to reduce resistance (para [50]); or, Yang, in disclosing in Fig. 7 a display panel comprising an active area, a border region, multiplex circuit 11 in the border region, and a wiring area for wires 12, teaches that the space for the multiplex circuit is reduced to provide more space for the wiring area in the border region for ultimately reducing resistance of wiring (para [28]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the reference’s display panel with resistance of the data transfer wires (L2) and the data transmission wires (F1) into consideration.
Thus, such a modification would have resulted in a display panel comprising or wherein:
referring to claim 18, the data transfer wires (L2) are at least partially wider than the data transmission wires (F1) (wider to reduce resistance in consideration that data transfer wires’ lengths are longer);
referring to claim 20, the data transfer wires are at least partially thicker than the data transmission wires in the direction perpendicular to a plane where the display panel is arranged (thicker to reduce resistance in consideration that data transfer wires’ lengths are longer);
and
referring to claim 21, the data transfer wires (L2) are at least partially less than the data transmission wires (F1) in impedance (less impedance in consideration that data transfer wires’ lengths are longer).
Referring to claim 17, although the ‘208 reference in view of Li (‘208/Li) or Yang (‘208/Yang) does not specifically disclose relative dimensions as claimed, the claimed relative dimensions (wherein an impedance difference between two wires among all the data transfer wires and all the data transmission wires is less than 0.1 Ohm) will not support the patentability of subject matter encompassed by the prior art (the ‘208 reference discloses that lengths of data transfer wires (L2) and data transmission wires (F1) are different, Li teaches that width of each wire 24 may be appropriately increased to reduce resistance and Yang teaches utilizing all the available space for wiring to reduce resistance) unless there is evidence indicating such dimensions are critical. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation"; MPEP 2144.05.
Allowable Subject Matter
7. Claims 8, 13-15, 19, 24 and 26, insofar as in compliance with the claim objections detailed above, are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for the indication of allowable subject matter: The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to teach or render obvious a display panel with all exclusive limitations as recited in claims 8, 13, 19, 24 and 26, which may be characterized (claim 8) in that the data transfer wires each are a polyline and in that the shielding wiring comprises a first shielding wire extending along the first direction and a second shielding wire extending along the second direction, (claim 13) a transfer metal layer is arranged on a side of the second insulation layer away from the substrate, and in that the data transfer wires are at least partially arranged in the gate metal layer, the source drain metal layer or the transfer metal layer, (claim 19) in that segments of the data transfer wires in the border area are at least partially wider than segments of the data transfer wires in the active area, (claim 24) an opening is formed at the second multiplexers, and in that at least some of the data transfer wires are electrically connected to the data pins through the opening, and (claim 26) in that segments of the data transfer wires, a segment of the data input wire and segments of the data transmission wires extend along the first direction between the multiplexers and the data pins.
Conclusion
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TU TU V HO whose telephone number is (571)272-1778. The examiner can normally be reached on Monday to Thursday 6:30 - 15:00, Monday through Thursday.
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06-11-2026
/TU-TU V HO/Primary Examiner, Art Unit 2818
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