DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1, 7, 8, 14, 15 recite “EIS”. “EIS” is an acronym and may have multiple meanings and is therefore indefinite. Claims that depend on the above rejected claims are also rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 6-8, 13-15, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over van Lammeren (US 2021/0109159 A1) in view of Yellepeddi (US 2024/0302443 A1). With respect to Claim 1 van Lammeren teaches A system comprising: (See Abstract) a battery (See Fig 2); a battery management system comprising EIS circuitry, wherein the battery management system is electrically coupled to the battery (See Fig 2 and Para[00222], [0023] Impedance measurements may be used for battery management for a variety of applications.. To measure impedance of a battery, an electrochemical impedance spectroscopy (EIS) technique may be used that determines the impedance of the battery at different frequencies.); wherein the EIS circuitry comprising excitation circuitry configured to generate a stimulus signal (See Para[0006] a circuit includes synchronous demodulator circuitry, analog-to-digital converter (ADC) circuitry, and window circuitry. The synchronous demodulator circuitry measures impedance of a battery at a target frequency based on generated excitation waveforms. The ADC circuitry produces digital representations of a power parameter responsive to application of at least one of the generated excitation waveforms to the battery. ); wherein the EIS circuitry is configured to provide the stimulus signal to the battery and to receive a response signal from the battery based on the stimulus signal (See Para[0009] The synchronous demodulator circuitry may include a wave circuit to generate the excitation waveforms at one target frequency per measurement and a synchronous demodulator. The wave circuit generates the excitation waveforms including generating sample values indicative of a sine waveform and a cosine waveform at the single target frequency. The wave circuit further outputs one of the sine and cosine waveforms to generate current input to the battery and to identify a real component of the power parameter, and outputs the other of the sine and cosine waveforms to identify an imaginary component of the power parameter. The synchronous demodulator circuitry, e.g., the synchronous demodulator, includes first and second multiplier circuits and first and second integrator circuits. The first multiplier circuit and first integrator circuit multiply one of the sine and cosine waveforms by the weighted outputs of the digital representations indicative of the power parameter to identify the real component. The second multiplier circuit and a second integrator circuit multiply the other of the sine and cosine waveforms by the weighted outputs of the digital representations of the power parameter to identify the imaginary component.); wherein the EIS circuitry further comprises circuitry configured to generate a current signal based on the response signal (See Para[0009],[0023] The wave circuit further outputs one of the sine and cosine waveforms to generate current input to the battery and to identify a real component of the power parameter, and outputs the other of the sine and cosine waveforms to identify an imaginary component of the power parameter.); wherein the EIS circuitry further comprises a voltage sensing circuitry configured to generate a voltage signal based on the stimulus signal and the response signal (See Para[0023] The source (e.g., voltage or current source) may be under control of the impedance measurement circuit or outside the control, such as the drive current of a traction motor of an electric vehicle while the vehicle is operating and/or moving, as further described herein.); wherein the EIS circuitry further comprises a phase circuitry configured to generate a phase signal based on the current signal and the voltage signal (See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages); wherein the EIS circuitry further comprises a circuitry configured to generate a current amplitude signal based on the current signal (See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages); wherein the EIS circuitry further comprises a voltage amplitude circuitry configured to generate a voltage amplitude signal based on the current signal (See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages);; wherein an EIS processor is configured to generate at least one output signal based on the phase signal, the current amplitude signal, and the voltage amplitude signal (See Fig 2); and wherein the battery management system is configured to generate a first impedance based on an EIS model and the at least one output signal (See Para[0011] a method includes generating excitation waveforms at a target frequency using a wave circuit, producing digital representations of power parameters responsive to application of at least one of the generated excitation waveforms to a battery, generating weighted outputs of the digital representations of the power parameter using a window function, and measuring impedance of the battery using the digital representations of the power parameter, the generated excitation waveforms, and the window function. The generation of the excitation waveforms can be at one target frequency per measurement.). However van Lammerern is silent to the language of a current sensing circuitry current amplitude circuitry Nevertheless Yellepeddi teaches a current sensing circuitry (See Para[0037] The processor circuitry 112 can be configured to calculate the current through the cell arrangement 102 by calculating respective currents through corresponding ones of the sense resistors and summing the respective currents. The processor circuitry 112 can determine the current through a sense resistor by dividing the voltage across the sense resistor by the resistance value of the sense resistor.) current amplitude circuitry (See Para[0126] The adjustable current source 1010 can generate a current signal corresponding to the received analog signal. The generated current signal can have an amplitude corresponding to an amplitude of the received signal.) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern and have a current sensing circuitry and current amplitude circuitry such as that of Yellepeddi One of ordinary skill would have been motivated to modify van Lammerern, because having a current sensing circuitry would allow one to know the amount of current which would improve accurately making any necessary adjustments and would be no more than predictable use of prior art elements according to their established functions. With respect to Claim 6 van Lammeren teaches The system of claim 1, wherein the at least one output signal comprises a first output signal of an output phase and a second output signal of an output amplitude. (See Para[0023]) With respect to Claim 7 van Lammeren is silent to the language of The system of claim 1, wherein to generate a first impedance based on an EIS model and the at least one output signal the battery management system is configured to determine the first impedance from a look-up table. Nevertheless Yellepeddi teaches wherein to generate a first impedance based on an EIS model and the at least one output signal the battery management system is configured to determine the first impedance from a look-up table. (See Para[0140]) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammeren and determine the first impedance from a look-up table such as that of Yellepeddi. One of ordinary skill would have been motivated to modify van Lammeren because using a look-up table would improve efficiency. With respect to Claim 8 van Lammeren teaches A battery management integrated circuit comprising (See Abstract): a battery management (See Fig 2); a EIS circuitry comprising excitation circuitry configured to generate a stimulus signal(See Para[0006] a circuit includes synchronous demodulator circuitry, analog-to-digital converter (ADC) circuitry, and window circuitry. The synchronous demodulator circuitry measures impedance of a battery at a target frequency based on generated excitation waveforms. The ADC circuitry produces digital representations of a power parameter responsive to application of at least one of the generated excitation waveforms to the battery. ); wherein the EIS circuitry is configured to provide the stimulus signal to a battery and to receive a response signal from the battery based on the stimulus signal(See Para[0009] The synchronous demodulator circuitry may include a wave circuit to generate the excitation waveforms at one target frequency per measurement and a synchronous demodulator. The wave circuit generates the excitation waveforms including generating sample values indicative of a sine waveform and a cosine waveform at the single target frequency. The wave circuit further outputs one of the sine and cosine waveforms to generate current input to the battery and to identify a real component of the power parameter, and outputs the other of the sine and cosine waveforms to identify an imaginary component of the power parameter. The synchronous demodulator circuitry, e.g., the synchronous demodulator, includes first and second multiplier circuits and first and second integrator circuits. The first multiplier circuit and first integrator circuit multiply one of the sine and cosine waveforms by the weighted outputs of the digital representations indicative of the power parameter to identify the real component. The second multiplier circuit and a second integrator circuit multiply the other of the sine and cosine waveforms by the weighted outputs of the digital representations of the power parameter to identify the imaginary component.); wherein the EIS circuitry further comprises circuitry configured to generate a current signal based on the response signal (See Para[0009],[0023] The wave circuit further outputs one of the sine and cosine waveforms to generate current input to the battery and to identify a real component of the power parameter, and outputs the other of the sine and cosine waveforms to identify an imaginary component of the power parameter.); wherein the EIS circuitry further comprises a voltage sensing circuitry configured to generate a voltage signal based on the stimulus signal and the response signal(See Para[0023] The source (e.g., voltage or current source) may be under control of the impedance measurement circuit or outside the control, such as the drive current of a traction motor of an electric vehicle while the vehicle is operating and/or moving, as further described herein.); wherein the EIS circuitry further comprises a phase circuitry configured to generate a phase signal based on the current signal and the voltage signal(See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages); wherein the EIS circuitry further comprises a circuitry configured to generate a current amplitude signal based on the current signal(See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages); wherein the EIS circuitry further comprises a voltage amplitude circuitry configured to generate a voltage amplitude signal based on the current signal(See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages); wherein an EIS processor is configured to generate at least one output signal based on the phase signal, the current amplitude signal, and the voltage amplitude signal (See Fig 2); and wherein the battery management processor is configured to generate a first impedance based on an EIS model and the at least one output signal (See Para[0011] a method includes generating excitation waveforms at a target frequency using a wave circuit, producing digital representations of power parameters responsive to application of at least one of the generated excitation waveforms to a battery, generating weighted outputs of the digital representations of the power parameter using a window function, and measuring impedance of the battery using the digital representations of the power parameter, the generated excitation waveforms, and the window function. The generation of the excitation waveforms can be at one target frequency per measurement.). However van Lammerern is silent to the language of a battery management processor a current sensing circuitry current amplitude circuitry Nevertheless Yellepeddi teaches a battery management processor (See Fig 1) a current sensing circuitry (See Para[0037] The processor circuitry 112 can be configured to calculate the current through the cell arrangement 102 by calculating respective currents through corresponding ones of the sense resistors and summing the respective currents. The processor circuitry 112 can determine the current through a sense resistor by dividing the voltage across the sense resistor by the resistance value of the sense resistor.). current amplitude circuitry (See Para[0126] The adjustable current source 1010 can generate a current signal corresponding to the received analog signal. The generated current signal can have an amplitude corresponding to an amplitude of the received signal.) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern and have a current sensing circuitry and current amplitude circuitry such as that of Yellepeddi One of ordinary skill would have been motivated to modify van Lammerern, because having a current sensing circuitry would allow one to know the amount of current which would improve accurately making any necessary adjustments and would be no more than predictable use of prior art elements according to their established functions. With respect to Claim 13 van Lammeren teaches The battery management integrated circuit of claim 8, wherein the at least one output signal comprises a first output signal of an output phase and a second output signal of an output amplitude (See Para[0023]). With respect to Claim 14 van Lammeren is silent to the language of The battery management integrated circuit of claim 8, wherein to generate a first impedance based on an EIS model and the at least one output signal the battery management processor is configured to determine the first impedance from a look-up table. Nevertheless Yellepeddi teaches wherein to generate a first impedance based on an EIS model and the at least one output signal the battery management system is configured to determine the first impedance from a look-up table. (See Para[0140]) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammeren and determine the first impedance from a look-up table such as that of Yellepeddi. One of ordinary skill would have been motivated to modify van Lammeren because using a look-up table would improve efficiency. With respect to Claim 15 van Lammeren teaches A method comprising: generating, with an excitation circuitry, a stimulus signal (See Para[0006] a circuit includes synchronous demodulator circuitry, analog-to-digital converter (ADC) circuitry, and window circuitry. The synchronous demodulator circuitry measures impedance of a battery at a target frequency based on generated excitation waveforms. The ADC circuitry produces digital representations of a power parameter responsive to application of at least one of the generated excitation waveforms to the battery. ); transmitting the stimulus signal to a battery to generate a response signal; receiving the response signal at a EIS circuitry (See Para[0009] The synchronous demodulator circuitry may include a wave circuit to generate the excitation waveforms at one target frequency per measurement and a synchronous demodulator. The wave circuit generates the excitation waveforms including generating sample values indicative of a sine waveform and a cosine waveform at the single target frequency. The wave circuit further outputs one of the sine and cosine waveforms to generate current input to the battery and to identify a real component of the power parameter, and outputs the other of the sine and cosine waveforms to identify an imaginary component of the power parameter. The synchronous demodulator circuitry, e.g., the synchronous demodulator, includes first and second multiplier circuits and first and second integrator circuits. The first multiplier circuit and first integrator circuit multiply one of the sine and cosine waveforms by the weighted outputs of the digital representations indicative of the power parameter to identify the real component. The second multiplier circuit and a second integrator circuit multiply the other of the sine and cosine waveforms by the weighted outputs of the digital representations of the power parameter to identify the imaginary component.); generating, with the EIS circuitry, a current signal based on the response signal (See Para[0009],[0023] The wave circuit further outputs one of the sine and cosine waveforms to generate current input to the battery and to identify a real component of the power parameter, and outputs the other of the sine and cosine waveforms to identify an imaginary component of the power parameter.); generating, with the EIS circuitry, a voltage signal based on the response signal and the stimulus signal (See Para[0023] The source (e.g., voltage or current source) may be under control of the impedance measurement circuit or outside the control, such as the drive current of a traction motor of an electric vehicle while the vehicle is operating and/or moving, as further described herein.); generating, with a phase circuitry, a phase signal based on the current signal and the voltage signal (See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages); generating, with a circuitry, a current amplitude signal (See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages);; generating, with a voltage amplitude circuitry, a voltage amplitude signal(See Para[0023] The current is converted into voltage by a resistor connected in series with the battery and a band-pass filter eliminates unwanted signals before providing to amplitude and phase meters, which measure the battery voltage and voltage across a conversion resistor. Real and imaginary components of the impedance of the battery are determined from the amplitude and phase information of the measured voltages); generating at least one output signal based on the phase signal, the current amplitude signal, and the voltage amplitude signal(See Fig 2); and determining a first impedance based on an EIS model and the at least one output signal (See Para[0011] a method includes generating excitation waveforms at a target frequency using a wave circuit, producing digital representations of power parameters responsive to application of at least one of the generated excitation waveforms to a battery, generating weighted outputs of the digital representations of the power parameter using a window function, and measuring impedance of the battery using the digital representations of the power parameter, the generated excitation waveforms, and the window function. The generation of the excitation waveforms can be at one target frequency per measurement.). However van Lammerern is silent to the language of current amplitude circuitry Nevertheless Yellepeddi teaches current amplitude circuitry (See Para[0126] The adjustable current source 1010 can generate a current signal corresponding to the received analog signal. The generated current signal can have an amplitude corresponding to an amplitude of the received signal.) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern and have a current sensing circuitry and current amplitude circuitry such as that of Yellepeddi One of ordinary skill would have been motivated to modify van Lammerern, because having a current sensing circuitry would allow one to know the amount of current which would improve accurately making any necessary adjustments and would be no more than predictable use of prior art elements according to their established functions. With respect to Claim 20 van Lammeren teaches The method of claim 15, wherein the at least one output signal comprises a first output signal of an output phase and a second output signal of an output amplitude (See Para[0023])
Claim(s) (2, 3), (9, 10), (16, 17) is/are rejected under 35 U.S.C. 103 as being unpatentable over van Lammeren (US 2021/0109159 A1) in view of Yellepeddi (US 2024/0302443 A1) as applied to claims 1, 8, 15 respectively and further in view of Govindaraj (US 2016/0084894 A1).
With respect to Claim 2 van Lammerern is silent to the language of The system of claim 1, wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector. Nevertheless Govindaraj teaches wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector. (See Para[0057]) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector such as that of Govindaraj. One of ordinary skill would have been motivated to modify van Lammerern because a peak detector would allow one to know the maximum and improve efficiency and would no more than predictable use of prior art elements according to their established functions. With respect to Claim 3 van Lammerern is silent to the language of The system of claim 2, wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier. Nevertheless Govindaraj teaches wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier (See Abstract). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier such as that of Govindaraj. One of ordinary skill would have been motivated to modify van Lammerern because aa phase detector would allow one to know the phase and improve efficiency and would no more than predictable use of prior art elements according to their established functions. With respect to Claim 9 van Lammerern is silent to the language of The battery management integrated circuit of claim 8, wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector. Nevertheless Govindaraj teaches wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector. (See Para[0057]) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector such as that of Govindaraj. One of ordinary skill would have been motivated to modify van Lammerern because a peak detector would allow one to know the maximum and improve efficiency and would no more than predictable use of prior art elements according to their established functions. With respect to Claim 10 van Lammerern is silent to the language of The battery management integrated circuit of claim 9, wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier. Nevertheless Govindaraj teaches wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier (See Abstract). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier such as that of Govindaraj. One of ordinary skill would have been motivated to modify van Lammerern because aa phase detector would allow one to know the phase and improve efficiency and would no more than predictable use of prior art elements according to their established functions. With respect to Claim 16 van Lammerern is silent to the language of The method of claim 15, wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector. Nevertheless Govindaraj teaches wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector. (See Para[0057]) It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern wherein the voltage amplitude circuitry comprises a voltage peak-detector and the current amplitude circuitry comprises a current peak-detector such as that of Govindaraj. One of ordinary skill would have been motivated to modify van Lammerern because a peak detector would allow one to know the maximum and improve efficiency and would no more than predictable use of prior art elements according to their established functions. With respect to Claim 17 van Lammerern is silent to the language of The method of claim 16, wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier. Nevertheless Govindaraj teaches wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier (See Abstract). It would have been obvious to one of ordinary skill in the art before the effective filing date to modify van Lammerern wherein the phase circuitry comprises one of a phase shift detector, a phase detector, or a lock-in amplifier such as that of Govindaraj. One of ordinary skill would have been motivated to modify van Lammerern because aa phase detector would allow one to know the phase and improve efficiency and would no more than predictable use of prior art elements according to their established functions.
Allowable Subject Matter
Claims 4, 5, 11, 12, 18, 19 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Examiner notes the prior art search fail to anticipate or render obvious the limitation of wherein the voltage amplitude circuitry comprises a voltage lock-in amplifier and the current amplitude circuitry comprises a current lock-in amplifier in combination with all other limitations in the claim.
Conclusion
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YOSHIHISA . ISHIZUKA
Examiner
Art Unit 2857
/YOSHIHISA ISHIZUKA/ Primary Examiner, Art Unit 2857
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