Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 22-41 are pending in this office action.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on May 6, 2024, and August 6, 2025, are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The disclosure is objected to because of the following informalities: the CROSS REFERENCE TO RELATED APPLICATIONS section needs updated to reflect applications that have matured into patents. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 22 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wadley et al. (U.S. Patent Pub. No. 2018/0262489).
Regarding claim 22, Wadley et al. teaches a security system for computing environments, comprising: a detection module configured to identify systems employing quantum processing techniques and/or hardware (paragraph 0063-0066).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 23-41 are rejected under 35 U.S.C. 103 as being unpatentable over Wadley et al. (U.S. Patent Pub. No. 2018/0262489) in view of Wiebe et al. (U.S. Patent Pub. No. 2018/0349605).
Regarding claim 23, Wadley et al. teaches all the limitations of claim 22. However, Wadley et al. does not teach further comprising: a topology discovery module that performs scans to map out device connections, IP addresses, energy usage, and other parameters within a network.
Wiebe et al. teaches a topology discovery module that performs scans to map out device connections, IP addresses, energy usage, and other parameters within a network (paragraph 0179).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine constructing a system architecture diagram, as taught by Wiebe et al., with the method of Wadley et al. It would have been obvious for such modifications because the diagram visually shows the layout of devices and components for a graphical way of seeing connections.
Regarding claim 24, Wadley et al. teaches further comprising: an analysis module that utilizes quantum mechanics to analyze traffic and access logs to determine end-user behavior (paragraph 0046-0047).
Regarding claim 25, Wadley et al. teaches wherein the detection module identifies trapped ion quantum computing systems and detects when an external quantum system attempts to access a client device (paragraph 0024).
Regarding claim 26, Wadley et al. teaches wherein the detection module is configured to detect external superpositions in quantum systems (paragraph 0026).
Regarding claim 27, Wadley et al. as modified by Wiebe et al. teaches wherein detection devices implement quantum short coherence time and limited circuit depth to detect quantum operators (see paragraph 0144 of Wiebe et al.).
Regarding claim 28, Wadley et al. as modified by Wiebe et al. teaches wherein randomized quantum gates are used to secure data within the security system, with different angle degrees to ensure unique variations (see paragraph 0124 of Wiebe et al.).
Regarding claim 29, Wadley et al. teaches wherein sensitive client data is stored in a quantum system until it is uninstalled, providing an added layer of security through the use of quantum computing architecture (see paragraph 0116 of Wiebe et al.).
Regarding claim 30, Wadley et al. teaches further comprising: a detection feature for superconducting architectures (paragraph 0024).
Regarding claim 31, Wadley et al. teaches further comprising: a trapped ion quantum computer that operatively runs parameterized circuits and feeds the results to a classical optimizer (paragraph 0024).
Regarding claim 32, Wadley et al. as modified by Wiebe et al. teaches wherein the topology discovery module also estimates energy usage over time for each detected device and network segment (see paragraph 0044 of Wiebe et al.).
Regarding claim 33, Wadley et al. as modified by Wiebe et al. teaches wherein the topology discovery module automatically constructs a system architecture diagram after completing a scan, illustrating all connected devices, IP addresses, energy usage, and potential connections from other devices (see paragraph 0179 of Wiebe et al.).
Regarding claim 34, Wadley et al. teaches wherein the analysis module detects and identifies the use of quantum systems by monitoring specific quantum signatures and behaviors in network traffic (paragraph 0024).
Regarding claim 35, Wadley et al. teaches wherein the classical optimizer employs Particle Swarm or Bayesian optimization to reveal the convergence of the quantum circuit to the target distribution, which depends on the quantum hardware and classical optimization strategy (fig. 1).
Regarding claim 36, Wadley et al. teaches a method for securing computing environments, comprising: scanning a network to identify quantum processing techniques and/or hardware (paragraph 0063-0066); analyzing traffic and access logs using quantum mechanics to determine end-user behavior (paragraph 0046-0047).
Wadley et al. does not teach constructing a system architecture diagram illustrating connected devices, IP addresses, and energy usage.
Wiebe et al. teaches constructing a system architecture diagram illustrating connected devices, IP addresses, and energy usage (paragraph 0179).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine constructing a system architecture diagram, as taught by Wiebe et al., with the method of Wadley et al. It would have been obvious for such modifications because the diagram visually shows the layout of devices and components for a graphical way of seeing connections.
Regarding claim 37, Wadley et al. teaches further comprising: detecting trapped ion quantum computing systems and external quantum system access attempts (paragraph 0024).
Regarding claim 38, Wadley et al. teaches further comprising: running parameterized circuits on trapped ion quantum computers to detect superconducting architectures and feeding the results to a classical optimizer (paragraph 0040).
Regarding claim 39, Wadley et al. teaches further comprising: detecting external superpositions in quantum systems (paragraph 0027).
Regarding claim 40, Wadley et al. as modified by Wiebe et al. teaches further comprising: securing data using randomized quantum gates with varying angles (see paragraph 0124 of Wiebe et al.).
Regarding claim 41, Wadley et al. as modified by Wiebe et al. teaches further comprising: storing sensitive client data in quantum systems for added security until uninstalled (see paragraph 0116 of Wiebe et al.).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRANDON HOFFMAN whose telephone number is (571)272-3863. The examiner can normally be reached Monday-Friday 8:30AM-5:00PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeffrey Pwu can be reached at (571)272-6798. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BRANDON HOFFMAN/Primary Examiner, Art Unit 2433
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