Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This office acknowledges receipt of the following items from the Applicant:
Information Disclosure Statement (IDS) filed on 5/16/24 was considered.
Claims 1-20 are presented for examination.
Double Patent Rejection
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. See In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970);and, In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent is shown to be commonly owned with this application. See 37 CFR 1.130(b).
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claim 1-20 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claims 1-25 of Pazzocco et al, U.S. Patent No. 12,002,505.
Although the conflicting claims are not identical, they are not patentably distinct from each other because of the reasons set forth below.
Claims 1-20 are rejected in view of claim 1-25 of the 12,002,505 patent. Similar to the claimed invention, claim 1-25 of the patent ‘505 recites a “A memory system, comprising: one or more memory devices comprising a first set of memory cells of a first type and a second set of memory cells of a second type; and processing circuity coupled with the one or more memory devices and configured to cause the memory system to: receive a command associated with an access duration; and associate data associated with the command with the first set of memory cells based at least in part on the access duration being greater than a threshold duration or with the second set of memory cells based at least in part on the access duration being less than or equal to the threshold duration” and
“A method, comprising: receiving a command associated with an access duration; and associating data associated with the command with a first set of memory cells of a first type based at least in part on the access duration being greater than a threshold duration or with a second set of memory cells of a second type based at least in part on the access duration being less than or equal to the threshold duration” and “A non-transitory, computer-readable medium storing code comprising instructions executable, individually or collectively, by processing circuitry coupled with a memory system to cause the memory system to: receive a command associated with an access duration; and associate data associated with the command with a first set of memory cells of a first type based at least in part on the access duration being greater than a threshold duration or with a second set of memory cells of a second type based at least in part on the access duration being less than or equal to the threshold duration”.
As can be seen, the patent protection for the claimed invention has already been granted to the earlier filed application
eTerminal Disclaimer
The USPT© internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to
http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-20 would be allowable if an eTerminal Disclaimer signed and filed by an attorney or agent of record to overcome the obviousness-type double patenting rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicants’ disclosure.
Swami et al (US 12,136,44) disclose a memory device having in combination with other features, a methods, systems, and devices for memory accessing with auto-precharge are described. For example, a memory system may be configured to support an activate with auto-precharge command, which may be associated with a memory device opening a page of memory cells, latching respective logic states stored by the memory cells at a row buffer, writing logic states back to the page of memory cells, and maintaining the latched logic states at the row buffer (e.g., while maintaining power to latches of the row buffer, after closing the page of memory cells, while the page of memory cells is closed).
Carman (US 11,574,665) discloses methods, systems, and devices for timing chains for accessing memory cells are described to implement some delays at logic circuitry under an array of memory cells. The memory array logic may represent CMOS under array logic circuitry. A bank group logic may generate a first memory operation and a longer delay corresponding to a timing between the first operation and a second operation. The first operation may represent an access operation, a precharging operation, or the like. The memory array logic may be signaled regarding the first operation and may generate one or more smaller delays associated with one or more sub-operations of the first operation. The smaller delays may be tunable, which may support a memory device or controller to implement operations or sub-operations with different timings based on different processes, different memory cell characteristics, or different temperatures, among other examples.
Conclusion
When responding to the office action, Applicants’ are advised to provide the examiner with the line numbers and page numbers in the application and/or references cited to assist the examiner to locate the appropriate paragraphs.
A shortened statutory period for response to this action is set to expire 3 (three) months and 0 (zero) day from the date of this letter. Failure to respond within the period for response will cause the application to become abandoned (see MPEP 710.02 (b)).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Connie Yoha whose telephone number is (571)272-1799. The examiner can normally be reached on M-F 8:00AM - 5:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander Sofocleous can be reached on 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CONNIE C YOHA/ Primary Examiner, Art Unit 2825